ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC

The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on
the eMMC-interface of the lxa-mc1. Set it in the device tree to
benefit from the speed improvement.

Signed-off-by: Ahmad Fatoum <[email protected]>
Signed-off-by: Holger Assmann <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>

diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts b/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts
index b85025d009437bdc79a6534a6cf21549f92ae77b..1e5333fd437fec328c375935f18527cac003e903 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts
@@ -212,6 +212,7 @@
        pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
        pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
        bus-width = <8>;
+       mmc-ddr-3_3v;
        no-1-8-v;
        no-sd;
        no-sdio;