clk: mxl: Add option to override gate clks

In MxL's LGM SoC, gate clocks can be controlled either from CGU clk driver
i.e. this driver or directly from power management driver/daemon. It is
dependent on the power policy/profile requirements of the end product.

To support such use cases, provide option to override gate clks enable/disable
by adding a flag GATE_CLK_HW which controls if these gate clks are controlled
by HW i.e. this driver or overridden in order to allow it to be controlled
by power profiles instead.

Reviewed-by: Yi xin Zhu <[email protected]>
Signed-off-by: Rahul Tanwar <[email protected]>
Link: https://lore.kernel.org/r/bdc9c89317b5d338a6c4f1d49386b696e947a672.1665642720.git.rtanwar@maxlinear.com
[[email protected]: Add braces on many line if-else]
Signed-off-by: Stephen Boyd <[email protected]>

diff --git a/drivers/clk/x86/clk-cgu.c b/drivers/clk/x86/clk-cgu.c
index 1f7e93de67bc0931934e038f750beff1ca4f4f28..4278a687076c939f3bd084fe8be1d931041c4624 100644 (file)
--- a/drivers/clk/x86/clk-cgu.c
+++ b/drivers/clk/x86/clk-cgu.c
@@ -354,8 +354,22 @@ int lgm_clk_register_branches(struct lgm_clk_provider *ctx,
                        hw = lgm_clk_register_fixed_factor(ctx, list);
                        break;
                case CLK_TYPE_GATE:
-                       hw = lgm_clk_register_gate(ctx, list);
+                       if (list->gate_flags & GATE_CLK_HW) {
+                               hw = lgm_clk_register_gate(ctx, list);
+                       } else {
+                               /*
+                                * GATE_CLKs can be controlled either from
+                                * CGU clk driver i.e. this driver or directly
+                                * from power management driver/daemon. It is
+                                * dependent on the power policy/profile requirements
+                                * of the end product. To override control of gate
+                                * clks from this driver, provide NULL for this index
+                                * of gate clk provider.
+                                */
+                               hw = NULL;
+                       }
                        break;
+
                default:
                        dev_err(ctx->dev, "invalid clk type\n");
                        return -EINVAL;

diff --git a/drivers/clk/x86/clk-cgu.h b/drivers/clk/x86/clk-cgu.h
index 0aa0f35d63a0bcd58d0a10d54aac63b3fd7c78f5..73ce84345f81e34337e6751865b78fc17efb7a60 100644 (file)
--- a/drivers/clk/x86/clk-cgu.h
+++ b/drivers/clk/x86/clk-cgu.h
@@ -197,6 +197,7 @@ struct lgm_clk_branch {
 /* clock flags definition */
 #define CLOCK_FLAG_VAL_INIT    BIT(16)
 #define MUX_CLK_SW             BIT(17)
+#define GATE_CLK_HW            BIT(18)
 
 #define LGM_MUX(_id, _name, _pdata, _f, _reg,          \
                _shift, _width, _cf, _v)                \