Merge tag 'nand/for-5.17' into mtd/next

Raw NAND core:
* Export nand_read_page_hwecc_oob_first()

GPMC memory controller for OMAP2 NAND controller:
* GPMC:
  - Add support for AM64 SoC and allow build on K3 platforms
  - Use a compatible match table when checking for NAND controller
  - Use platform_get_irq() to get the interrupt

Raw NAND controller drivers:
* OMAP2 NAND controller:
  - Document the missing 'rb-gpios' DT property
  - Drop unused variable
  - Fix force_8bit flag behaviour for DMA mode
  - Move to exec_op interface
  - Use platform_get_irq() to get the interrupt
* Renesas:
  - Add new NAND controller driver with its bindings and MAINTAINERS entry
* Onenand:
  - Remove redundant variable ooblen
* MPC5121:
  - Remove unused variable in ads5121_select_chip()
* GPMI:
  - Add ERR007117 protection for nfc_apply_timings
  - Remove explicit default gpmi clock setting for i.MX6
  - Use platform_get_irq_byname() to get the interrupt
  - Remove unneeded variable
* Ingenic:
  - JZ4740 needs 'oob_first' read page function
* Davinci:
  - Rewrite function description
  - Avoid duplicated page read
  - Don't calculate ECC when reading page

Signed-off-by: Miquel Raynal <[email protected]>

diff --combined MAINTAINERS
index 352a781409eb0322c33dcef4bf21fce330a0ba9e,871e3cc826d89002a9f530903cb02ce26dff6952..db56adee2e7a3e0de447b58146b8b296ea867328
--- 1/MAINTAINERS
--- 2/MAINTAINERS
+++ b/MAINTAINERS
@@@ -16275,6 -16275,14 +16275,14 @@@ S: Supporte
  F:    Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
  F:    drivers/iio/adc/rzg2l_adc.c
  
+ RENESAS R-CAR GEN3 & RZ/N1 NAND CONTROLLER DRIVER
+ M:    Miquel Raynal <[email protected]>
+ L:    [email protected]
+ L:    [email protected]
+ S:    Maintained
+ F:    Documentation/devicetree/bindings/mtd/renesas-nandc.yaml
+ F:    drivers/mtd/nand/raw/renesas-nand-controller.c
+ 
  RESET CONTROLLER FRAMEWORK
  M:    Philipp Zabel <[email protected]>
  S:    Maintained
@@@ -17930,8 -17938,8 +17938,8 @@@ F:   drivers/pinctrl/spear
  
  SPI NOR SUBSYSTEM
  M:    Tudor Ambarus <[email protected]>
 +M:    Pratyush Yadav <[email protected]>
  R:    Michael Walle <[email protected]>
 -R:    Pratyush Yadav <[email protected]>
  L:    [email protected]
  S:    Maintained
  W:    http://www.linux-mtd.infradead.org/

diff --combined drivers/mtd/nand/raw/nand_base.c
index b3a9bc08b4bbbff590b830db04366ab3deb97aca,113a2e9f43b1b6a6c689b04d452e8561d64a0adb..9f48b4e71a111119a95f4c921a6be4c0856ee1cf
--- 1/drivers/mtd/nand/raw/nand_base.c
--- 2/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@@ -321,9 -321,6 +321,9 @@@ static int nand_isbad_bbm(struct nand_c
        if (nand_region_is_secured(chip, ofs, mtd->erasesize))
                return -EIO;
  
 +      if (WARN_ONCE(mtd_expert_analysis_mode, mtd_expert_analysis_warning))
 +              return 0;
 +
        if (chip->legacy.block_bad)
                return chip->legacy.block_bad(chip, ofs);
  
@@@ -3163,6 -3160,73 +3163,73 @@@ static int nand_read_page_hwecc(struct 
        return max_bitflips;
  }
  
+ /**
+  * nand_read_page_hwecc_oob_first - Hardware ECC page read with ECC
+  *                                  data read from OOB area
+  * @chip: nand chip info structure
+  * @buf: buffer to store read data
+  * @oob_required: caller requires OOB data read to chip->oob_poi
+  * @page: page number to read
+  *
+  * Hardware ECC for large page chips, which requires the ECC data to be
+  * extracted from the OOB before the actual data is read.
+  */
+ int nand_read_page_hwecc_oob_first(struct nand_chip *chip, uint8_t *buf,
+                                  int oob_required, int page)
+ {
+       struct mtd_info *mtd = nand_to_mtd(chip);
+       int i, eccsize = chip->ecc.size, ret;
+       int eccbytes = chip->ecc.bytes;
+       int eccsteps = chip->ecc.steps;
+       uint8_t *p = buf;
+       uint8_t *ecc_code = chip->ecc.code_buf;
+       unsigned int max_bitflips = 0;
+ 
+       /* Read the OOB area first */
+       ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
+       if (ret)
+               return ret;
+ 
+       /* Move read cursor to start of page */
+       ret = nand_change_read_column_op(chip, 0, NULL, 0, false);
+       if (ret)
+               return ret;
+ 
+       ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,
+                                        chip->ecc.total);
+       if (ret)
+               return ret;
+ 
+       for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+               int stat;
+ 
+               chip->ecc.hwctl(chip, NAND_ECC_READ);
+ 
+               ret = nand_read_data_op(chip, p, eccsize, false, false);
+               if (ret)
+                       return ret;
+ 
+               stat = chip->ecc.correct(chip, p, &ecc_code[i], NULL);
+               if (stat == -EBADMSG &&
+                   (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {
+                       /* check for empty pages with bitflips */
+                       stat = nand_check_erased_ecc_chunk(p, eccsize,
+                                                          &ecc_code[i],
+                                                          eccbytes, NULL, 0,
+                                                          chip->ecc.strength);
+               }
+ 
+               if (stat < 0) {
+                       mtd->ecc_stats.failed++;
+               } else {
+                       mtd->ecc_stats.corrected += stat;
+                       max_bitflips = max_t(unsigned int, max_bitflips, stat);
+               }
+       }
+       return max_bitflips;
+ }
+ EXPORT_SYMBOL_GPL(nand_read_page_hwecc_oob_first);
+ 
  /**
   * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
   * @chip: nand chip info structure