Merge tag 'x86_cleanups_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 cleanup from Borislav Petkov:

 - A single CONFIG_ symbol correction in a comment

* tag 'x86_cleanups_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mm: Refer to the intended config STRICT_DEVMEM in a comment

diff --combined arch/x86/mm/init.c
index 57ba5502aecf97196d9e40ac28dfbabb8b95b15b,5d747a1923cb059271292c243d5b61dd97c33c44..82a042c0382480d56817dd686be79b131139607b
--- 1/arch/x86/mm/init.c
--- 2/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@@ -77,20 -77,10 +77,20 @@@ static uint8_t __pte2cachemode_tbl[8] 
        [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
  };
  
 -/* Check that the write-protect PAT entry is set for write-protect */
 +/*
 + * Check that the write-protect PAT entry is set for write-protect.
 + * To do this without making assumptions how PAT has been set up (Xen has
 + * another layout than the kernel), translate the _PAGE_CACHE_MODE_WP cache
 + * mode via the __cachemode2pte_tbl[] into protection bits (those protection
 + * bits will select a cache mode of WP or better), and then translate the
 + * protection bits back into the cache mode using __pte2cm_idx() and the
 + * __pte2cachemode_tbl[] array. This will return the really used cache mode.
 + */
  bool x86_has_pat_wp(void)
  {
 -      return __pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] == _PAGE_CACHE_MODE_WP;
 +      uint16_t prot = __cachemode2pte_tbl[_PAGE_CACHE_MODE_WP];
 +
 +      return __pte2cachemode_tbl[__pte2cm_idx(prot)] == _PAGE_CACHE_MODE_WP;
  }
  
  enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
@@@ -856,7 -846,7 +856,7 @@@ int devmem_is_allowed(unsigned long pag
  
        /*
         * This must follow RAM test, since System RAM is considered a
-        * restricted resource under CONFIG_STRICT_IOMEM.
+        * restricted resource under CONFIG_STRICT_DEVMEM.
         */
        if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) {
                /* Low 1MB bypasses iomem restrictions. */