]> Git Repo - J-linux.git/commitdiff
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
authorRobert Marko <[email protected]>
Wed, 17 Nov 2021 14:02:22 +0000 (15:02 +0100)
committerMaxime Ripard <[email protected]>
Wed, 17 Nov 2021 15:40:50 +0000 (16:40 +0100)
Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its
currently set to plain RGMII mode meaning that it doesn't introduce
delays.

With this setup, TX packets are completely lost and changing the mode to
RGMII-ID so the PHY will add delays internally fixes the issue.

Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus")
Acked-by: Chen-Yu Tsai <[email protected]>
Tested-by: Ron Goossens <[email protected]>
Tested-by: Samuel Holland <[email protected]>
Signed-off-by: Robert Marko <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts

index d13980ed7a79a41c2c9024f7b2d0fe3ba082fbc9..7ec5ac850a0dc576a9680aac773ad9792387a9c6 100644 (file)
@@ -69,7 +69,7 @@
        pinctrl-0 = <&emac_rgmii_pins>;
        phy-supply = <&reg_gmac_3v3>;
        phy-handle = <&ext_rgmii_phy>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        status = "okay";
 };
 
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