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34 #ifndef __MLX5_ACCEL_TLS_H__
35 #define __MLX5_ACCEL_TLS_H__
37 #include <linux/mlx5/driver.h>
38 #include <linux/tls.h>
40 #ifdef CONFIG_MLX5_TLS
41 int mlx5_ktls_create_key(struct mlx5_core_dev *mdev,
42 struct tls_crypto_info *crypto_info,
44 void mlx5_ktls_destroy_key(struct mlx5_core_dev *mdev, u32 key_id);
46 static inline bool mlx5_accel_is_ktls_tx(struct mlx5_core_dev *mdev)
48 return MLX5_CAP_GEN(mdev, tls_tx);
51 static inline bool mlx5_accel_is_ktls_rx(struct mlx5_core_dev *mdev)
53 return MLX5_CAP_GEN(mdev, tls_rx);
56 static inline bool mlx5_accel_is_ktls_device(struct mlx5_core_dev *mdev)
58 if (!mlx5_accel_is_ktls_tx(mdev) &&
59 !mlx5_accel_is_ktls_rx(mdev))
62 if (!MLX5_CAP_GEN(mdev, log_max_dek))
65 return MLX5_CAP_TLS(mdev, tls_1_2_aes_gcm_128);
68 static inline bool mlx5e_ktls_type_check(struct mlx5_core_dev *mdev,
69 struct tls_crypto_info *crypto_info)
71 switch (crypto_info->cipher_type) {
72 case TLS_CIPHER_AES_GCM_128:
73 if (crypto_info->version == TLS_1_2_VERSION)
74 return MLX5_CAP_TLS(mdev, tls_1_2_aes_gcm_128);
81 static inline bool mlx5_accel_is_ktls_tx(struct mlx5_core_dev *mdev)
84 static inline bool mlx5_accel_is_ktls_rx(struct mlx5_core_dev *mdev)
88 mlx5_ktls_create_key(struct mlx5_core_dev *mdev,
89 struct tls_crypto_info *crypto_info,
90 u32 *p_key_id) { return -ENOTSUPP; }
92 mlx5_ktls_destroy_key(struct mlx5_core_dev *mdev, u32 key_id) {}
95 mlx5_accel_is_ktls_device(struct mlx5_core_dev *mdev) { return false; }
97 mlx5e_ktls_type_check(struct mlx5_core_dev *mdev,
98 struct tls_crypto_info *crypto_info) { return false; }
102 MLX5_ACCEL_TLS_TX = BIT(0),
103 MLX5_ACCEL_TLS_RX = BIT(1),
104 MLX5_ACCEL_TLS_V12 = BIT(2),
105 MLX5_ACCEL_TLS_V13 = BIT(3),
106 MLX5_ACCEL_TLS_LRO = BIT(4),
107 MLX5_ACCEL_TLS_IPV6 = BIT(5),
108 MLX5_ACCEL_TLS_AES_GCM128 = BIT(30),
109 MLX5_ACCEL_TLS_AES_GCM256 = BIT(31),
112 struct mlx5_ifc_tls_flow_bits {
115 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
116 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
118 u8 direction_sx[0x1];
119 u8 reserved_at_2[0x1e];
122 #ifdef CONFIG_MLX5_FPGA_TLS
123 int mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow,
124 struct tls_crypto_info *crypto_info,
125 u32 start_offload_tcp_sn, u32 *p_swid,
127 void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
129 int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, __be32 handle,
130 u32 seq, __be64 rcd_sn);
131 bool mlx5_accel_is_tls_device(struct mlx5_core_dev *mdev);
132 u32 mlx5_accel_tls_device_caps(struct mlx5_core_dev *mdev);
133 int mlx5_accel_tls_init(struct mlx5_core_dev *mdev);
134 void mlx5_accel_tls_cleanup(struct mlx5_core_dev *mdev);
139 mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow,
140 struct tls_crypto_info *crypto_info,
141 u32 start_offload_tcp_sn, u32 *p_swid,
142 bool direction_sx) { return -ENOTSUPP; }
143 static inline void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
144 bool direction_sx) { }
145 static inline int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, __be32 handle,
146 u32 seq, __be64 rcd_sn) { return 0; }
147 static inline bool mlx5_accel_is_tls_device(struct mlx5_core_dev *mdev)
149 return mlx5_accel_is_ktls_device(mdev);
151 static inline u32 mlx5_accel_tls_device_caps(struct mlx5_core_dev *mdev) { return 0; }
152 static inline int mlx5_accel_tls_init(struct mlx5_core_dev *mdev) { return 0; }
153 static inline void mlx5_accel_tls_cleanup(struct mlx5_core_dev *mdev) { }
156 #endif /* __MLX5_ACCEL_TLS_H__ */