drivers/iio/adc/ad7476.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Analog Devices AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
   4  * TI ADC081S/ADC101S/ADC121S 8/10/12-bit SPI ADC driver
   5  *
   6  * Copyright 2010 Analog Devices Inc.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/kernel.h>
  11 #include <linux/slab.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/spi/spi.h>
  14 #include <linux/regulator/consumer.h>
  15 #include <linux/gpio/consumer.h>
  16 #include <linux/err.h>
  17 #include <linux/module.h>
  18 #include <linux/bitops.h>
  19 #include <linux/delay.h>
  20
  21 #include <linux/iio/iio.h>
  22 #include <linux/iio/sysfs.h>
  23 #include <linux/iio/buffer.h>
  24 #include <linux/iio/trigger_consumer.h>
  25 #include <linux/iio/triggered_buffer.h>
  26
  27 struct ad7476_state;
  28
  29 struct ad7476_chip_info {
  30         unsigned int                    int_vref_uv;
  31         struct iio_chan_spec            channel[2];
  32         /* channels used when convst gpio is defined */
  33         struct iio_chan_spec            convst_channel[2];
  34         void (*reset)(struct ad7476_state *);
  35         bool                            has_vref;
  36         bool                            has_vdrive;
  37 };
  38
  39 struct ad7476_state {
  40         struct spi_device               *spi;
  41         const struct ad7476_chip_info   *chip_info;
  42         struct regulator                *ref_reg;
  43         struct gpio_desc                *convst_gpio;
  44         struct spi_transfer             xfer;
  45         struct spi_message              msg;
  46         /*
  47          * DMA (thus cache coherency maintenance) requires the
  48          * transfer buffers to live in their own cache lines.
  49          * Make the buffer large enough for one 16 bit sample and one 64 bit
  50          * aligned 64 bit timestamp.
  51          */
  52         unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
  53                         ____cacheline_aligned;
  54 };
  55
  56 enum ad7476_supported_device_ids {
  57         ID_AD7091,
  58         ID_AD7091R,
  59         ID_AD7273,
  60         ID_AD7274,
  61         ID_AD7276,
  62         ID_AD7277,
  63         ID_AD7278,
  64         ID_AD7466,
  65         ID_AD7467,
  66         ID_AD7468,
  67         ID_AD7475,
  68         ID_AD7495,
  69         ID_AD7940,
  70         ID_ADC081S,
  71         ID_ADC101S,
  72         ID_ADC121S,
  73         ID_ADS7866,
  74         ID_ADS7867,
  75         ID_ADS7868,
  76         ID_LTC2314_14,
  77 };
  78
  79 static void ad7091_convst(struct ad7476_state *st)
  80 {
  81         if (!st->convst_gpio)
  82                 return;
  83
  84         gpiod_set_value(st->convst_gpio, 0);
  85         udelay(1); /* CONVST pulse width: 10 ns min */
  86         gpiod_set_value(st->convst_gpio, 1);
  87         udelay(1); /* Conversion time: 650 ns max */
  88 }
  89
  90 static irqreturn_t ad7476_trigger_handler(int irq, void  *p)
  91 {
  92         struct iio_poll_func *pf = p;
  93         struct iio_dev *indio_dev = pf->indio_dev;
  94         struct ad7476_state *st = iio_priv(indio_dev);
  95         int b_sent;
  96
  97         ad7091_convst(st);
  98
  99         b_sent = spi_sync(st->spi, &st->msg);
 100         if (b_sent < 0)
 101                 goto done;
 102
 103         iio_push_to_buffers_with_timestamp(indio_dev, st->data,
 104                 iio_get_time_ns(indio_dev));
 105 done:
 106         iio_trigger_notify_done(indio_dev->trig);
 107
 108         return IRQ_HANDLED;
 109 }
 110
 111 static void ad7091_reset(struct ad7476_state *st)
 112 {
 113         /* Any transfers with 8 scl cycles will reset the device */
 114         spi_read(st->spi, st->data, 1);
 115 }
 116
 117 static int ad7476_scan_direct(struct ad7476_state *st)
 118 {
 119         int ret;
 120
 121         ad7091_convst(st);
 122
 123         ret = spi_sync(st->spi, &st->msg);
 124         if (ret)
 125                 return ret;
 126
 127         return be16_to_cpup((__be16 *)st->data);
 128 }
 129
 130 static int ad7476_read_raw(struct iio_dev *indio_dev,
 131                            struct iio_chan_spec const *chan,
 132                            int *val,
 133                            int *val2,
 134                            long m)
 135 {
 136         int ret;
 137         struct ad7476_state *st = iio_priv(indio_dev);
 138         int scale_uv;
 139
 140         switch (m) {
 141         case IIO_CHAN_INFO_RAW:
 142                 ret = iio_device_claim_direct_mode(indio_dev);
 143                 if (ret)
 144                         return ret;
 145                 ret = ad7476_scan_direct(st);
 146                 iio_device_release_direct_mode(indio_dev);
 147
 148                 if (ret < 0)
 149                         return ret;
 150                 *val = (ret >> st->chip_info->channel[0].scan_type.shift) &
 151                         GENMASK(st->chip_info->channel[0].scan_type.realbits - 1, 0);
 152                 return IIO_VAL_INT;
 153         case IIO_CHAN_INFO_SCALE:
 154                 if (st->ref_reg) {
 155                         scale_uv = regulator_get_voltage(st->ref_reg);
 156                         if (scale_uv < 0)
 157                                 return scale_uv;
 158                 } else {
 159                         scale_uv = st->chip_info->int_vref_uv;
 160                 }
 161                 *val = scale_uv / 1000;
 162                 *val2 = chan->scan_type.realbits;
 163                 return IIO_VAL_FRACTIONAL_LOG2;
 164         }
 165         return -EINVAL;
 166 }
 167
 168 #define _AD7476_CHAN(bits, _shift, _info_mask_sep)              \
 169         {                                                       \
 170         .type = IIO_VOLTAGE,                                    \
 171         .indexed = 1,                                           \
 172         .info_mask_separate = _info_mask_sep,                   \
 173         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),   \
 174         .scan_type = {                                          \
 175                 .sign = 'u',                                    \
 176                 .realbits = (bits),                             \
 177                 .storagebits = 16,                              \
 178                 .shift = (_shift),                              \
 179                 .endianness = IIO_BE,                           \
 180         },                                                      \
 181 }
 182
 183 #define ADC081S_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \
 184                 BIT(IIO_CHAN_INFO_RAW))
 185 #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
 186                 BIT(IIO_CHAN_INFO_RAW))
 187 #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
 188                 BIT(IIO_CHAN_INFO_RAW))
 189 #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
 190 #define AD7091R_CONVST_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), \
 191                 BIT(IIO_CHAN_INFO_RAW))
 192 #define ADS786X_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \
 193                 BIT(IIO_CHAN_INFO_RAW))
 194
 195 static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
 196         [ID_AD7091] = {
 197                 .channel[0] = AD7091R_CHAN(12),
 198                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 199                 .convst_channel[0] = AD7091R_CONVST_CHAN(12),
 200                 .convst_channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 201                 .reset = ad7091_reset,
 202         },
 203         [ID_AD7091R] = {
 204                 .channel[0] = AD7091R_CHAN(12),
 205                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 206                 .convst_channel[0] = AD7091R_CONVST_CHAN(12),
 207                 .convst_channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 208                 .int_vref_uv = 2500000,
 209                 .has_vref = true,
 210                 .reset = ad7091_reset,
 211         },
 212         [ID_AD7273] = {
 213                 .channel[0] = AD7940_CHAN(10),
 214                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 215                 .has_vref = true,
 216         },
 217         [ID_AD7274] = {
 218                 .channel[0] = AD7940_CHAN(12),
 219                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 220                 .has_vref = true,
 221         },
 222         [ID_AD7276] = {
 223                 .channel[0] = AD7940_CHAN(12),
 224                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 225         },
 226         [ID_AD7277] = {
 227                 .channel[0] = AD7940_CHAN(10),
 228                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 229         },
 230         [ID_AD7278] = {
 231                 .channel[0] = AD7940_CHAN(8),
 232                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 233         },
 234         [ID_AD7466] = {
 235                 .channel[0] = AD7476_CHAN(12),
 236                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 237         },
 238         [ID_AD7467] = {
 239                 .channel[0] = AD7476_CHAN(10),
 240                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 241         },
 242         [ID_AD7468] = {
 243                 .channel[0] = AD7476_CHAN(8),
 244                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 245         },
 246         [ID_AD7475] = {
 247                 .channel[0] = AD7476_CHAN(12),
 248                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 249                 .has_vref = true,
 250                 .has_vdrive = true,
 251         },
 252         [ID_AD7495] = {
 253                 .channel[0] = AD7476_CHAN(12),
 254                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 255                 .int_vref_uv = 2500000,
 256                 .has_vdrive = true,
 257         },
 258         [ID_AD7940] = {
 259                 .channel[0] = AD7940_CHAN(14),
 260                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 261         },
 262         [ID_ADC081S] = {
 263                 .channel[0] = ADC081S_CHAN(8),
 264                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 265         },
 266         [ID_ADC101S] = {
 267                 .channel[0] = ADC081S_CHAN(10),
 268                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 269         },
 270         [ID_ADC121S] = {
 271                 .channel[0] = ADC081S_CHAN(12),
 272                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 273         },
 274         [ID_ADS7866] = {
 275                 .channel[0] = ADS786X_CHAN(12),
 276                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 277         },
 278         [ID_ADS7867] = {
 279                 .channel[0] = ADS786X_CHAN(10),
 280                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 281         },
 282         [ID_ADS7868] = {
 283                 .channel[0] = ADS786X_CHAN(8),
 284                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 285         },
 286         [ID_LTC2314_14] = {
 287                 .channel[0] = AD7940_CHAN(14),
 288                 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
 289                 .has_vref = true,
 290         },
 291 };
 292
 293 static const struct iio_info ad7476_info = {
 294         .read_raw = &ad7476_read_raw,
 295 };
 296
 297 static void ad7476_reg_disable(void *data)
 298 {
 299         struct regulator *reg = data;
 300
 301         regulator_disable(reg);
 302 }
 303
 304 static int ad7476_probe(struct spi_device *spi)
 305 {
 306         struct ad7476_state *st;
 307         struct iio_dev *indio_dev;
 308         struct regulator *reg;
 309         int ret;
 310
 311         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 312         if (!indio_dev)
 313                 return -ENOMEM;
 314
 315         st = iio_priv(indio_dev);
 316         st->chip_info =
 317                 &ad7476_chip_info_tbl[spi_get_device_id(spi)->driver_data];
 318
 319         reg = devm_regulator_get(&spi->dev, "vcc");
 320         if (IS_ERR(reg))
 321                 return PTR_ERR(reg);
 322
 323         ret = regulator_enable(reg);
 324         if (ret)
 325                 return ret;
 326
 327         ret = devm_add_action_or_reset(&spi->dev, ad7476_reg_disable, reg);
 328         if (ret)
 329                 return ret;
 330
 331         /* Either vcc or vref (below) as appropriate */
 332         if (!st->chip_info->int_vref_uv)
 333                 st->ref_reg = reg;
 334
 335         if (st->chip_info->has_vref) {
 336
 337                 /* If a device has an internal reference vref is optional */
 338                 if (st->chip_info->int_vref_uv) {
 339                         reg = devm_regulator_get_optional(&spi->dev, "vref");
 340                         if (IS_ERR(reg) && (PTR_ERR(reg) != -ENODEV))
 341                                 return PTR_ERR(reg);
 342                 } else {
 343                         reg = devm_regulator_get(&spi->dev, "vref");
 344                         if (IS_ERR(reg))
 345                                 return PTR_ERR(reg);
 346                 }
 347
 348                 if (!IS_ERR(reg)) {
 349                         ret = regulator_enable(reg);
 350                         if (ret)
 351                                 return ret;
 352
 353                         ret = devm_add_action_or_reset(&spi->dev,
 354                                                        ad7476_reg_disable,
 355                                                        reg);
 356                         if (ret)
 357                                 return ret;
 358                         st->ref_reg = reg;
 359                 } else {
 360                         /*
 361                          * Can only get here if device supports both internal
 362                          * and external reference, but the regulator connected
 363                          * to the external reference is not connected.
 364                          * Set the reference regulator pointer to NULL to
 365                          * indicate this.
 366                          */
 367                         st->ref_reg = NULL;
 368                 }
 369         }
 370
 371         if (st->chip_info->has_vdrive) {
 372                 reg = devm_regulator_get(&spi->dev, "vdrive");
 373                 if (IS_ERR(reg))
 374                         return PTR_ERR(reg);
 375
 376                 ret = regulator_enable(reg);
 377                 if (ret)
 378                         return ret;
 379
 380                 ret = devm_add_action_or_reset(&spi->dev, ad7476_reg_disable,
 381                                                reg);
 382                 if (ret)
 383                         return ret;
 384         }
 385
 386         st->convst_gpio = devm_gpiod_get_optional(&spi->dev,
 387                                                   "adi,conversion-start",
 388                                                   GPIOD_OUT_LOW);
 389         if (IS_ERR(st->convst_gpio))
 390                 return PTR_ERR(st->convst_gpio);
 391
 392         st->spi = spi;
 393
 394         indio_dev->name = spi_get_device_id(spi)->name;
 395         indio_dev->modes = INDIO_DIRECT_MODE;
 396         indio_dev->channels = st->chip_info->channel;
 397         indio_dev->num_channels = 2;
 398         indio_dev->info = &ad7476_info;
 399
 400         if (st->convst_gpio)
 401                 indio_dev->channels = st->chip_info->convst_channel;
 402         /* Setup default message */
 403
 404         st->xfer.rx_buf = &st->data;
 405         st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8;
 406
 407         spi_message_init(&st->msg);
 408         spi_message_add_tail(&st->xfer, &st->msg);
 409
 410         ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
 411                                               &ad7476_trigger_handler, NULL);
 412         if (ret)
 413                 return ret;
 414
 415         if (st->chip_info->reset)
 416                 st->chip_info->reset(st);
 417
 418         return devm_iio_device_register(&spi->dev, indio_dev);
 419 }
 420
 421 static const struct spi_device_id ad7476_id[] = {
 422         {"ad7091", ID_AD7091},
 423         {"ad7091r", ID_AD7091R},
 424         {"ad7273", ID_AD7273},
 425         {"ad7274", ID_AD7274},
 426         {"ad7276", ID_AD7276},
 427         {"ad7277", ID_AD7277},
 428         {"ad7278", ID_AD7278},
 429         {"ad7466", ID_AD7466},
 430         {"ad7467", ID_AD7467},
 431         {"ad7468", ID_AD7468},
 432         {"ad7475", ID_AD7475},
 433         {"ad7476", ID_AD7466},
 434         {"ad7476a", ID_AD7466},
 435         {"ad7477", ID_AD7467},
 436         {"ad7477a", ID_AD7467},
 437         {"ad7478", ID_AD7468},
 438         {"ad7478a", ID_AD7468},
 439         {"ad7495", ID_AD7495},
 440         {"ad7910", ID_AD7467},
 441         {"ad7920", ID_AD7466},
 442         {"ad7940", ID_AD7940},
 443         {"adc081s", ID_ADC081S},
 444         {"adc101s", ID_ADC101S},
 445         {"adc121s", ID_ADC121S},
 446         {"ads7866", ID_ADS7866},
 447         {"ads7867", ID_ADS7867},
 448         {"ads7868", ID_ADS7868},
 449         {"ltc2314-14", ID_LTC2314_14},
 450         {}
 451 };
 452 MODULE_DEVICE_TABLE(spi, ad7476_id);
 453
 454 static struct spi_driver ad7476_driver = {
 455         .driver = {
 456                 .name   = "ad7476",
 457         },
 458         .probe          = ad7476_probe,
 459         .id_table       = ad7476_id,
 460 };
 461 module_spi_driver(ad7476_driver);
 462
 463 MODULE_AUTHOR("Michael Hennerich <[email protected]>");
 464 MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs");
 465 MODULE_LICENSE("GPL v2");