2 * ti-sysc.c - Texas Instruments sysc interconnect target driver
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
15 #include <linux/clk.h>
16 #include <linux/clkdev.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/reset.h>
23 #include <linux/of_address.h>
24 #include <linux/of_platform.h>
25 #include <linux/slab.h>
27 #include <linux/platform_data/ti-sysc.h>
29 #include <dt-bindings/bus/ti-sysc.h>
31 static const char * const reg_names[] = { "rev", "sysc", "syss", };
47 static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", };
49 #define SYSC_IDLEMODE_MASK 3
50 #define SYSC_CLOCKACTIVITY_MASK 3
53 * struct sysc - TI sysc interconnect target module registers and capabilities
54 * @dev: struct device pointer
55 * @module_pa: physical address of the interconnect target module
56 * @module_size: size of the interconnect target module
57 * @module_va: virtual address of the interconnect target module
58 * @offsets: register offsets from module base
59 * @clocks: clocks used by the interconnect target module
60 * @clock_roles: clock role names for the found clocks
61 * @nr_clocks: number of clocks used by the interconnect target module
62 * @legacy_mode: configured for legacy mode if set
63 * @cap: interconnect target module capabilities
64 * @cfg: interconnect target module configuration
65 * @name: name if available
66 * @revision: interconnect target module revision
67 * @needs_resume: runtime resume needed on resume from suspend
73 void __iomem *module_va;
74 int offsets[SYSC_MAX_REGS];
76 const char **clock_roles;
78 struct reset_control *rsts;
79 const char *legacy_mode;
80 const struct sysc_capabilities *cap;
81 struct sysc_config cfg;
82 struct ti_sysc_cookie cookie;
87 bool child_needs_resume;
88 struct delayed_work idle_work;
91 static u32 sysc_read(struct sysc *ddata, int offset)
93 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
96 val = readw_relaxed(ddata->module_va + offset);
97 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16);
102 return readl_relaxed(ddata->module_va + offset);
105 static bool sysc_opt_clks_needed(struct sysc *ddata)
107 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
110 static u32 sysc_read_revision(struct sysc *ddata)
112 int offset = ddata->offsets[SYSC_REVISION];
117 return sysc_read(ddata, offset);
120 static int sysc_get_one_clock(struct sysc *ddata, const char *name)
122 int error, i, index = -ENODEV;
124 if (!strncmp(clock_names[SYSC_FCK], name, 3))
126 else if (!strncmp(clock_names[SYSC_ICK], name, 3))
130 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
131 if (!ddata->clocks[i]) {
139 dev_err(ddata->dev, "clock %s not added\n", name);
143 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
144 if (IS_ERR(ddata->clocks[index])) {
145 if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
148 dev_err(ddata->dev, "clock get error for %s: %li\n",
149 name, PTR_ERR(ddata->clocks[index]));
151 return PTR_ERR(ddata->clocks[index]);
154 error = clk_prepare(ddata->clocks[index]);
156 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
165 static int sysc_get_clocks(struct sysc *ddata)
167 struct device_node *np = ddata->dev->of_node;
168 struct property *prop;
170 int nr_fck = 0, nr_ick = 0, i, error = 0;
172 ddata->clock_roles = devm_kcalloc(ddata->dev,
174 sizeof(*ddata->clock_roles),
176 if (!ddata->clock_roles)
179 of_property_for_each_string(np, "clock-names", prop, name) {
180 if (!strncmp(clock_names[SYSC_FCK], name, 3))
182 if (!strncmp(clock_names[SYSC_ICK], name, 3))
184 ddata->clock_roles[ddata->nr_clocks] = name;
188 if (ddata->nr_clocks < 1)
191 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
192 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
197 if (nr_fck > 1 || nr_ick > 1) {
198 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
203 ddata->clocks = devm_kcalloc(ddata->dev,
204 ddata->nr_clocks, sizeof(*ddata->clocks),
209 for (i = 0; i < ddata->nr_clocks; i++) {
210 error = sysc_get_one_clock(ddata, ddata->clock_roles[i]);
211 if (error && error != -ENOENT)
219 * sysc_init_resets - reset module on init
220 * @ddata: device driver data
222 * A module can have both OCP softreset control and external rstctrl.
223 * If more complicated rstctrl resets are needed, please handle these
224 * directly from the child device driver and map only the module reset
225 * for the parent interconnect target module device.
227 * Automatic reset of the module on init can be skipped with the
228 * "ti,no-reset-on-init" device tree property.
230 static int sysc_init_resets(struct sysc *ddata)
235 devm_reset_control_array_get_optional_exclusive(ddata->dev);
236 if (IS_ERR(ddata->rsts))
237 return PTR_ERR(ddata->rsts);
239 if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
242 error = reset_control_assert(ddata->rsts);
247 error = reset_control_deassert(ddata->rsts);
255 * sysc_parse_and_check_child_range - parses module IO region from ranges
256 * @ddata: device driver data
258 * In general we only need rev, syss, and sysc registers and not the whole
259 * module range. But we do want the offsets for these registers from the
260 * module base. This allows us to check them against the legacy hwmod
261 * platform data. Let's also check the ranges are configured properly.
263 static int sysc_parse_and_check_child_range(struct sysc *ddata)
265 struct device_node *np = ddata->dev->of_node;
266 const __be32 *ranges;
267 u32 nr_addr, nr_size;
270 ranges = of_get_property(np, "ranges", &len);
272 dev_err(ddata->dev, "missing ranges for %pOF\n", np);
277 len /= sizeof(*ranges);
280 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
285 error = of_property_read_u32(np, "#address-cells", &nr_addr);
289 error = of_property_read_u32(np, "#size-cells", &nr_size);
293 if (nr_addr != 1 || nr_size != 1) {
294 dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
300 ddata->module_pa = of_translate_address(np, ranges++);
301 ddata->module_size = be32_to_cpup(ranges);
306 static struct device_node *stdout_path;
308 static void sysc_init_stdout_path(struct sysc *ddata)
310 struct device_node *np = NULL;
313 if (IS_ERR(stdout_path))
319 np = of_find_node_by_path("/chosen");
323 uart = of_get_property(np, "stdout-path", NULL);
327 np = of_find_node_by_path(uart);
336 stdout_path = ERR_PTR(-ENODEV);
339 static void sysc_check_quirk_stdout(struct sysc *ddata,
340 struct device_node *np)
342 sysc_init_stdout_path(ddata);
343 if (np != stdout_path)
346 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
347 SYSC_QUIRK_NO_RESET_ON_INIT;
351 * sysc_check_one_child - check child configuration
352 * @ddata: device driver data
353 * @np: child device node
355 * Let's avoid messy situations where we have new interconnect target
356 * node but children have "ti,hwmods". These belong to the interconnect
357 * target node and are managed by this driver.
359 static int sysc_check_one_child(struct sysc *ddata,
360 struct device_node *np)
364 name = of_get_property(np, "ti,hwmods", NULL);
366 dev_warn(ddata->dev, "really a child ti,hwmods property?");
368 sysc_check_quirk_stdout(ddata, np);
373 static int sysc_check_children(struct sysc *ddata)
375 struct device_node *child;
378 for_each_child_of_node(ddata->dev->of_node, child) {
379 error = sysc_check_one_child(ddata, child);
388 * So far only I2C uses 16-bit read access with clockactivity with revision
389 * in two registers with stride of 4. We can detect this based on the rev
390 * register size to configure things far enough to be able to properly read
391 * the revision register.
393 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
395 if (resource_size(res) == 8)
396 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
400 * sysc_parse_one - parses the interconnect target module registers
401 * @ddata: device driver data
402 * @reg: register to parse
404 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
406 struct resource *res;
413 name = reg_names[reg];
419 res = platform_get_resource_byname(to_platform_device(ddata->dev),
420 IORESOURCE_MEM, name);
422 ddata->offsets[reg] = -ENODEV;
427 ddata->offsets[reg] = res->start - ddata->module_pa;
428 if (reg == SYSC_REVISION)
429 sysc_check_quirk_16bit(ddata, res);
434 static int sysc_parse_registers(struct sysc *ddata)
438 for (i = 0; i < SYSC_MAX_REGS; i++) {
439 error = sysc_parse_one(ddata, i);
448 * sysc_check_registers - check for misconfigured register overlaps
449 * @ddata: device driver data
451 static int sysc_check_registers(struct sysc *ddata)
453 int i, j, nr_regs = 0, nr_matches = 0;
455 for (i = 0; i < SYSC_MAX_REGS; i++) {
456 if (ddata->offsets[i] < 0)
459 if (ddata->offsets[i] > (ddata->module_size - 4)) {
460 dev_err(ddata->dev, "register outside module range");
465 for (j = 0; j < SYSC_MAX_REGS; j++) {
466 if (ddata->offsets[j] < 0)
469 if (ddata->offsets[i] == ddata->offsets[j])
476 dev_err(ddata->dev, "missing registers\n");
481 if (nr_matches > nr_regs) {
482 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
483 nr_regs, nr_matches);
492 * syc_ioremap - ioremap register space for the interconnect target module
493 * @ddata: device driver data
495 * Note that the interconnect target module registers can be anywhere
496 * within the interconnect target module range. For example, SGX has
497 * them at offset 0x1fc00 in the 32MB module address space. And cpsw
498 * has them at offset 0x1200 in the CPSW_WR child. Usually the
499 * the interconnect target module registers are at the beginning of
500 * the module range though.
502 static int sysc_ioremap(struct sysc *ddata)
506 size = max3(ddata->offsets[SYSC_REVISION],
507 ddata->offsets[SYSC_SYSCONFIG],
508 ddata->offsets[SYSC_SYSSTATUS]);
510 if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
513 ddata->module_va = devm_ioremap(ddata->dev,
516 if (!ddata->module_va)
523 * sysc_map_and_check_registers - ioremap and check device registers
524 * @ddata: device driver data
526 static int sysc_map_and_check_registers(struct sysc *ddata)
530 error = sysc_parse_and_check_child_range(ddata);
534 error = sysc_check_children(ddata);
538 error = sysc_parse_registers(ddata);
542 error = sysc_ioremap(ddata);
546 error = sysc_check_registers(ddata);
554 * sysc_show_rev - read and show interconnect target module revision
555 * @bufp: buffer to print the information to
556 * @ddata: device driver data
558 static int sysc_show_rev(char *bufp, struct sysc *ddata)
562 if (ddata->offsets[SYSC_REVISION] < 0)
563 return sprintf(bufp, ":NA");
565 len = sprintf(bufp, ":%08x", ddata->revision);
570 static int sysc_show_reg(struct sysc *ddata,
571 char *bufp, enum sysc_registers reg)
573 if (ddata->offsets[reg] < 0)
574 return sprintf(bufp, ":NA");
576 return sprintf(bufp, ":%x", ddata->offsets[reg]);
579 static int sysc_show_name(char *bufp, struct sysc *ddata)
584 return sprintf(bufp, ":%s", ddata->name);
588 * sysc_show_registers - show information about interconnect target module
589 * @ddata: device driver data
591 static void sysc_show_registers(struct sysc *ddata)
597 for (i = 0; i < SYSC_MAX_REGS; i++)
598 bufp += sysc_show_reg(ddata, bufp, i);
600 bufp += sysc_show_rev(bufp, ddata);
601 bufp += sysc_show_name(bufp, ddata);
603 dev_dbg(ddata->dev, "%llx:%x%s\n",
604 ddata->module_pa, ddata->module_size,
608 static int __maybe_unused sysc_runtime_suspend(struct device *dev)
610 struct ti_sysc_platform_data *pdata;
614 ddata = dev_get_drvdata(dev);
619 if (ddata->legacy_mode) {
620 pdata = dev_get_platdata(ddata->dev);
624 if (!pdata->idle_module)
627 error = pdata->idle_module(dev, &ddata->cookie);
629 dev_err(dev, "%s: could not idle: %i\n",
635 for (i = 0; i < ddata->nr_clocks; i++) {
636 if (IS_ERR_OR_NULL(ddata->clocks[i]))
639 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
642 clk_disable(ddata->clocks[i]);
646 ddata->enabled = false;
651 static int __maybe_unused sysc_runtime_resume(struct device *dev)
653 struct ti_sysc_platform_data *pdata;
657 ddata = dev_get_drvdata(dev);
662 if (ddata->legacy_mode) {
663 pdata = dev_get_platdata(ddata->dev);
667 if (!pdata->enable_module)
670 error = pdata->enable_module(dev, &ddata->cookie);
672 dev_err(dev, "%s: could not enable: %i\n",
678 for (i = 0; i < ddata->nr_clocks; i++) {
679 if (IS_ERR_OR_NULL(ddata->clocks[i]))
682 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
685 error = clk_enable(ddata->clocks[i]);
691 ddata->enabled = true;
696 #ifdef CONFIG_PM_SLEEP
697 static int sysc_suspend(struct device *dev)
702 ddata = dev_get_drvdata(dev);
704 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER |
705 SYSC_QUIRK_LEGACY_IDLE))
711 dev_dbg(ddata->dev, "%s %s\n", __func__,
712 ddata->name ? ddata->name : "");
714 error = pm_runtime_put_sync_suspend(dev);
716 dev_warn(ddata->dev, "%s not idle %i %s\n",
718 ddata->name ? ddata->name : "");
723 ddata->needs_resume = true;
728 static int sysc_resume(struct device *dev)
733 ddata = dev_get_drvdata(dev);
735 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER |
736 SYSC_QUIRK_LEGACY_IDLE))
739 if (ddata->needs_resume) {
740 dev_dbg(ddata->dev, "%s %s\n", __func__,
741 ddata->name ? ddata->name : "");
743 error = pm_runtime_get_sync(dev);
745 dev_err(ddata->dev, "%s error %i %s\n",
747 ddata->name ? ddata->name : "");
752 ddata->needs_resume = false;
758 static int sysc_noirq_suspend(struct device *dev)
762 ddata = dev_get_drvdata(dev);
764 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
767 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER))
773 dev_dbg(ddata->dev, "%s %s\n", __func__,
774 ddata->name ? ddata->name : "");
776 ddata->needs_resume = true;
778 return sysc_runtime_suspend(dev);
781 static int sysc_noirq_resume(struct device *dev)
785 ddata = dev_get_drvdata(dev);
787 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
790 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER))
793 if (ddata->needs_resume) {
794 dev_dbg(ddata->dev, "%s %s\n", __func__,
795 ddata->name ? ddata->name : "");
797 ddata->needs_resume = false;
799 return sysc_runtime_resume(dev);
806 static const struct dev_pm_ops sysc_pm_ops = {
807 SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume)
808 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume)
809 SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
814 /* Module revision register based quirks */
815 struct sysc_revision_quirk {
826 #define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \
827 optrev_val, optrevmask, optquirkmask) \
831 .rev_offset = (optrev), \
832 .sysc_offset = (optsysc), \
833 .syss_offset = (optsyss), \
834 .revision = (optrev_val), \
835 .revision_mask = (optrevmask), \
836 .quirks = (optquirkmask), \
839 static const struct sysc_revision_quirk sysc_revision_quirks[] = {
840 /* These need to use noirq_suspend */
841 SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff,
842 SYSC_QUIRK_RESOURCE_PROVIDER),
843 SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xffffffff,
844 SYSC_QUIRK_RESOURCE_PROVIDER),
845 SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffffffff,
846 SYSC_QUIRK_RESOURCE_PROVIDER),
847 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff,
848 SYSC_QUIRK_RESOURCE_PROVIDER),
849 SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xffffffff,
850 SYSC_QUIRK_RESOURCE_PROVIDER),
851 SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff,
852 SYSC_QUIRK_RESOURCE_PROVIDER),
853 SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff,
854 SYSC_QUIRK_RESOURCE_PROVIDER),
855 SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff,
856 SYSC_QUIRK_RESOURCE_PROVIDER),
857 SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff,
858 SYSC_QUIRK_RESOURCE_PROVIDER),
860 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */
861 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffffffff,
862 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
863 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
864 SYSC_QUIRK_LEGACY_IDLE),
865 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff,
866 SYSC_QUIRK_LEGACY_IDLE),
867 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
868 SYSC_QUIRK_LEGACY_IDLE),
869 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
870 SYSC_QUIRK_LEGACY_IDLE),
871 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
872 SYSC_QUIRK_LEGACY_IDLE),
873 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
874 SYSC_QUIRK_LEGACY_IDLE),
875 /* Some timers on omap4 and later */
876 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffffffff,
877 SYSC_QUIRK_LEGACY_IDLE),
878 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
879 SYSC_QUIRK_LEGACY_IDLE),
880 /* Uarts on omap4 and later */
881 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffffffff,
882 SYSC_QUIRK_LEGACY_IDLE),
884 /* These devices don't yet suspend properly without legacy setting */
885 SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffffffff,
886 SYSC_QUIRK_LEGACY_IDLE),
887 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xffffffff,
888 SYSC_QUIRK_LEGACY_IDLE),
889 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0d00, 0xffffffff,
890 SYSC_QUIRK_LEGACY_IDLE),
893 SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0),
894 SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
895 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0),
896 SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
897 SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
898 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0),
899 SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0),
900 SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0),
901 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0),
902 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0),
903 SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0),
904 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
905 SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0),
906 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
911 static void sysc_init_revision_quirks(struct sysc *ddata)
913 const struct sysc_revision_quirk *q;
916 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) {
917 q = &sysc_revision_quirks[i];
919 if (q->base && q->base != ddata->module_pa)
922 if (q->rev_offset >= 0 &&
923 q->rev_offset != ddata->offsets[SYSC_REVISION])
926 if (q->sysc_offset >= 0 &&
927 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
930 if (q->syss_offset >= 0 &&
931 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
934 if (q->revision == ddata->revision ||
935 (q->revision & q->revision_mask) ==
936 (ddata->revision & q->revision_mask)) {
937 ddata->name = q->name;
938 ddata->cfg.quirks |= q->quirks;
943 /* At this point the module is configured enough to read the revision */
944 static int sysc_init_module(struct sysc *ddata)
948 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) {
949 ddata->revision = sysc_read_revision(ddata);
953 error = pm_runtime_get_sync(ddata->dev);
955 pm_runtime_put_noidle(ddata->dev);
960 ddata->revision = sysc_read_revision(ddata);
961 pm_runtime_put_sync(ddata->dev);
964 sysc_init_revision_quirks(ddata);
969 static int sysc_init_sysc_mask(struct sysc *ddata)
971 struct device_node *np = ddata->dev->of_node;
975 error = of_property_read_u32(np, "ti,sysc-mask", &val);
980 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
982 ddata->cfg.sysc_val = ddata->cap->sysc_mask;
987 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
990 struct device_node *np = ddata->dev->of_node;
991 struct property *prop;
995 of_property_for_each_u32(np, name, prop, p, val) {
996 if (val >= SYSC_NR_IDLEMODES) {
997 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
1000 *idlemodes |= (1 << val);
1006 static int sysc_init_idlemodes(struct sysc *ddata)
1010 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
1015 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
1024 * Only some devices on omap4 and later have SYSCONFIG reset done
1025 * bit. We can detect this if there is no SYSSTATUS at all, or the
1026 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers
1027 * have multiple bits for the child devices like OHCI and EHCI.
1028 * Depends on SYSC being parsed first.
1030 static int sysc_init_syss_mask(struct sysc *ddata)
1032 struct device_node *np = ddata->dev->of_node;
1036 error = of_property_read_u32(np, "ti,syss-mask", &val);
1038 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
1039 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
1040 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1041 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1046 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1047 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1049 ddata->cfg.syss_mask = val;
1055 * Many child device drivers need to have fck and opt clocks available
1056 * to get the clock rate for device internal configuration etc.
1058 static int sysc_child_add_named_clock(struct sysc *ddata,
1059 struct device *child,
1063 struct clk_lookup *l;
1069 clk = clk_get(child, name);
1076 clk = clk_get(ddata->dev, name);
1080 l = clkdev_create(clk, name, dev_name(child));
1089 static int sysc_child_add_clocks(struct sysc *ddata,
1090 struct device *child)
1094 for (i = 0; i < ddata->nr_clocks; i++) {
1095 error = sysc_child_add_named_clock(ddata,
1097 ddata->clock_roles[i]);
1098 if (error && error != -EEXIST) {
1099 dev_err(ddata->dev, "could not add child clock %s: %i\n",
1100 ddata->clock_roles[i], error);
1109 static struct device_type sysc_device_type = {
1112 static struct sysc *sysc_child_to_parent(struct device *dev)
1114 struct device *parent = dev->parent;
1116 if (!parent || parent->type != &sysc_device_type)
1119 return dev_get_drvdata(parent);
1122 static int __maybe_unused sysc_child_runtime_suspend(struct device *dev)
1127 ddata = sysc_child_to_parent(dev);
1129 error = pm_generic_runtime_suspend(dev);
1133 if (!ddata->enabled)
1136 return sysc_runtime_suspend(ddata->dev);
1139 static int __maybe_unused sysc_child_runtime_resume(struct device *dev)
1144 ddata = sysc_child_to_parent(dev);
1146 if (!ddata->enabled) {
1147 error = sysc_runtime_resume(ddata->dev);
1150 "%s error: %i\n", __func__, error);
1153 return pm_generic_runtime_resume(dev);
1156 #ifdef CONFIG_PM_SLEEP
1157 static int sysc_child_suspend_noirq(struct device *dev)
1162 ddata = sysc_child_to_parent(dev);
1164 dev_dbg(ddata->dev, "%s %s\n", __func__,
1165 ddata->name ? ddata->name : "");
1167 error = pm_generic_suspend_noirq(dev);
1169 dev_err(dev, "%s error at %i: %i\n",
1170 __func__, __LINE__, error);
1175 if (!pm_runtime_status_suspended(dev)) {
1176 error = pm_generic_runtime_suspend(dev);
1178 dev_warn(dev, "%s busy at %i: %i\n",
1179 __func__, __LINE__, error);
1184 error = sysc_runtime_suspend(ddata->dev);
1186 dev_err(dev, "%s error at %i: %i\n",
1187 __func__, __LINE__, error);
1192 ddata->child_needs_resume = true;
1198 static int sysc_child_resume_noirq(struct device *dev)
1203 ddata = sysc_child_to_parent(dev);
1205 dev_dbg(ddata->dev, "%s %s\n", __func__,
1206 ddata->name ? ddata->name : "");
1208 if (ddata->child_needs_resume) {
1209 ddata->child_needs_resume = false;
1211 error = sysc_runtime_resume(ddata->dev);
1214 "%s runtime resume error: %i\n",
1217 error = pm_generic_runtime_resume(dev);
1220 "%s generic runtime resume: %i\n",
1224 return pm_generic_resume_noirq(dev);
1228 struct dev_pm_domain sysc_child_pm_domain = {
1230 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,
1231 sysc_child_runtime_resume,
1233 USE_PLATFORM_PM_SLEEP_OPS
1234 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq,
1235 sysc_child_resume_noirq)
1240 * sysc_legacy_idle_quirk - handle children in omap_device compatible way
1241 * @ddata: device driver data
1242 * @child: child device driver
1244 * Allow idle for child devices as done with _od_runtime_suspend().
1245 * Otherwise many child devices will not idle because of the permanent
1246 * parent usecount set in pm_runtime_irq_safe().
1248 * Note that the long term solution is to just modify the child device
1249 * drivers to not set pm_runtime_irq_safe() and then this can be just
1252 static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
1254 if (!ddata->legacy_mode)
1257 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
1258 dev_pm_domain_set(child, &sysc_child_pm_domain);
1261 static int sysc_notifier_call(struct notifier_block *nb,
1262 unsigned long event, void *device)
1264 struct device *dev = device;
1268 ddata = sysc_child_to_parent(dev);
1273 case BUS_NOTIFY_ADD_DEVICE:
1274 error = sysc_child_add_clocks(ddata, dev);
1277 sysc_legacy_idle_quirk(ddata, dev);
1286 static struct notifier_block sysc_nb = {
1287 .notifier_call = sysc_notifier_call,
1290 /* Device tree configured quirks */
1291 struct sysc_dts_quirk {
1296 static const struct sysc_dts_quirk sysc_dts_quirks[] = {
1297 { .name = "ti,no-idle-on-init",
1298 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, },
1299 { .name = "ti,no-reset-on-init",
1300 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, },
1303 static int sysc_init_dts_quirks(struct sysc *ddata)
1305 struct device_node *np = ddata->dev->of_node;
1306 const struct property *prop;
1310 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
1312 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) {
1313 prop = of_get_property(np, sysc_dts_quirks[i].name, &len);
1317 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
1320 error = of_property_read_u32(np, "ti,sysc-delay-us", &val);
1323 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
1327 ddata->cfg.srst_udelay = (u8)val;
1333 static void sysc_unprepare(struct sysc *ddata)
1337 for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
1338 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
1339 clk_unprepare(ddata->clocks[i]);
1344 * Common sysc register bits found on omap2, also known as type1
1346 static const struct sysc_regbits sysc_regbits_omap2 = {
1347 .dmadisable_shift = -ENODEV,
1354 .autoidle_shift = 0,
1357 static const struct sysc_capabilities sysc_omap2 = {
1358 .type = TI_SYSC_OMAP2,
1359 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1360 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1361 SYSC_OMAP2_AUTOIDLE,
1362 .regbits = &sysc_regbits_omap2,
1365 /* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */
1366 static const struct sysc_capabilities sysc_omap2_timer = {
1367 .type = TI_SYSC_OMAP2_TIMER,
1368 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1369 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1370 SYSC_OMAP2_AUTOIDLE,
1371 .regbits = &sysc_regbits_omap2,
1372 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT,
1376 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2
1377 * with different sidle position
1379 static const struct sysc_regbits sysc_regbits_omap3_sham = {
1380 .dmadisable_shift = -ENODEV,
1381 .midle_shift = -ENODEV,
1383 .clkact_shift = -ENODEV,
1384 .enwkup_shift = -ENODEV,
1386 .autoidle_shift = 0,
1387 .emufree_shift = -ENODEV,
1390 static const struct sysc_capabilities sysc_omap3_sham = {
1391 .type = TI_SYSC_OMAP3_SHAM,
1392 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1393 .regbits = &sysc_regbits_omap3_sham,
1397 * AES register bits found on omap3 and later, a variant of
1398 * sysc_regbits_omap2 with different sidle position
1400 static const struct sysc_regbits sysc_regbits_omap3_aes = {
1401 .dmadisable_shift = -ENODEV,
1402 .midle_shift = -ENODEV,
1404 .clkact_shift = -ENODEV,
1405 .enwkup_shift = -ENODEV,
1407 .autoidle_shift = 0,
1408 .emufree_shift = -ENODEV,
1411 static const struct sysc_capabilities sysc_omap3_aes = {
1412 .type = TI_SYSC_OMAP3_AES,
1413 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1414 .regbits = &sysc_regbits_omap3_aes,
1418 * Common sysc register bits found on omap4, also known as type2
1420 static const struct sysc_regbits sysc_regbits_omap4 = {
1421 .dmadisable_shift = 16,
1424 .clkact_shift = -ENODEV,
1425 .enwkup_shift = -ENODEV,
1428 .autoidle_shift = -ENODEV,
1431 static const struct sysc_capabilities sysc_omap4 = {
1432 .type = TI_SYSC_OMAP4,
1433 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1434 SYSC_OMAP4_SOFTRESET,
1435 .regbits = &sysc_regbits_omap4,
1438 static const struct sysc_capabilities sysc_omap4_timer = {
1439 .type = TI_SYSC_OMAP4_TIMER,
1440 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1441 SYSC_OMAP4_SOFTRESET,
1442 .regbits = &sysc_regbits_omap4,
1446 * Common sysc register bits found on omap4, also known as type3
1448 static const struct sysc_regbits sysc_regbits_omap4_simple = {
1449 .dmadisable_shift = -ENODEV,
1452 .clkact_shift = -ENODEV,
1453 .enwkup_shift = -ENODEV,
1454 .srst_shift = -ENODEV,
1455 .emufree_shift = -ENODEV,
1456 .autoidle_shift = -ENODEV,
1459 static const struct sysc_capabilities sysc_omap4_simple = {
1460 .type = TI_SYSC_OMAP4_SIMPLE,
1461 .regbits = &sysc_regbits_omap4_simple,
1465 * SmartReflex sysc found on omap34xx
1467 static const struct sysc_regbits sysc_regbits_omap34xx_sr = {
1468 .dmadisable_shift = -ENODEV,
1469 .midle_shift = -ENODEV,
1470 .sidle_shift = -ENODEV,
1472 .enwkup_shift = -ENODEV,
1473 .srst_shift = -ENODEV,
1474 .emufree_shift = -ENODEV,
1475 .autoidle_shift = -ENODEV,
1478 static const struct sysc_capabilities sysc_34xx_sr = {
1479 .type = TI_SYSC_OMAP34XX_SR,
1480 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY,
1481 .regbits = &sysc_regbits_omap34xx_sr,
1482 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED |
1483 SYSC_QUIRK_LEGACY_IDLE,
1487 * SmartReflex sysc found on omap36xx and later
1489 static const struct sysc_regbits sysc_regbits_omap36xx_sr = {
1490 .dmadisable_shift = -ENODEV,
1491 .midle_shift = -ENODEV,
1493 .clkact_shift = -ENODEV,
1495 .srst_shift = -ENODEV,
1496 .emufree_shift = -ENODEV,
1497 .autoidle_shift = -ENODEV,
1500 static const struct sysc_capabilities sysc_36xx_sr = {
1501 .type = TI_SYSC_OMAP36XX_SR,
1502 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP,
1503 .regbits = &sysc_regbits_omap36xx_sr,
1504 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE,
1507 static const struct sysc_capabilities sysc_omap4_sr = {
1508 .type = TI_SYSC_OMAP4_SR,
1509 .regbits = &sysc_regbits_omap36xx_sr,
1510 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE,
1514 * McASP register bits found on omap4 and later
1516 static const struct sysc_regbits sysc_regbits_omap4_mcasp = {
1517 .dmadisable_shift = -ENODEV,
1518 .midle_shift = -ENODEV,
1520 .clkact_shift = -ENODEV,
1521 .enwkup_shift = -ENODEV,
1522 .srst_shift = -ENODEV,
1523 .emufree_shift = -ENODEV,
1524 .autoidle_shift = -ENODEV,
1527 static const struct sysc_capabilities sysc_omap4_mcasp = {
1528 .type = TI_SYSC_OMAP4_MCASP,
1529 .regbits = &sysc_regbits_omap4_mcasp,
1533 * FS USB host found on omap4 and later
1535 static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = {
1536 .dmadisable_shift = -ENODEV,
1537 .midle_shift = -ENODEV,
1539 .clkact_shift = -ENODEV,
1541 .srst_shift = -ENODEV,
1542 .emufree_shift = -ENODEV,
1543 .autoidle_shift = -ENODEV,
1546 static const struct sysc_capabilities sysc_omap4_usb_host_fs = {
1547 .type = TI_SYSC_OMAP4_USB_HOST_FS,
1548 .sysc_mask = SYSC_OMAP2_ENAWAKEUP,
1549 .regbits = &sysc_regbits_omap4_usb_host_fs,
1552 static int sysc_init_pdata(struct sysc *ddata)
1554 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
1555 struct ti_sysc_module_data mdata;
1558 if (!pdata || !ddata->legacy_mode)
1561 mdata.name = ddata->legacy_mode;
1562 mdata.module_pa = ddata->module_pa;
1563 mdata.module_size = ddata->module_size;
1564 mdata.offsets = ddata->offsets;
1565 mdata.nr_offsets = SYSC_MAX_REGS;
1566 mdata.cap = ddata->cap;
1567 mdata.cfg = &ddata->cfg;
1569 if (!pdata->init_module)
1572 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie);
1573 if (error == -EEXIST)
1579 static int sysc_init_match(struct sysc *ddata)
1581 const struct sysc_capabilities *cap;
1583 cap = of_device_get_match_data(ddata->dev);
1589 ddata->cfg.quirks |= ddata->cap->mod_quirks;
1594 static void ti_sysc_idle(struct work_struct *work)
1598 ddata = container_of(work, struct sysc, idle_work.work);
1600 if (pm_runtime_active(ddata->dev))
1601 pm_runtime_put_sync(ddata->dev);
1604 static const struct of_device_id sysc_match_table[] = {
1605 { .compatible = "simple-bus", },
1609 static int sysc_probe(struct platform_device *pdev)
1611 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev);
1615 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
1619 ddata->dev = &pdev->dev;
1620 platform_set_drvdata(pdev, ddata);
1622 error = sysc_init_match(ddata);
1626 error = sysc_init_dts_quirks(ddata);
1630 error = sysc_get_clocks(ddata);
1634 error = sysc_map_and_check_registers(ddata);
1638 error = sysc_init_sysc_mask(ddata);
1642 error = sysc_init_idlemodes(ddata);
1646 error = sysc_init_syss_mask(ddata);
1650 error = sysc_init_pdata(ddata);
1654 error = sysc_init_resets(ddata);
1658 pm_runtime_enable(ddata->dev);
1659 error = sysc_init_module(ddata);
1663 error = pm_runtime_get_sync(ddata->dev);
1665 pm_runtime_put_noidle(ddata->dev);
1666 pm_runtime_disable(ddata->dev);
1670 sysc_show_registers(ddata);
1672 ddata->dev->type = &sysc_device_type;
1673 error = of_platform_populate(ddata->dev->of_node, sysc_match_table,
1674 pdata ? pdata->auxdata : NULL,
1679 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
1681 /* At least earlycon won't survive without deferred idle */
1682 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT |
1683 SYSC_QUIRK_NO_RESET_ON_INIT)) {
1684 schedule_delayed_work(&ddata->idle_work, 3000);
1686 pm_runtime_put(&pdev->dev);
1689 if (!of_get_available_child_count(ddata->dev->of_node))
1690 reset_control_assert(ddata->rsts);
1695 pm_runtime_put_sync(&pdev->dev);
1696 pm_runtime_disable(&pdev->dev);
1698 sysc_unprepare(ddata);
1703 static int sysc_remove(struct platform_device *pdev)
1705 struct sysc *ddata = platform_get_drvdata(pdev);
1708 cancel_delayed_work_sync(&ddata->idle_work);
1710 error = pm_runtime_get_sync(ddata->dev);
1712 pm_runtime_put_noidle(ddata->dev);
1713 pm_runtime_disable(ddata->dev);
1717 of_platform_depopulate(&pdev->dev);
1719 pm_runtime_put_sync(&pdev->dev);
1720 pm_runtime_disable(&pdev->dev);
1721 reset_control_assert(ddata->rsts);
1724 sysc_unprepare(ddata);
1729 static const struct of_device_id sysc_match[] = {
1730 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, },
1731 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, },
1732 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, },
1733 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, },
1734 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, },
1735 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, },
1736 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, },
1737 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, },
1738 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, },
1739 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, },
1740 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, },
1741 { .compatible = "ti,sysc-usb-host-fs",
1742 .data = &sysc_omap4_usb_host_fs, },
1745 MODULE_DEVICE_TABLE(of, sysc_match);
1747 static struct platform_driver sysc_driver = {
1748 .probe = sysc_probe,
1749 .remove = sysc_remove,
1752 .of_match_table = sysc_match,
1757 static int __init sysc_init(void)
1759 bus_register_notifier(&platform_bus_type, &sysc_nb);
1761 return platform_driver_register(&sysc_driver);
1763 module_init(sysc_init);
1765 static void __exit sysc_exit(void)
1767 bus_unregister_notifier(&platform_bus_type, &sysc_nb);
1768 platform_driver_unregister(&sysc_driver);
1770 module_exit(sysc_exit);
1772 MODULE_DESCRIPTION("TI sysc interconnect target driver");
1773 MODULE_LICENSE("GPL v2");