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x86/hyperv: Fix hv tsc page based sched_clock for hibernation
[J-linux.git] / arch / x86 / kernel / cpu / mshyperv.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * HyperV  Detection code.
4  *
5  * Copyright (C) 2010, Novell, Inc.
6  * Author : K. Y. Srinivasan <[email protected]>
7  */
8
9 #include <linux/types.h>
10 #include <linux/time.h>
11 #include <linux/clocksource.h>
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/hardirq.h>
15 #include <linux/efi.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/kexec.h>
19 #include <linux/random.h>
20 #include <asm/processor.h>
21 #include <asm/hypervisor.h>
22 #include <asm/hyperv-tlfs.h>
23 #include <asm/mshyperv.h>
24 #include <asm/desc.h>
25 #include <asm/idtentry.h>
26 #include <asm/irq_regs.h>
27 #include <asm/i8259.h>
28 #include <asm/apic.h>
29 #include <asm/timer.h>
30 #include <asm/reboot.h>
31 #include <asm/nmi.h>
32 #include <clocksource/hyperv_timer.h>
33 #include <asm/numa.h>
34 #include <asm/svm.h>
35
36 /* Is Linux running as the root partition? */
37 bool hv_root_partition;
38 /* Is Linux running on nested Microsoft Hypervisor */
39 bool hv_nested;
40 struct ms_hyperv_info ms_hyperv;
41
42 /* Used in modules via hv_do_hypercall(): see arch/x86/include/asm/mshyperv.h */
43 bool hyperv_paravisor_present __ro_after_init;
44 EXPORT_SYMBOL_GPL(hyperv_paravisor_present);
45
46 #if IS_ENABLED(CONFIG_HYPERV)
47 static inline unsigned int hv_get_nested_msr(unsigned int reg)
48 {
49         if (hv_is_sint_msr(reg))
50                 return reg - HV_X64_MSR_SINT0 + HV_X64_MSR_NESTED_SINT0;
51
52         switch (reg) {
53         case HV_X64_MSR_SIMP:
54                 return HV_X64_MSR_NESTED_SIMP;
55         case HV_X64_MSR_SIEFP:
56                 return HV_X64_MSR_NESTED_SIEFP;
57         case HV_X64_MSR_SVERSION:
58                 return HV_X64_MSR_NESTED_SVERSION;
59         case HV_X64_MSR_SCONTROL:
60                 return HV_X64_MSR_NESTED_SCONTROL;
61         case HV_X64_MSR_EOM:
62                 return HV_X64_MSR_NESTED_EOM;
63         default:
64                 return reg;
65         }
66 }
67
68 u64 hv_get_non_nested_msr(unsigned int reg)
69 {
70         u64 value;
71
72         if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present)
73                 hv_ivm_msr_read(reg, &value);
74         else
75                 rdmsrl(reg, value);
76         return value;
77 }
78 EXPORT_SYMBOL_GPL(hv_get_non_nested_msr);
79
80 void hv_set_non_nested_msr(unsigned int reg, u64 value)
81 {
82         if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present) {
83                 hv_ivm_msr_write(reg, value);
84
85                 /* Write proxy bit via wrmsl instruction */
86                 if (hv_is_sint_msr(reg))
87                         wrmsrl(reg, value | 1 << 20);
88         } else {
89                 wrmsrl(reg, value);
90         }
91 }
92 EXPORT_SYMBOL_GPL(hv_set_non_nested_msr);
93
94 u64 hv_get_msr(unsigned int reg)
95 {
96         if (hv_nested)
97                 reg = hv_get_nested_msr(reg);
98
99         return hv_get_non_nested_msr(reg);
100 }
101 EXPORT_SYMBOL_GPL(hv_get_msr);
102
103 void hv_set_msr(unsigned int reg, u64 value)
104 {
105         if (hv_nested)
106                 reg = hv_get_nested_msr(reg);
107
108         hv_set_non_nested_msr(reg, value);
109 }
110 EXPORT_SYMBOL_GPL(hv_set_msr);
111
112 static void (*vmbus_handler)(void);
113 static void (*hv_stimer0_handler)(void);
114 static void (*hv_kexec_handler)(void);
115 static void (*hv_crash_handler)(struct pt_regs *regs);
116
117 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)
118 {
119         struct pt_regs *old_regs = set_irq_regs(regs);
120
121         inc_irq_stat(irq_hv_callback_count);
122         if (vmbus_handler)
123                 vmbus_handler();
124
125         if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
126                 apic_eoi();
127
128         set_irq_regs(old_regs);
129 }
130
131 void hv_setup_vmbus_handler(void (*handler)(void))
132 {
133         vmbus_handler = handler;
134 }
135
136 void hv_remove_vmbus_handler(void)
137 {
138         /* We have no way to deallocate the interrupt gate */
139         vmbus_handler = NULL;
140 }
141
142 /*
143  * Routines to do per-architecture handling of stimer0
144  * interrupts when in Direct Mode
145  */
146 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0)
147 {
148         struct pt_regs *old_regs = set_irq_regs(regs);
149
150         inc_irq_stat(hyperv_stimer0_count);
151         if (hv_stimer0_handler)
152                 hv_stimer0_handler();
153         add_interrupt_randomness(HYPERV_STIMER0_VECTOR);
154         apic_eoi();
155
156         set_irq_regs(old_regs);
157 }
158
159 /* For x86/x64, override weak placeholders in hyperv_timer.c */
160 void hv_setup_stimer0_handler(void (*handler)(void))
161 {
162         hv_stimer0_handler = handler;
163 }
164
165 void hv_remove_stimer0_handler(void)
166 {
167         /* We have no way to deallocate the interrupt gate */
168         hv_stimer0_handler = NULL;
169 }
170
171 void hv_setup_kexec_handler(void (*handler)(void))
172 {
173         hv_kexec_handler = handler;
174 }
175
176 void hv_remove_kexec_handler(void)
177 {
178         hv_kexec_handler = NULL;
179 }
180
181 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
182 {
183         hv_crash_handler = handler;
184 }
185
186 void hv_remove_crash_handler(void)
187 {
188         hv_crash_handler = NULL;
189 }
190
191 #ifdef CONFIG_KEXEC_CORE
192 static void hv_machine_shutdown(void)
193 {
194         if (kexec_in_progress && hv_kexec_handler)
195                 hv_kexec_handler();
196
197         /*
198          * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor
199          * corrupts the old VP Assist Pages and can crash the kexec kernel.
200          */
201         if (kexec_in_progress)
202                 cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE);
203
204         /* The function calls stop_other_cpus(). */
205         native_machine_shutdown();
206
207         /* Disable the hypercall page when there is only 1 active CPU. */
208         if (kexec_in_progress)
209                 hyperv_cleanup();
210 }
211 #endif /* CONFIG_KEXEC_CORE */
212
213 #ifdef CONFIG_CRASH_DUMP
214 static void hv_machine_crash_shutdown(struct pt_regs *regs)
215 {
216         if (hv_crash_handler)
217                 hv_crash_handler(regs);
218
219         /* The function calls crash_smp_send_stop(). */
220         native_machine_crash_shutdown(regs);
221
222         /* Disable the hypercall page when there is only 1 active CPU. */
223         hyperv_cleanup();
224 }
225 #endif /* CONFIG_CRASH_DUMP */
226
227 static u64 hv_ref_counter_at_suspend;
228 static void (*old_save_sched_clock_state)(void);
229 static void (*old_restore_sched_clock_state)(void);
230
231 /*
232  * Hyper-V clock counter resets during hibernation. Save and restore clock
233  * offset during suspend/resume, while also considering the time passed
234  * before suspend. This is to make sure that sched_clock using hv tsc page
235  * based clocksource, proceeds from where it left off during suspend and
236  * it shows correct time for the timestamps of kernel messages after resume.
237  */
238 static void save_hv_clock_tsc_state(void)
239 {
240         hv_ref_counter_at_suspend = hv_read_reference_counter();
241 }
242
243 static void restore_hv_clock_tsc_state(void)
244 {
245         /*
246          * Adjust the offsets used by hv tsc clocksource to
247          * account for the time spent before hibernation.
248          * adjusted value = reference counter (time) at suspend
249          *                - reference counter (time) now.
250          */
251         hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter());
252 }
253
254 /*
255  * Functions to override save_sched_clock_state and restore_sched_clock_state
256  * functions of x86_platform. The Hyper-V clock counter is reset during
257  * suspend-resume and the offset used to measure time needs to be
258  * corrected, post resume.
259  */
260 static void hv_save_sched_clock_state(void)
261 {
262         old_save_sched_clock_state();
263         save_hv_clock_tsc_state();
264 }
265
266 static void hv_restore_sched_clock_state(void)
267 {
268         restore_hv_clock_tsc_state();
269         old_restore_sched_clock_state();
270 }
271
272 static void __init x86_setup_ops_for_tsc_pg_clock(void)
273 {
274         if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE))
275                 return;
276
277         old_save_sched_clock_state = x86_platform.save_sched_clock_state;
278         x86_platform.save_sched_clock_state = hv_save_sched_clock_state;
279
280         old_restore_sched_clock_state = x86_platform.restore_sched_clock_state;
281         x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state;
282 }
283 #endif /* CONFIG_HYPERV */
284
285 static uint32_t  __init ms_hyperv_platform(void)
286 {
287         u32 eax;
288         u32 hyp_signature[3];
289
290         if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
291                 return 0;
292
293         cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
294               &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
295
296         if (eax < HYPERV_CPUID_MIN || eax > HYPERV_CPUID_MAX ||
297             memcmp("Microsoft Hv", hyp_signature, 12))
298                 return 0;
299
300         /* HYPERCALL and VP_INDEX MSRs are mandatory for all features. */
301         eax = cpuid_eax(HYPERV_CPUID_FEATURES);
302         if (!(eax & HV_MSR_HYPERCALL_AVAILABLE)) {
303                 pr_warn("x86/hyperv: HYPERCALL MSR not available.\n");
304                 return 0;
305         }
306         if (!(eax & HV_MSR_VP_INDEX_AVAILABLE)) {
307                 pr_warn("x86/hyperv: VP_INDEX MSR not available.\n");
308                 return 0;
309         }
310
311         return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
312 }
313
314 #ifdef CONFIG_X86_LOCAL_APIC
315 /*
316  * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
317  * it difficult to process CHANNELMSG_UNLOAD in case of crash. Handle
318  * unknown NMI on the first CPU which gets it.
319  */
320 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
321 {
322         static atomic_t nmi_cpu = ATOMIC_INIT(-1);
323         unsigned int old_cpu, this_cpu;
324
325         if (!unknown_nmi_panic)
326                 return NMI_DONE;
327
328         old_cpu = -1;
329         this_cpu = raw_smp_processor_id();
330         if (!atomic_try_cmpxchg(&nmi_cpu, &old_cpu, this_cpu))
331                 return NMI_HANDLED;
332
333         return NMI_DONE;
334 }
335 #endif
336
337 static unsigned long hv_get_tsc_khz(void)
338 {
339         unsigned long freq;
340
341         rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
342
343         return freq / 1000;
344 }
345
346 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
347 static void __init hv_smp_prepare_boot_cpu(void)
348 {
349         native_smp_prepare_boot_cpu();
350 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
351         hv_init_spinlocks();
352 #endif
353 }
354
355 static void __init hv_smp_prepare_cpus(unsigned int max_cpus)
356 {
357 #ifdef CONFIG_X86_64
358         int i;
359         int ret;
360 #endif
361
362         native_smp_prepare_cpus(max_cpus);
363
364         /*
365          *  Override wakeup_secondary_cpu_64 callback for SEV-SNP
366          *  enlightened guest.
367          */
368         if (!ms_hyperv.paravisor_present && hv_isolation_type_snp()) {
369                 apic->wakeup_secondary_cpu_64 = hv_snp_boot_ap;
370                 return;
371         }
372
373 #ifdef CONFIG_X86_64
374         for_each_present_cpu(i) {
375                 if (i == 0)
376                         continue;
377                 ret = hv_call_add_logical_proc(numa_cpu_node(i), i, cpu_physical_id(i));
378                 BUG_ON(ret);
379         }
380
381         for_each_present_cpu(i) {
382                 if (i == 0)
383                         continue;
384                 ret = hv_call_create_vp(numa_cpu_node(i), hv_current_partition_id, i, i);
385                 BUG_ON(ret);
386         }
387 #endif
388 }
389 #endif
390
391 /*
392  * When a fully enlightened TDX VM runs on Hyper-V, the firmware sets the
393  * HW_REDUCED flag: refer to acpi_tb_create_local_fadt(). Consequently ttyS0
394  * interrupts can't work because request_irq() -> ... -> irq_to_desc() returns
395  * NULL for ttyS0. This happens because mp_config_acpi_legacy_irqs() sees a
396  * nr_legacy_irqs() of 0, so it doesn't initialize the array 'mp_irqs[]', and
397  * later setup_IO_APIC_irqs() -> find_irq_entry() fails to find the legacy irqs
398  * from the array and hence doesn't create the necessary irq description info.
399  *
400  * Clone arch/x86/kernel/acpi/boot.c: acpi_generic_reduced_hw_init() here,
401  * except don't change 'legacy_pic', which keeps its default value
402  * 'default_legacy_pic'. This way, mp_config_acpi_legacy_irqs() sees a non-zero
403  * nr_legacy_irqs() and eventually serial console interrupts works properly.
404  */
405 static void __init reduced_hw_init(void)
406 {
407         x86_init.timers.timer_init      = x86_init_noop;
408         x86_init.irqs.pre_vector_init   = x86_init_noop;
409 }
410
411 int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
412 {
413         unsigned int hv_max_functions;
414
415         hv_max_functions = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
416         if (hv_max_functions < HYPERV_CPUID_VERSION) {
417                 pr_err("%s: Could not detect Hyper-V version\n", __func__);
418                 return -ENODEV;
419         }
420
421         cpuid(HYPERV_CPUID_VERSION, &info->eax, &info->ebx, &info->ecx, &info->edx);
422
423         return 0;
424 }
425
426 static void __init ms_hyperv_init_platform(void)
427 {
428         int hv_max_functions_eax;
429
430 #ifdef CONFIG_PARAVIRT
431         pv_info.name = "Hyper-V";
432 #endif
433
434         /*
435          * Extract the features and hints
436          */
437         ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
438         ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES);
439         ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
440         ms_hyperv.hints    = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
441
442         hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
443
444         pr_info("Hyper-V: privilege flags low 0x%x, high 0x%x, hints 0x%x, misc 0x%x\n",
445                 ms_hyperv.features, ms_hyperv.priv_high, ms_hyperv.hints,
446                 ms_hyperv.misc_features);
447
448         ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
449         ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
450
451         pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
452                  ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
453
454         /*
455          * Check CPU management privilege.
456          *
457          * To mirror what Windows does we should extract CPU management
458          * features and use the ReservedIdentityBit to detect if Linux is the
459          * root partition. But that requires negotiating CPU management
460          * interface (a process to be finalized). For now, use the privilege
461          * flag as the indicator for running as root.
462          *
463          * Hyper-V should never specify running as root and as a Confidential
464          * VM. But to protect against a compromised/malicious Hyper-V trying
465          * to exploit root behavior to expose Confidential VM memory, ignore
466          * the root partition setting if also a Confidential VM.
467          */
468         if ((ms_hyperv.priv_high & HV_CPU_MANAGEMENT) &&
469             !(ms_hyperv.priv_high & HV_ISOLATION)) {
470                 hv_root_partition = true;
471                 pr_info("Hyper-V: running as root partition\n");
472         }
473
474         if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
475                 hv_nested = true;
476                 pr_info("Hyper-V: running on a nested hypervisor\n");
477         }
478
479         if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
480             ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
481                 x86_platform.calibrate_tsc = hv_get_tsc_khz;
482                 x86_platform.calibrate_cpu = hv_get_tsc_khz;
483                 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
484         }
485
486         if (ms_hyperv.priv_high & HV_ISOLATION) {
487                 ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG);
488                 ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG);
489
490                 if (ms_hyperv.shared_gpa_boundary_active)
491                         ms_hyperv.shared_gpa_boundary =
492                                 BIT_ULL(ms_hyperv.shared_gpa_boundary_bits);
493
494                 hyperv_paravisor_present = !!ms_hyperv.paravisor_present;
495
496                 pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n",
497                         ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b);
498
499
500                 if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) {
501                         static_branch_enable(&isolation_type_snp);
502                 } else if (hv_get_isolation_type() == HV_ISOLATION_TYPE_TDX) {
503                         static_branch_enable(&isolation_type_tdx);
504
505                         /* A TDX VM must use x2APIC and doesn't use lazy EOI. */
506                         ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED;
507
508                         if (!ms_hyperv.paravisor_present) {
509                                 /*
510                                  * Mark the Hyper-V TSC page feature as disabled
511                                  * in a TDX VM without paravisor so that the
512                                  * Invariant TSC, which is a better clocksource
513                                  * anyway, is used instead.
514                                  */
515                                 ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE;
516
517                                 /*
518                                  * The Invariant TSC is expected to be available
519                                  * in a TDX VM without paravisor, but if not,
520                                  * print a warning message. The slower Hyper-V MSR-based
521                                  * Ref Counter should end up being the clocksource.
522                                  */
523                                 if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT))
524                                         pr_warn("Hyper-V: Invariant TSC is unavailable\n");
525
526                                 /* HV_MSR_CRASH_CTL is unsupported. */
527                                 ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
528
529                                 /* Don't trust Hyper-V's TLB-flushing hypercalls. */
530                                 ms_hyperv.hints &= ~HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
531
532                                 x86_init.acpi.reduced_hw_early_init = reduced_hw_init;
533                         }
534                 }
535         }
536
537         if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
538                 ms_hyperv.nested_features =
539                         cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
540                 pr_info("Hyper-V: Nested features: 0x%x\n",
541                         ms_hyperv.nested_features);
542         }
543
544 #ifdef CONFIG_X86_LOCAL_APIC
545         if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
546             ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
547                 /*
548                  * Get the APIC frequency.
549                  */
550                 u64     hv_lapic_frequency;
551
552                 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
553                 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
554                 lapic_timer_period = hv_lapic_frequency;
555                 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
556                         lapic_timer_period);
557         }
558
559         register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
560                              "hv_nmi_unknown");
561 #endif
562
563 #ifdef CONFIG_X86_IO_APIC
564         no_timer_check = 1;
565 #endif
566
567 #if IS_ENABLED(CONFIG_HYPERV)
568 #if defined(CONFIG_KEXEC_CORE)
569         machine_ops.shutdown = hv_machine_shutdown;
570 #endif
571 #if defined(CONFIG_CRASH_DUMP)
572         machine_ops.crash_shutdown = hv_machine_crash_shutdown;
573 #endif
574 #endif
575         if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) {
576                 /*
577                  * Writing to synthetic MSR 0x40000118 updates/changes the
578                  * guest visible CPUIDs. Setting bit 0 of this MSR  enables
579                  * guests to report invariant TSC feature through CPUID
580                  * instruction, CPUID 0x800000007/EDX, bit 8. See code in
581                  * early_init_intel() where this bit is examined. The
582                  * setting of this MSR bit should happen before init_intel()
583                  * is called.
584                  */
585                 wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC);
586                 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
587         }
588
589         /*
590          * Generation 2 instances don't support reading the NMI status from
591          * 0x61 port.
592          */
593         if (efi_enabled(EFI_BOOT))
594                 x86_platform.get_nmi_reason = hv_get_nmi_reason;
595
596 #if IS_ENABLED(CONFIG_HYPERV)
597         if ((hv_get_isolation_type() == HV_ISOLATION_TYPE_VBS) ||
598             ms_hyperv.paravisor_present)
599                 hv_vtom_init();
600         /*
601          * Setup the hook to get control post apic initialization.
602          */
603         x86_platform.apic_post_init = hyperv_init;
604         hyperv_setup_mmu_ops();
605
606         /* Install system interrupt handler for hypervisor callback */
607         sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback);
608
609         /* Install system interrupt handler for reenlightenment notifications */
610         if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) {
611                 sysvec_install(HYPERV_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment);
612         }
613
614         /* Install system interrupt handler for stimer0 */
615         if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) {
616                 sysvec_install(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0);
617         }
618
619 # ifdef CONFIG_SMP
620         smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
621         if (hv_root_partition ||
622             (!ms_hyperv.paravisor_present && hv_isolation_type_snp()))
623                 smp_ops.smp_prepare_cpus = hv_smp_prepare_cpus;
624 # endif
625
626         /*
627          * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
628          * set x2apic destination mode to physical mode when x2apic is available
629          * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
630          * have 8-bit APIC id.
631          */
632 # ifdef CONFIG_X86_X2APIC
633         if (x2apic_supported())
634                 x2apic_phys = 1;
635 # endif
636
637         /* Register Hyper-V specific clocksource */
638         hv_init_clocksource();
639         x86_setup_ops_for_tsc_pg_clock();
640         hv_vtl_init_platform();
641 #endif
642         /*
643          * TSC should be marked as unstable only after Hyper-V
644          * clocksource has been initialized. This ensures that the
645          * stability of the sched_clock is not altered.
646          */
647         if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT))
648                 mark_tsc_unstable("running on Hyper-V");
649
650         hardlockup_detector_disable();
651 }
652
653 static bool __init ms_hyperv_x2apic_available(void)
654 {
655         return x2apic_supported();
656 }
657
658 /*
659  * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping()
660  * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the
661  * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg().
662  *
663  * Note: for a VM on Hyper-V, the I/O-APIC is the only device which
664  * (logically) generates MSIs directly to the system APIC irq domain.
665  * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the
666  * pci-hyperv host bridge.
667  *
668  * Note: for a Hyper-V root partition, this will always return false.
669  * The hypervisor doesn't expose these HYPERV_CPUID_VIRT_STACK_* cpuids by
670  * default, they are implemented as intercepts by the Windows Hyper-V stack.
671  * Even a nested root partition (L2 root) will not get them because the
672  * nested (L1) hypervisor filters them out.
673  */
674 static bool __init ms_hyperv_msi_ext_dest_id(void)
675 {
676         u32 eax;
677
678         eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_INTERFACE);
679         if (eax != HYPERV_VS_INTERFACE_EAX_SIGNATURE)
680                 return false;
681
682         eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES);
683         return eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE;
684 }
685
686 #ifdef CONFIG_AMD_MEM_ENCRYPT
687 static void hv_sev_es_hcall_prepare(struct ghcb *ghcb, struct pt_regs *regs)
688 {
689         /* RAX and CPL are already in the GHCB */
690         ghcb_set_rcx(ghcb, regs->cx);
691         ghcb_set_rdx(ghcb, regs->dx);
692         ghcb_set_r8(ghcb, regs->r8);
693 }
694
695 static bool hv_sev_es_hcall_finish(struct ghcb *ghcb, struct pt_regs *regs)
696 {
697         /* No checking of the return state needed */
698         return true;
699 }
700 #endif
701
702 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
703         .name                   = "Microsoft Hyper-V",
704         .detect                 = ms_hyperv_platform,
705         .type                   = X86_HYPER_MS_HYPERV,
706         .init.x2apic_available  = ms_hyperv_x2apic_available,
707         .init.msi_ext_dest_id   = ms_hyperv_msi_ext_dest_id,
708         .init.init_platform     = ms_hyperv_init_platform,
709         .init.guest_late_init   = ms_hyperv_late_init,
710 #ifdef CONFIG_AMD_MEM_ENCRYPT
711         .runtime.sev_es_hcall_prepare = hv_sev_es_hcall_prepare,
712         .runtime.sev_es_hcall_finish = hv_sev_es_hcall_finish,
713 #endif
714 };
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