drivers/net/phy/phylink.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * phylink models the MAC to optional PHY connection, supporting
   4  * technologies such as SFP cages where the PHY is hot-pluggable.
   5  *
   6  * Copyright (C) 2015 Russell King
   7  */
   8 #include <linux/acpi.h>
   9 #include <linux/ethtool.h>
  10 #include <linux/export.h>
  11 #include <linux/gpio/consumer.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/of.h>
  14 #include <linux/of_mdio.h>
  15 #include <linux/phy.h>
  16 #include <linux/phy_fixed.h>
  17 #include <linux/phylink.h>
  18 #include <linux/rtnetlink.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/timer.h>
  21 #include <linux/workqueue.h>
  22
  23 #include "sfp.h"
  24 #include "swphy.h"
  25
  26 #define SUPPORTED_INTERFACES \
  27         (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
  28          SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
  29 #define ADVERTISED_INTERFACES \
  30         (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
  31          ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
  32
  33 enum {
  34         PHYLINK_DISABLE_STOPPED,
  35         PHYLINK_DISABLE_LINK,
  36         PHYLINK_DISABLE_MAC_WOL,
  37
  38         PCS_STATE_DOWN = 0,
  39         PCS_STATE_STARTING,
  40         PCS_STATE_STARTED,
  41 };
  42
  43 /**
  44  * struct phylink - internal data type for phylink
  45  */
  46 struct phylink {
  47         /* private: */
  48         struct net_device *netdev;
  49         const struct phylink_mac_ops *mac_ops;
  50         struct phylink_config *config;
  51         struct phylink_pcs *pcs;
  52         struct device *dev;
  53         unsigned int old_link_state:1;
  54
  55         unsigned long phylink_disable_state; /* bitmask of disables */
  56         struct phy_device *phydev;
  57         phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
  58         u8 cfg_link_an_mode;            /* MLO_AN_xxx */
  59         u8 cur_link_an_mode;
  60         u8 link_port;                   /* The current non-phy ethtool port */
  61         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  62
  63         /* The link configuration settings */
  64         struct phylink_link_state link_config;
  65
  66         /* The current settings */
  67         phy_interface_t cur_interface;
  68
  69         struct gpio_desc *link_gpio;
  70         unsigned int link_irq;
  71         struct timer_list link_poll;
  72         void (*get_fixed_state)(struct net_device *dev,
  73                                 struct phylink_link_state *s);
  74
  75         struct mutex state_mutex;
  76         struct phylink_link_state phy_state;
  77         struct work_struct resolve;
  78         unsigned int pcs_neg_mode;
  79         unsigned int pcs_state;
  80
  81         bool mac_link_dropped;
  82         bool using_mac_select_pcs;
  83
  84         struct sfp_bus *sfp_bus;
  85         bool sfp_may_have_phy;
  86         DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
  87         __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
  88         u8 sfp_port;
  89 };
  90
  91 #define phylink_printk(level, pl, fmt, ...) \
  92         do { \
  93                 if ((pl)->config->type == PHYLINK_NETDEV) \
  94                         netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
  95                 else if ((pl)->config->type == PHYLINK_DEV) \
  96                         dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
  97         } while (0)
  98
  99 #define phylink_err(pl, fmt, ...) \
 100         phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
 101 #define phylink_warn(pl, fmt, ...) \
 102         phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
 103 #define phylink_info(pl, fmt, ...) \
 104         phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
 105 #if defined(CONFIG_DYNAMIC_DEBUG)
 106 #define phylink_dbg(pl, fmt, ...) \
 107 do {                                                                    \
 108         if ((pl)->config->type == PHYLINK_NETDEV)                       \
 109                 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);           \
 110         else if ((pl)->config->type == PHYLINK_DEV)                     \
 111                 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);                 \
 112 } while (0)
 113 #elif defined(DEBUG)
 114 #define phylink_dbg(pl, fmt, ...)                                       \
 115         phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
 116 #else
 117 #define phylink_dbg(pl, fmt, ...)                                       \
 118 ({                                                                      \
 119         if (0)                                                          \
 120                 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);     \
 121 })
 122 #endif
 123
 124 /**
 125  * phylink_set_port_modes() - set the port type modes in the ethtool mask
 126  * @mask: ethtool link mode mask
 127  *
 128  * Sets all the port type modes in the ethtool mask.  MAC drivers should
 129  * use this in their 'validate' callback.
 130  */
 131 void phylink_set_port_modes(unsigned long *mask)
 132 {
 133         phylink_set(mask, TP);
 134         phylink_set(mask, AUI);
 135         phylink_set(mask, MII);
 136         phylink_set(mask, FIBRE);
 137         phylink_set(mask, BNC);
 138         phylink_set(mask, Backplane);
 139 }
 140 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
 141
 142 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
 143 {
 144         __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
 145
 146         phylink_set_port_modes(tmp);
 147         phylink_set(tmp, Autoneg);
 148         phylink_set(tmp, Pause);
 149         phylink_set(tmp, Asym_Pause);
 150
 151         return linkmode_subset(linkmode, tmp);
 152 }
 153
 154 static const char *phylink_an_mode_str(unsigned int mode)
 155 {
 156         static const char *modestr[] = {
 157                 [MLO_AN_PHY] = "phy",
 158                 [MLO_AN_FIXED] = "fixed",
 159                 [MLO_AN_INBAND] = "inband",
 160         };
 161
 162         return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
 163 }
 164
 165 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
 166 {
 167         switch (interface) {
 168         case PHY_INTERFACE_MODE_SGMII:
 169         case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
 170                 return 1250;
 171         case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
 172                 return 3125;
 173         case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
 174                 return 5156;
 175         case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
 176                 return 10313;
 177         default:
 178                 return 0;
 179         }
 180 }
 181
 182 /**
 183  * phylink_interface_max_speed() - get the maximum speed of a phy interface
 184  * @interface: phy interface mode defined by &typedef phy_interface_t
 185  *
 186  * Determine the maximum speed of a phy interface. This is intended to help
 187  * determine the correct speed to pass to the MAC when the phy is performing
 188  * rate matching.
 189  *
 190  * Return: The maximum speed of @interface
 191  */
 192 static int phylink_interface_max_speed(phy_interface_t interface)
 193 {
 194         switch (interface) {
 195         case PHY_INTERFACE_MODE_100BASEX:
 196         case PHY_INTERFACE_MODE_REVRMII:
 197         case PHY_INTERFACE_MODE_RMII:
 198         case PHY_INTERFACE_MODE_SMII:
 199         case PHY_INTERFACE_MODE_REVMII:
 200         case PHY_INTERFACE_MODE_MII:
 201                 return SPEED_100;
 202
 203         case PHY_INTERFACE_MODE_TBI:
 204         case PHY_INTERFACE_MODE_MOCA:
 205         case PHY_INTERFACE_MODE_RTBI:
 206         case PHY_INTERFACE_MODE_1000BASEX:
 207         case PHY_INTERFACE_MODE_1000BASEKX:
 208         case PHY_INTERFACE_MODE_TRGMII:
 209         case PHY_INTERFACE_MODE_RGMII_TXID:
 210         case PHY_INTERFACE_MODE_RGMII_RXID:
 211         case PHY_INTERFACE_MODE_RGMII_ID:
 212         case PHY_INTERFACE_MODE_RGMII:
 213         case PHY_INTERFACE_MODE_PSGMII:
 214         case PHY_INTERFACE_MODE_QSGMII:
 215         case PHY_INTERFACE_MODE_QUSGMII:
 216         case PHY_INTERFACE_MODE_SGMII:
 217         case PHY_INTERFACE_MODE_GMII:
 218                 return SPEED_1000;
 219
 220         case PHY_INTERFACE_MODE_2500BASEX:
 221                 return SPEED_2500;
 222
 223         case PHY_INTERFACE_MODE_5GBASER:
 224                 return SPEED_5000;
 225
 226         case PHY_INTERFACE_MODE_XGMII:
 227         case PHY_INTERFACE_MODE_RXAUI:
 228         case PHY_INTERFACE_MODE_XAUI:
 229         case PHY_INTERFACE_MODE_10GBASER:
 230         case PHY_INTERFACE_MODE_10GKR:
 231         case PHY_INTERFACE_MODE_USXGMII:
 232                 return SPEED_10000;
 233
 234         case PHY_INTERFACE_MODE_25GBASER:
 235                 return SPEED_25000;
 236
 237         case PHY_INTERFACE_MODE_XLGMII:
 238                 return SPEED_40000;
 239
 240         case PHY_INTERFACE_MODE_INTERNAL:
 241         case PHY_INTERFACE_MODE_NA:
 242         case PHY_INTERFACE_MODE_MAX:
 243                 /* No idea! Garbage in, unknown out */
 244                 return SPEED_UNKNOWN;
 245         }
 246
 247         /* If we get here, someone forgot to add an interface mode above */
 248         WARN_ON_ONCE(1);
 249         return SPEED_UNKNOWN;
 250 }
 251
 252 /**
 253  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
 254  * @linkmodes: ethtool linkmode mask (must be already initialised)
 255  * @caps: bitmask of MAC capabilities
 256  *
 257  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
 258  * supported by the @caps. @linkmodes must have been initialised previously.
 259  */
 260 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
 261                                       unsigned long caps)
 262 {
 263         if (caps & MAC_SYM_PAUSE)
 264                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
 265
 266         if (caps & MAC_ASYM_PAUSE)
 267                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
 268
 269         if (caps & MAC_10HD) {
 270                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
 271                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
 272                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
 273         }
 274
 275         if (caps & MAC_10FD) {
 276                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
 277                 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
 278                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
 279         }
 280
 281         if (caps & MAC_100HD) {
 282                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
 283                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
 284         }
 285
 286         if (caps & MAC_100FD) {
 287                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
 288                 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
 289                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
 290         }
 291
 292         if (caps & MAC_1000HD)
 293                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
 294
 295         if (caps & MAC_1000FD) {
 296                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
 297                 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
 298                 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
 299                 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
 300         }
 301
 302         if (caps & MAC_2500FD) {
 303                 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
 304                 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
 305         }
 306
 307         if (caps & MAC_5000FD)
 308                 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
 309
 310         if (caps & MAC_10000FD) {
 311                 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
 312                 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
 313                 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
 314                 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
 315                 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
 316                 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
 317                 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
 318                 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
 319                 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
 320         }
 321
 322         if (caps & MAC_25000FD) {
 323                 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
 324                 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
 325                 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
 326         }
 327
 328         if (caps & MAC_40000FD) {
 329                 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
 330                 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
 331                 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
 332                 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
 333         }
 334
 335         if (caps & MAC_50000FD) {
 336                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
 337                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
 338                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
 339                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
 340                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
 341                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
 342                 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 343                           linkmodes);
 344                 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
 345         }
 346
 347         if (caps & MAC_56000FD) {
 348                 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
 349                 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
 350                 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
 351                 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
 352         }
 353
 354         if (caps & MAC_100000FD) {
 355                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
 356                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
 357                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
 358                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
 359                           linkmodes);
 360                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
 361                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
 362                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
 363                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 364                           linkmodes);
 365                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
 366                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
 367                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
 368                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 369                           linkmodes);
 370                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
 371                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
 372         }
 373
 374         if (caps & MAC_200000FD) {
 375                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
 376                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
 377                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 378                           linkmodes);
 379                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
 380                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
 381                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
 382                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
 383                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 384                           linkmodes);
 385                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
 386                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
 387         }
 388
 389         if (caps & MAC_400000FD) {
 390                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
 391                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
 392                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
 393                           linkmodes);
 394                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
 395                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
 396                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
 397                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
 398                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 399                           linkmodes);
 400                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
 401                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
 402         }
 403 }
 404
 405 static struct {
 406         unsigned long mask;
 407         int speed;
 408         unsigned int duplex;
 409 } phylink_caps_params[] = {
 410         { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
 411         { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
 412         { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
 413         { MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
 414         { MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
 415         { MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
 416         { MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
 417         { MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
 418         { MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
 419         { MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
 420         { MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
 421         { MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
 422         { MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
 423         { MAC_100FD,    SPEED_100,    DUPLEX_FULL },
 424         { MAC_100HD,    SPEED_100,    DUPLEX_HALF },
 425         { MAC_10FD,     SPEED_10,     DUPLEX_FULL },
 426         { MAC_10HD,     SPEED_10,     DUPLEX_HALF },
 427 };
 428
 429 /**
 430  * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
 431  * @config: pointer to a &struct phylink_config
 432  * @max_speed: maximum speed
 433  *
 434  * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
 435  * Any further motifications of config.mac_capabilities will override this.
 436  */
 437 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
 438 {
 439         int i;
 440
 441         for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
 442                     phylink_caps_params[i].speed > max_speed; i++)
 443                 config->mac_capabilities &= ~phylink_caps_params[i].mask;
 444 }
 445 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
 446
 447 /**
 448  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
 449  * @speed: the speed to search for
 450  * @duplex: the duplex to search for
 451  *
 452  * Find the mac capability for a given speed and duplex.
 453  *
 454  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
 455  *         there were no matches.
 456  */
 457 static unsigned long phylink_cap_from_speed_duplex(int speed,
 458                                                    unsigned int duplex)
 459 {
 460         int i;
 461
 462         for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
 463                 if (speed == phylink_caps_params[i].speed &&
 464                     duplex == phylink_caps_params[i].duplex)
 465                         return phylink_caps_params[i].mask;
 466         }
 467
 468         return 0;
 469 }
 470
 471 /**
 472  * phylink_get_capabilities() - get capabilities for a given MAC
 473  * @interface: phy interface mode defined by &typedef phy_interface_t
 474  * @mac_capabilities: bitmask of MAC capabilities
 475  * @rate_matching: type of rate matching being performed
 476  *
 477  * Get the MAC capabilities that are supported by the @interface mode and
 478  * @mac_capabilities.
 479  */
 480 static unsigned long phylink_get_capabilities(phy_interface_t interface,
 481                                               unsigned long mac_capabilities,
 482                                               int rate_matching)
 483 {
 484         int max_speed = phylink_interface_max_speed(interface);
 485         unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
 486         unsigned long matched_caps = 0;
 487
 488         switch (interface) {
 489         case PHY_INTERFACE_MODE_USXGMII:
 490                 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
 491                 fallthrough;
 492
 493         case PHY_INTERFACE_MODE_RGMII_TXID:
 494         case PHY_INTERFACE_MODE_RGMII_RXID:
 495         case PHY_INTERFACE_MODE_RGMII_ID:
 496         case PHY_INTERFACE_MODE_RGMII:
 497         case PHY_INTERFACE_MODE_PSGMII:
 498         case PHY_INTERFACE_MODE_QSGMII:
 499         case PHY_INTERFACE_MODE_QUSGMII:
 500         case PHY_INTERFACE_MODE_SGMII:
 501         case PHY_INTERFACE_MODE_GMII:
 502                 caps |= MAC_1000HD | MAC_1000FD;
 503                 fallthrough;
 504
 505         case PHY_INTERFACE_MODE_REVRMII:
 506         case PHY_INTERFACE_MODE_RMII:
 507         case PHY_INTERFACE_MODE_SMII:
 508         case PHY_INTERFACE_MODE_REVMII:
 509         case PHY_INTERFACE_MODE_MII:
 510                 caps |= MAC_10HD | MAC_10FD;
 511                 fallthrough;
 512
 513         case PHY_INTERFACE_MODE_100BASEX:
 514                 caps |= MAC_100HD | MAC_100FD;
 515                 break;
 516
 517         case PHY_INTERFACE_MODE_TBI:
 518         case PHY_INTERFACE_MODE_MOCA:
 519         case PHY_INTERFACE_MODE_RTBI:
 520         case PHY_INTERFACE_MODE_1000BASEX:
 521                 caps |= MAC_1000HD;
 522                 fallthrough;
 523         case PHY_INTERFACE_MODE_1000BASEKX:
 524         case PHY_INTERFACE_MODE_TRGMII:
 525                 caps |= MAC_1000FD;
 526                 break;
 527
 528         case PHY_INTERFACE_MODE_2500BASEX:
 529                 caps |= MAC_2500FD;
 530                 break;
 531
 532         case PHY_INTERFACE_MODE_5GBASER:
 533                 caps |= MAC_5000FD;
 534                 break;
 535
 536         case PHY_INTERFACE_MODE_XGMII:
 537         case PHY_INTERFACE_MODE_RXAUI:
 538         case PHY_INTERFACE_MODE_XAUI:
 539         case PHY_INTERFACE_MODE_10GBASER:
 540         case PHY_INTERFACE_MODE_10GKR:
 541                 caps |= MAC_10000FD;
 542                 break;
 543
 544         case PHY_INTERFACE_MODE_25GBASER:
 545                 caps |= MAC_25000FD;
 546                 break;
 547
 548         case PHY_INTERFACE_MODE_XLGMII:
 549                 caps |= MAC_40000FD;
 550                 break;
 551
 552         case PHY_INTERFACE_MODE_INTERNAL:
 553                 caps |= ~0;
 554                 break;
 555
 556         case PHY_INTERFACE_MODE_NA:
 557         case PHY_INTERFACE_MODE_MAX:
 558                 break;
 559         }
 560
 561         switch (rate_matching) {
 562         case RATE_MATCH_OPEN_LOOP:
 563                 /* TODO */
 564                 fallthrough;
 565         case RATE_MATCH_NONE:
 566                 matched_caps = 0;
 567                 break;
 568         case RATE_MATCH_PAUSE: {
 569                 /* The MAC must support asymmetric pause towards the local
 570                  * device for this. We could allow just symmetric pause, but
 571                  * then we might have to renegotiate if the link partner
 572                  * doesn't support pause. This is because there's no way to
 573                  * accept pause frames without transmitting them if we only
 574                  * support symmetric pause.
 575                  */
 576                 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
 577                     !(mac_capabilities & MAC_ASYM_PAUSE))
 578                         break;
 579
 580                 /* We can't adapt if the MAC doesn't support the interface's
 581                  * max speed at full duplex.
 582                  */
 583                 if (mac_capabilities &
 584                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
 585                         /* Although a duplex-matching phy might exist, we
 586                          * conservatively remove these modes because the MAC
 587                          * will not be aware of the half-duplex nature of the
 588                          * link.
 589                          */
 590                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 591                         matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
 592                 }
 593                 break;
 594         }
 595         case RATE_MATCH_CRS:
 596                 /* The MAC must support half duplex at the interface's max
 597                  * speed.
 598                  */
 599                 if (mac_capabilities &
 600                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
 601                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 602                         matched_caps &= mac_capabilities;
 603                 }
 604                 break;
 605         }
 606
 607         return (caps & mac_capabilities) | matched_caps;
 608 }
 609
 610 /**
 611  * phylink_validate_mask_caps() - Restrict link modes based on caps
 612  * @supported: ethtool bitmask for supported link modes.
 613  * @state: pointer to a &struct phylink_link_state.
 614  * @mac_capabilities: bitmask of MAC capabilities
 615  *
 616  * Calculate the supported link modes based on @mac_capabilities, and restrict
 617  * @supported and @state based on that. Use this function if your capabiliies
 618  * aren't constant, such as if they vary depending on the interface.
 619  */
 620 static void phylink_validate_mask_caps(unsigned long *supported,
 621                                        struct phylink_link_state *state,
 622                                        unsigned long mac_capabilities)
 623 {
 624         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 625         unsigned long caps;
 626
 627         phylink_set_port_modes(mask);
 628         phylink_set(mask, Autoneg);
 629         caps = phylink_get_capabilities(state->interface, mac_capabilities,
 630                                         state->rate_matching);
 631         phylink_caps_to_linkmodes(mask, caps);
 632
 633         linkmode_and(supported, supported, mask);
 634         linkmode_and(state->advertising, state->advertising, mask);
 635 }
 636
 637 static int phylink_validate_mac_and_pcs(struct phylink *pl,
 638                                         unsigned long *supported,
 639                                         struct phylink_link_state *state)
 640 {
 641         unsigned long capabilities;
 642         struct phylink_pcs *pcs;
 643         int ret;
 644
 645         /* Get the PCS for this interface mode */
 646         if (pl->using_mac_select_pcs) {
 647                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
 648                 if (IS_ERR(pcs))
 649                         return PTR_ERR(pcs);
 650         } else {
 651                 pcs = pl->pcs;
 652         }
 653
 654         if (pcs) {
 655                 /* The PCS, if present, must be setup before phylink_create()
 656                  * has been called. If the ops is not initialised, print an
 657                  * error and backtrace rather than oopsing the kernel.
 658                  */
 659                 if (!pcs->ops) {
 660                         phylink_err(pl, "interface %s: uninitialised PCS\n",
 661                                     phy_modes(state->interface));
 662                         dump_stack();
 663                         return -EINVAL;
 664                 }
 665
 666                 /* Validate the link parameters with the PCS */
 667                 if (pcs->ops->pcs_validate) {
 668                         ret = pcs->ops->pcs_validate(pcs, supported, state);
 669                         if (ret < 0 || phylink_is_empty_linkmode(supported))
 670                                 return -EINVAL;
 671
 672                         /* Ensure the advertising mask is a subset of the
 673                          * supported mask.
 674                          */
 675                         linkmode_and(state->advertising, state->advertising,
 676                                      supported);
 677                 }
 678         }
 679
 680         /* Then validate the link parameters with the MAC */
 681         if (pl->mac_ops->mac_get_caps)
 682                 capabilities = pl->mac_ops->mac_get_caps(pl->config,
 683                                                          state->interface);
 684         else
 685                 capabilities = pl->config->mac_capabilities;
 686
 687         phylink_validate_mask_caps(supported, state, capabilities);
 688
 689         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 690 }
 691
 692 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
 693                                  struct phylink_link_state *state,
 694                                  const unsigned long *interfaces)
 695 {
 696         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
 697         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
 698         __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
 699         struct phylink_link_state t;
 700         int intf;
 701
 702         for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
 703                 if (test_bit(intf, interfaces)) {
 704                         linkmode_copy(s, supported);
 705
 706                         t = *state;
 707                         t.interface = intf;
 708                         if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
 709                                 linkmode_or(all_s, all_s, s);
 710                                 linkmode_or(all_adv, all_adv, t.advertising);
 711                         }
 712                 }
 713         }
 714
 715         linkmode_copy(supported, all_s);
 716         linkmode_copy(state->advertising, all_adv);
 717
 718         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 719 }
 720
 721 static int phylink_validate(struct phylink *pl, unsigned long *supported,
 722                             struct phylink_link_state *state)
 723 {
 724         const unsigned long *interfaces = pl->config->supported_interfaces;
 725
 726         if (state->interface == PHY_INTERFACE_MODE_NA)
 727                 return phylink_validate_mask(pl, supported, state, interfaces);
 728
 729         if (!test_bit(state->interface, interfaces))
 730                 return -EINVAL;
 731
 732         return phylink_validate_mac_and_pcs(pl, supported, state);
 733 }
 734
 735 static int phylink_parse_fixedlink(struct phylink *pl,
 736                                    const struct fwnode_handle *fwnode)
 737 {
 738         struct fwnode_handle *fixed_node;
 739         bool pause, asym_pause, autoneg;
 740         const struct phy_setting *s;
 741         struct gpio_desc *desc;
 742         u32 speed;
 743         int ret;
 744
 745         fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
 746         if (fixed_node) {
 747                 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
 748
 749                 pl->link_config.speed = speed;
 750                 pl->link_config.duplex = DUPLEX_HALF;
 751
 752                 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
 753                         pl->link_config.duplex = DUPLEX_FULL;
 754
 755                 /* We treat the "pause" and "asym-pause" terminology as
 756                  * defining the link partner's ability.
 757                  */
 758                 if (fwnode_property_read_bool(fixed_node, "pause"))
 759                         __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 760                                   pl->link_config.lp_advertising);
 761                 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
 762                         __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 763                                   pl->link_config.lp_advertising);
 764
 765                 if (ret == 0) {
 766                         desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
 767                                                       GPIOD_IN, "?");
 768
 769                         if (!IS_ERR(desc))
 770                                 pl->link_gpio = desc;
 771                         else if (desc == ERR_PTR(-EPROBE_DEFER))
 772                                 ret = -EPROBE_DEFER;
 773                 }
 774                 fwnode_handle_put(fixed_node);
 775
 776                 if (ret)
 777                         return ret;
 778         } else {
 779                 u32 prop[5];
 780
 781                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 782                                                      NULL, 0);
 783                 if (ret != ARRAY_SIZE(prop)) {
 784                         phylink_err(pl, "broken fixed-link?\n");
 785                         return -EINVAL;
 786                 }
 787
 788                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 789                                                      prop, ARRAY_SIZE(prop));
 790                 if (!ret) {
 791                         pl->link_config.duplex = prop[1] ?
 792                                                 DUPLEX_FULL : DUPLEX_HALF;
 793                         pl->link_config.speed = prop[2];
 794                         if (prop[3])
 795                                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 796                                           pl->link_config.lp_advertising);
 797                         if (prop[4])
 798                                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 799                                           pl->link_config.lp_advertising);
 800                 }
 801         }
 802
 803         if (pl->link_config.speed > SPEED_1000 &&
 804             pl->link_config.duplex != DUPLEX_FULL)
 805                 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
 806                              pl->link_config.speed);
 807
 808         bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
 809         linkmode_copy(pl->link_config.advertising, pl->supported);
 810         phylink_validate(pl, pl->supported, &pl->link_config);
 811
 812         pause = phylink_test(pl->supported, Pause);
 813         asym_pause = phylink_test(pl->supported, Asym_Pause);
 814         autoneg = phylink_test(pl->supported, Autoneg);
 815         s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
 816                                pl->supported, true);
 817         linkmode_zero(pl->supported);
 818         phylink_set(pl->supported, MII);
 819
 820         if (pause)
 821                 phylink_set(pl->supported, Pause);
 822
 823         if (asym_pause)
 824                 phylink_set(pl->supported, Asym_Pause);
 825
 826         if (autoneg)
 827                 phylink_set(pl->supported, Autoneg);
 828
 829         if (s) {
 830                 __set_bit(s->bit, pl->supported);
 831                 __set_bit(s->bit, pl->link_config.lp_advertising);
 832         } else {
 833                 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
 834                              pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
 835                              pl->link_config.speed);
 836         }
 837
 838         linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
 839                      pl->supported);
 840
 841         pl->link_config.link = 1;
 842         pl->link_config.an_complete = 1;
 843
 844         return 0;
 845 }
 846
 847 static int phylink_parse_mode(struct phylink *pl,
 848                               const struct fwnode_handle *fwnode)
 849 {
 850         struct fwnode_handle *dn;
 851         const char *managed;
 852
 853         dn = fwnode_get_named_child_node(fwnode, "fixed-link");
 854         if (dn || fwnode_property_present(fwnode, "fixed-link"))
 855                 pl->cfg_link_an_mode = MLO_AN_FIXED;
 856         fwnode_handle_put(dn);
 857
 858         if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
 859              strcmp(managed, "in-band-status") == 0) ||
 860             pl->config->ovr_an_inband) {
 861                 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
 862                         phylink_err(pl,
 863                                     "can't use both fixed-link and in-band-status\n");
 864                         return -EINVAL;
 865                 }
 866
 867                 linkmode_zero(pl->supported);
 868                 phylink_set(pl->supported, MII);
 869                 phylink_set(pl->supported, Autoneg);
 870                 phylink_set(pl->supported, Asym_Pause);
 871                 phylink_set(pl->supported, Pause);
 872                 pl->cfg_link_an_mode = MLO_AN_INBAND;
 873
 874                 switch (pl->link_config.interface) {
 875                 case PHY_INTERFACE_MODE_SGMII:
 876                 case PHY_INTERFACE_MODE_PSGMII:
 877                 case PHY_INTERFACE_MODE_QSGMII:
 878                 case PHY_INTERFACE_MODE_QUSGMII:
 879                 case PHY_INTERFACE_MODE_RGMII:
 880                 case PHY_INTERFACE_MODE_RGMII_ID:
 881                 case PHY_INTERFACE_MODE_RGMII_RXID:
 882                 case PHY_INTERFACE_MODE_RGMII_TXID:
 883                 case PHY_INTERFACE_MODE_RTBI:
 884                         phylink_set(pl->supported, 10baseT_Half);
 885                         phylink_set(pl->supported, 10baseT_Full);
 886                         phylink_set(pl->supported, 100baseT_Half);
 887                         phylink_set(pl->supported, 100baseT_Full);
 888                         phylink_set(pl->supported, 1000baseT_Half);
 889                         phylink_set(pl->supported, 1000baseT_Full);
 890                         break;
 891
 892                 case PHY_INTERFACE_MODE_1000BASEX:
 893                         phylink_set(pl->supported, 1000baseX_Full);
 894                         break;
 895
 896                 case PHY_INTERFACE_MODE_2500BASEX:
 897                         phylink_set(pl->supported, 2500baseX_Full);
 898                         break;
 899
 900                 case PHY_INTERFACE_MODE_5GBASER:
 901                         phylink_set(pl->supported, 5000baseT_Full);
 902                         break;
 903
 904                 case PHY_INTERFACE_MODE_25GBASER:
 905                         phylink_set(pl->supported, 25000baseCR_Full);
 906                         phylink_set(pl->supported, 25000baseKR_Full);
 907                         phylink_set(pl->supported, 25000baseSR_Full);
 908                         fallthrough;
 909                 case PHY_INTERFACE_MODE_USXGMII:
 910                 case PHY_INTERFACE_MODE_10GKR:
 911                 case PHY_INTERFACE_MODE_10GBASER:
 912                         phylink_set(pl->supported, 10baseT_Half);
 913                         phylink_set(pl->supported, 10baseT_Full);
 914                         phylink_set(pl->supported, 100baseT_Half);
 915                         phylink_set(pl->supported, 100baseT_Full);
 916                         phylink_set(pl->supported, 1000baseT_Half);
 917                         phylink_set(pl->supported, 1000baseT_Full);
 918                         phylink_set(pl->supported, 1000baseX_Full);
 919                         phylink_set(pl->supported, 1000baseKX_Full);
 920                         phylink_set(pl->supported, 2500baseT_Full);
 921                         phylink_set(pl->supported, 2500baseX_Full);
 922                         phylink_set(pl->supported, 5000baseT_Full);
 923                         phylink_set(pl->supported, 10000baseT_Full);
 924                         phylink_set(pl->supported, 10000baseKR_Full);
 925                         phylink_set(pl->supported, 10000baseKX4_Full);
 926                         phylink_set(pl->supported, 10000baseCR_Full);
 927                         phylink_set(pl->supported, 10000baseSR_Full);
 928                         phylink_set(pl->supported, 10000baseLR_Full);
 929                         phylink_set(pl->supported, 10000baseLRM_Full);
 930                         phylink_set(pl->supported, 10000baseER_Full);
 931                         break;
 932
 933                 case PHY_INTERFACE_MODE_XLGMII:
 934                         phylink_set(pl->supported, 25000baseCR_Full);
 935                         phylink_set(pl->supported, 25000baseKR_Full);
 936                         phylink_set(pl->supported, 25000baseSR_Full);
 937                         phylink_set(pl->supported, 40000baseKR4_Full);
 938                         phylink_set(pl->supported, 40000baseCR4_Full);
 939                         phylink_set(pl->supported, 40000baseSR4_Full);
 940                         phylink_set(pl->supported, 40000baseLR4_Full);
 941                         phylink_set(pl->supported, 50000baseCR2_Full);
 942                         phylink_set(pl->supported, 50000baseKR2_Full);
 943                         phylink_set(pl->supported, 50000baseSR2_Full);
 944                         phylink_set(pl->supported, 50000baseKR_Full);
 945                         phylink_set(pl->supported, 50000baseSR_Full);
 946                         phylink_set(pl->supported, 50000baseCR_Full);
 947                         phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
 948                         phylink_set(pl->supported, 50000baseDR_Full);
 949                         phylink_set(pl->supported, 100000baseKR4_Full);
 950                         phylink_set(pl->supported, 100000baseSR4_Full);
 951                         phylink_set(pl->supported, 100000baseCR4_Full);
 952                         phylink_set(pl->supported, 100000baseLR4_ER4_Full);
 953                         phylink_set(pl->supported, 100000baseKR2_Full);
 954                         phylink_set(pl->supported, 100000baseSR2_Full);
 955                         phylink_set(pl->supported, 100000baseCR2_Full);
 956                         phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
 957                         phylink_set(pl->supported, 100000baseDR2_Full);
 958                         break;
 959
 960                 default:
 961                         phylink_err(pl,
 962                                     "incorrect link mode %s for in-band status\n",
 963                                     phy_modes(pl->link_config.interface));
 964                         return -EINVAL;
 965                 }
 966
 967                 linkmode_copy(pl->link_config.advertising, pl->supported);
 968
 969                 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
 970                         phylink_err(pl,
 971                                     "failed to validate link configuration for in-band status\n");
 972                         return -EINVAL;
 973                 }
 974         }
 975
 976         return 0;
 977 }
 978
 979 static void phylink_apply_manual_flow(struct phylink *pl,
 980                                       struct phylink_link_state *state)
 981 {
 982         /* If autoneg is disabled, pause AN is also disabled */
 983         if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
 984                                state->advertising))
 985                 state->pause &= ~MLO_PAUSE_AN;
 986
 987         /* Manual configuration of pause modes */
 988         if (!(pl->link_config.pause & MLO_PAUSE_AN))
 989                 state->pause = pl->link_config.pause;
 990 }
 991
 992 static void phylink_resolve_an_pause(struct phylink_link_state *state)
 993 {
 994         bool tx_pause, rx_pause;
 995
 996         if (state->duplex == DUPLEX_FULL) {
 997                 linkmode_resolve_pause(state->advertising,
 998                                        state->lp_advertising,
 999                                        &tx_pause, &rx_pause);
1000                 if (tx_pause)
1001                         state->pause |= MLO_PAUSE_TX;
1002                 if (rx_pause)
1003                         state->pause |= MLO_PAUSE_RX;
1004         }
1005 }
1006
1007 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
1008                                    phy_interface_t interface)
1009 {
1010         if (pcs && pcs->ops->pcs_pre_config)
1011                 pcs->ops->pcs_pre_config(pcs, interface);
1012 }
1013
1014 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
1015                                    phy_interface_t interface)
1016 {
1017         int err = 0;
1018
1019         if (pcs && pcs->ops->pcs_post_config)
1020                 err = pcs->ops->pcs_post_config(pcs, interface);
1021
1022         return err;
1023 }
1024
1025 static void phylink_pcs_disable(struct phylink_pcs *pcs)
1026 {
1027         if (pcs && pcs->ops->pcs_disable)
1028                 pcs->ops->pcs_disable(pcs);
1029 }
1030
1031 static int phylink_pcs_enable(struct phylink_pcs *pcs)
1032 {
1033         int err = 0;
1034
1035         if (pcs && pcs->ops->pcs_enable)
1036                 err = pcs->ops->pcs_enable(pcs);
1037
1038         return err;
1039 }
1040
1041 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1042                               const struct phylink_link_state *state,
1043                               bool permit_pause_to_mac)
1044 {
1045         if (!pcs)
1046                 return 0;
1047
1048         return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1049                                     state->advertising, permit_pause_to_mac);
1050 }
1051
1052 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1053                                 phy_interface_t interface, int speed,
1054                                 int duplex)
1055 {
1056         if (pcs && pcs->ops->pcs_link_up)
1057                 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1058 }
1059
1060 static void phylink_pcs_poll_stop(struct phylink *pl)
1061 {
1062         if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1063                 del_timer(&pl->link_poll);
1064 }
1065
1066 static void phylink_pcs_poll_start(struct phylink *pl)
1067 {
1068         if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1069                 mod_timer(&pl->link_poll, jiffies + HZ);
1070 }
1071
1072 static void phylink_mac_config(struct phylink *pl,
1073                                const struct phylink_link_state *state)
1074 {
1075         struct phylink_link_state st = *state;
1076
1077         /* Stop drivers incorrectly using these */
1078         linkmode_zero(st.lp_advertising);
1079         st.speed = SPEED_UNKNOWN;
1080         st.duplex = DUPLEX_UNKNOWN;
1081         st.an_complete = false;
1082         st.link = false;
1083
1084         phylink_dbg(pl,
1085                     "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1086                     __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1087                     phy_modes(st.interface),
1088                     phy_rate_matching_to_str(st.rate_matching),
1089                     __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1090                     st.pause);
1091
1092         pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
1093 }
1094
1095 static void phylink_pcs_an_restart(struct phylink *pl)
1096 {
1097         if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1098                                          pl->link_config.advertising) &&
1099             phy_interface_mode_is_8023z(pl->link_config.interface) &&
1100             phylink_autoneg_inband(pl->cur_link_an_mode))
1101                 pl->pcs->ops->pcs_an_restart(pl->pcs);
1102 }
1103
1104 static void phylink_major_config(struct phylink *pl, bool restart,
1105                                   const struct phylink_link_state *state)
1106 {
1107         struct phylink_pcs *pcs = NULL;
1108         bool pcs_changed = false;
1109         unsigned int rate_kbd;
1110         unsigned int neg_mode;
1111         int err;
1112
1113         phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1114
1115         pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1116                                                 state->interface,
1117                                                 state->advertising);
1118
1119         if (pl->using_mac_select_pcs) {
1120                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1121                 if (IS_ERR(pcs)) {
1122                         phylink_err(pl,
1123                                     "mac_select_pcs unexpectedly failed: %pe\n",
1124                                     pcs);
1125                         return;
1126                 }
1127
1128                 pcs_changed = pcs && pl->pcs != pcs;
1129         }
1130
1131         phylink_pcs_poll_stop(pl);
1132
1133         if (pl->mac_ops->mac_prepare) {
1134                 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1135                                                state->interface);
1136                 if (err < 0) {
1137                         phylink_err(pl, "mac_prepare failed: %pe\n",
1138                                     ERR_PTR(err));
1139                         return;
1140                 }
1141         }
1142
1143         /* If we have a new PCS, switch to the new PCS after preparing the MAC
1144          * for the change.
1145          */
1146         if (pcs_changed) {
1147                 phylink_pcs_disable(pl->pcs);
1148
1149                 if (pl->pcs)
1150                         pl->pcs->phylink = NULL;
1151
1152                 pcs->phylink = pl;
1153
1154                 pl->pcs = pcs;
1155         }
1156
1157         if (pl->pcs)
1158                 phylink_pcs_pre_config(pl->pcs, state->interface);
1159
1160         phylink_mac_config(pl, state);
1161
1162         if (pl->pcs)
1163                 phylink_pcs_post_config(pl->pcs, state->interface);
1164
1165         if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1166                 phylink_pcs_enable(pl->pcs);
1167
1168         neg_mode = pl->cur_link_an_mode;
1169         if (pl->pcs && pl->pcs->neg_mode)
1170                 neg_mode = pl->pcs_neg_mode;
1171
1172         err = phylink_pcs_config(pl->pcs, neg_mode, state,
1173                                  !!(pl->link_config.pause & MLO_PAUSE_AN));
1174         if (err < 0)
1175                 phylink_err(pl, "pcs_config failed: %pe\n",
1176                             ERR_PTR(err));
1177         else if (err > 0)
1178                 restart = true;
1179
1180         if (restart)
1181                 phylink_pcs_an_restart(pl);
1182
1183         if (pl->mac_ops->mac_finish) {
1184                 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1185                                               state->interface);
1186                 if (err < 0)
1187                         phylink_err(pl, "mac_finish failed: %pe\n",
1188                                     ERR_PTR(err));
1189         }
1190
1191         if (pl->sfp_bus) {
1192                 rate_kbd = phylink_interface_signal_rate(state->interface);
1193                 if (rate_kbd)
1194                         sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1195         }
1196
1197         phylink_pcs_poll_start(pl);
1198 }
1199
1200 /*
1201  * Reconfigure for a change of inband advertisement.
1202  * If we have a separate PCS, we only need to call its pcs_config() method,
1203  * and then restart AN if it indicates something changed. Otherwise, we do
1204  * the full MAC reconfiguration.
1205  */
1206 static int phylink_change_inband_advert(struct phylink *pl)
1207 {
1208         unsigned int neg_mode;
1209         int ret;
1210
1211         if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1212                 return 0;
1213
1214         phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1215                     phylink_an_mode_str(pl->cur_link_an_mode),
1216                     phy_modes(pl->link_config.interface),
1217                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1218                     pl->link_config.pause);
1219
1220         /* Recompute the PCS neg mode */
1221         pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1222                                         pl->link_config.interface,
1223                                         pl->link_config.advertising);
1224
1225         neg_mode = pl->cur_link_an_mode;
1226         if (pl->pcs->neg_mode)
1227                 neg_mode = pl->pcs_neg_mode;
1228
1229         /* Modern PCS-based method; update the advert at the PCS, and
1230          * restart negotiation if the pcs_config() helper indicates that
1231          * the programmed advertisement has changed.
1232          */
1233         ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1234                                  !!(pl->link_config.pause & MLO_PAUSE_AN));
1235         if (ret < 0)
1236                 return ret;
1237
1238         if (ret > 0)
1239                 phylink_pcs_an_restart(pl);
1240
1241         return 0;
1242 }
1243
1244 static void phylink_mac_pcs_get_state(struct phylink *pl,
1245                                       struct phylink_link_state *state)
1246 {
1247         linkmode_copy(state->advertising, pl->link_config.advertising);
1248         linkmode_zero(state->lp_advertising);
1249         state->interface = pl->link_config.interface;
1250         state->rate_matching = pl->link_config.rate_matching;
1251         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1252                               state->advertising)) {
1253                 state->speed = SPEED_UNKNOWN;
1254                 state->duplex = DUPLEX_UNKNOWN;
1255                 state->pause = MLO_PAUSE_NONE;
1256         } else {
1257                 state->speed =  pl->link_config.speed;
1258                 state->duplex = pl->link_config.duplex;
1259                 state->pause = pl->link_config.pause;
1260         }
1261         state->an_complete = 0;
1262         state->link = 1;
1263
1264         if (pl->pcs)
1265                 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1266         else
1267                 state->link = 0;
1268 }
1269
1270 /* The fixed state is... fixed except for the link state,
1271  * which may be determined by a GPIO or a callback.
1272  */
1273 static void phylink_get_fixed_state(struct phylink *pl,
1274                                     struct phylink_link_state *state)
1275 {
1276         *state = pl->link_config;
1277         if (pl->config->get_fixed_state)
1278                 pl->config->get_fixed_state(pl->config, state);
1279         else if (pl->link_gpio)
1280                 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1281
1282         state->pause = MLO_PAUSE_NONE;
1283         phylink_resolve_an_pause(state);
1284 }
1285
1286 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1287 {
1288         struct phylink_link_state link_state;
1289
1290         switch (pl->cur_link_an_mode) {
1291         case MLO_AN_PHY:
1292                 link_state = pl->phy_state;
1293                 break;
1294
1295         case MLO_AN_FIXED:
1296                 phylink_get_fixed_state(pl, &link_state);
1297                 break;
1298
1299         case MLO_AN_INBAND:
1300                 link_state = pl->link_config;
1301                 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1302                         link_state.pause = MLO_PAUSE_NONE;
1303                 break;
1304
1305         default: /* can't happen */
1306                 return;
1307         }
1308
1309         link_state.link = false;
1310
1311         phylink_apply_manual_flow(pl, &link_state);
1312         phylink_major_config(pl, force_restart, &link_state);
1313 }
1314
1315 static const char *phylink_pause_to_str(int pause)
1316 {
1317         switch (pause & MLO_PAUSE_TXRX_MASK) {
1318         case MLO_PAUSE_TX | MLO_PAUSE_RX:
1319                 return "rx/tx";
1320         case MLO_PAUSE_TX:
1321                 return "tx";
1322         case MLO_PAUSE_RX:
1323                 return "rx";
1324         default:
1325                 return "off";
1326         }
1327 }
1328
1329 static void phylink_link_up(struct phylink *pl,
1330                             struct phylink_link_state link_state)
1331 {
1332         struct net_device *ndev = pl->netdev;
1333         unsigned int neg_mode;
1334         int speed, duplex;
1335         bool rx_pause;
1336
1337         speed = link_state.speed;
1338         duplex = link_state.duplex;
1339         rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1340
1341         switch (link_state.rate_matching) {
1342         case RATE_MATCH_PAUSE:
1343                 /* The PHY is doing rate matchion from the media rate (in
1344                  * the link_state) to the interface speed, and will send
1345                  * pause frames to the MAC to limit its transmission speed.
1346                  */
1347                 speed = phylink_interface_max_speed(link_state.interface);
1348                 duplex = DUPLEX_FULL;
1349                 rx_pause = true;
1350                 break;
1351
1352         case RATE_MATCH_CRS:
1353                 /* The PHY is doing rate matchion from the media rate (in
1354                  * the link_state) to the interface speed, and will cause
1355                  * collisions to the MAC to limit its transmission speed.
1356                  */
1357                 speed = phylink_interface_max_speed(link_state.interface);
1358                 duplex = DUPLEX_HALF;
1359                 break;
1360         }
1361
1362         pl->cur_interface = link_state.interface;
1363
1364         neg_mode = pl->cur_link_an_mode;
1365         if (pl->pcs && pl->pcs->neg_mode)
1366                 neg_mode = pl->pcs_neg_mode;
1367
1368         phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1369                             duplex);
1370
1371         pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1372                                  pl->cur_interface, speed, duplex,
1373                                  !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1374
1375         if (ndev)
1376                 netif_carrier_on(ndev);
1377
1378         phylink_info(pl,
1379                      "Link is Up - %s/%s - flow control %s\n",
1380                      phy_speed_to_str(link_state.speed),
1381                      phy_duplex_to_str(link_state.duplex),
1382                      phylink_pause_to_str(link_state.pause));
1383 }
1384
1385 static void phylink_link_down(struct phylink *pl)
1386 {
1387         struct net_device *ndev = pl->netdev;
1388
1389         if (ndev)
1390                 netif_carrier_off(ndev);
1391         pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1392                                    pl->cur_interface);
1393         phylink_info(pl, "Link is Down\n");
1394 }
1395
1396 static void phylink_resolve(struct work_struct *w)
1397 {
1398         struct phylink *pl = container_of(w, struct phylink, resolve);
1399         struct phylink_link_state link_state;
1400         struct net_device *ndev = pl->netdev;
1401         bool mac_config = false;
1402         bool retrigger = false;
1403         bool cur_link_state;
1404
1405         mutex_lock(&pl->state_mutex);
1406         if (pl->netdev)
1407                 cur_link_state = netif_carrier_ok(ndev);
1408         else
1409                 cur_link_state = pl->old_link_state;
1410
1411         if (pl->phylink_disable_state) {
1412                 pl->mac_link_dropped = false;
1413                 link_state.link = false;
1414         } else if (pl->mac_link_dropped) {
1415                 link_state.link = false;
1416                 retrigger = true;
1417         } else {
1418                 switch (pl->cur_link_an_mode) {
1419                 case MLO_AN_PHY:
1420                         link_state = pl->phy_state;
1421                         phylink_apply_manual_flow(pl, &link_state);
1422                         mac_config = link_state.link;
1423                         break;
1424
1425                 case MLO_AN_FIXED:
1426                         phylink_get_fixed_state(pl, &link_state);
1427                         mac_config = link_state.link;
1428                         break;
1429
1430                 case MLO_AN_INBAND:
1431                         phylink_mac_pcs_get_state(pl, &link_state);
1432
1433                         /* The PCS may have a latching link-fail indicator.
1434                          * If the link was up, bring the link down and
1435                          * re-trigger the resolve. Otherwise, re-read the
1436                          * PCS state to get the current status of the link.
1437                          */
1438                         if (!link_state.link) {
1439                                 if (cur_link_state)
1440                                         retrigger = true;
1441                                 else
1442                                         phylink_mac_pcs_get_state(pl,
1443                                                                   &link_state);
1444                         }
1445
1446                         /* If we have a phy, the "up" state is the union of
1447                          * both the PHY and the MAC
1448                          */
1449                         if (pl->phydev)
1450                                 link_state.link &= pl->phy_state.link;
1451
1452                         /* Only update if the PHY link is up */
1453                         if (pl->phydev && pl->phy_state.link) {
1454                                 /* If the interface has changed, force a
1455                                  * link down event if the link isn't already
1456                                  * down, and re-resolve.
1457                                  */
1458                                 if (link_state.interface !=
1459                                     pl->phy_state.interface) {
1460                                         retrigger = true;
1461                                         link_state.link = false;
1462                                 }
1463                                 link_state.interface = pl->phy_state.interface;
1464
1465                                 /* If we are doing rate matching, then the
1466                                  * link speed/duplex comes from the PHY
1467                                  */
1468                                 if (pl->phy_state.rate_matching) {
1469                                         link_state.rate_matching =
1470                                                 pl->phy_state.rate_matching;
1471                                         link_state.speed = pl->phy_state.speed;
1472                                         link_state.duplex =
1473                                                 pl->phy_state.duplex;
1474                                 }
1475
1476                                 /* If we have a PHY, we need to update with
1477                                  * the PHY flow control bits.
1478                                  */
1479                                 link_state.pause = pl->phy_state.pause;
1480                                 mac_config = true;
1481                         }
1482                         phylink_apply_manual_flow(pl, &link_state);
1483                         break;
1484                 }
1485         }
1486
1487         if (mac_config) {
1488                 if (link_state.interface != pl->link_config.interface) {
1489                         /* The interface has changed, force the link down and
1490                          * then reconfigure.
1491                          */
1492                         if (cur_link_state) {
1493                                 phylink_link_down(pl);
1494                                 cur_link_state = false;
1495                         }
1496                         phylink_major_config(pl, false, &link_state);
1497                         pl->link_config.interface = link_state.interface;
1498                 }
1499         }
1500
1501         if (link_state.link != cur_link_state) {
1502                 pl->old_link_state = link_state.link;
1503                 if (!link_state.link)
1504                         phylink_link_down(pl);
1505                 else
1506                         phylink_link_up(pl, link_state);
1507         }
1508         if (!link_state.link && retrigger) {
1509                 pl->mac_link_dropped = false;
1510                 queue_work(system_power_efficient_wq, &pl->resolve);
1511         }
1512         mutex_unlock(&pl->state_mutex);
1513 }
1514
1515 static void phylink_run_resolve(struct phylink *pl)
1516 {
1517         if (!pl->phylink_disable_state)
1518                 queue_work(system_power_efficient_wq, &pl->resolve);
1519 }
1520
1521 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1522 {
1523         unsigned long state = pl->phylink_disable_state;
1524
1525         set_bit(bit, &pl->phylink_disable_state);
1526         if (state == 0) {
1527                 queue_work(system_power_efficient_wq, &pl->resolve);
1528                 flush_work(&pl->resolve);
1529         }
1530 }
1531
1532 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1533 {
1534         clear_bit(bit, &pl->phylink_disable_state);
1535         phylink_run_resolve(pl);
1536 }
1537
1538 static void phylink_fixed_poll(struct timer_list *t)
1539 {
1540         struct phylink *pl = container_of(t, struct phylink, link_poll);
1541
1542         mod_timer(t, jiffies + HZ);
1543
1544         phylink_run_resolve(pl);
1545 }
1546
1547 static const struct sfp_upstream_ops sfp_phylink_ops;
1548
1549 static int phylink_register_sfp(struct phylink *pl,
1550                                 const struct fwnode_handle *fwnode)
1551 {
1552         struct sfp_bus *bus;
1553         int ret;
1554
1555         if (!fwnode)
1556                 return 0;
1557
1558         bus = sfp_bus_find_fwnode(fwnode);
1559         if (IS_ERR(bus)) {
1560                 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1561                 return PTR_ERR(bus);
1562         }
1563
1564         pl->sfp_bus = bus;
1565
1566         ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1567         sfp_bus_put(bus);
1568
1569         return ret;
1570 }
1571
1572 /**
1573  * phylink_create() - create a phylink instance
1574  * @config: a pointer to the target &struct phylink_config
1575  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1576  *      interface
1577  * @iface: the desired link mode defined by &typedef phy_interface_t
1578  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1579  *
1580  * Create a new phylink instance, and parse the link parameters found in @np.
1581  * This will parse in-band modes, fixed-link or SFP configuration.
1582  *
1583  * Note: the rtnl lock must not be held when calling this function.
1584  *
1585  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1586  * must use IS_ERR() to check for errors from this function.
1587  */
1588 struct phylink *phylink_create(struct phylink_config *config,
1589                                const struct fwnode_handle *fwnode,
1590                                phy_interface_t iface,
1591                                const struct phylink_mac_ops *mac_ops)
1592 {
1593         bool using_mac_select_pcs = false;
1594         struct phylink *pl;
1595         int ret;
1596
1597         /* Validate the supplied configuration */
1598         if (phy_interface_empty(config->supported_interfaces)) {
1599                 dev_err(config->dev,
1600                         "phylink: error: empty supported_interfaces\n");
1601                 return ERR_PTR(-EINVAL);
1602         }
1603
1604         if (mac_ops->mac_select_pcs &&
1605             mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1606               ERR_PTR(-EOPNOTSUPP))
1607                 using_mac_select_pcs = true;
1608
1609         pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1610         if (!pl)
1611                 return ERR_PTR(-ENOMEM);
1612
1613         mutex_init(&pl->state_mutex);
1614         INIT_WORK(&pl->resolve, phylink_resolve);
1615
1616         pl->config = config;
1617         if (config->type == PHYLINK_NETDEV) {
1618                 pl->netdev = to_net_dev(config->dev);
1619                 netif_carrier_off(pl->netdev);
1620         } else if (config->type == PHYLINK_DEV) {
1621                 pl->dev = config->dev;
1622         } else {
1623                 kfree(pl);
1624                 return ERR_PTR(-EINVAL);
1625         }
1626
1627         pl->using_mac_select_pcs = using_mac_select_pcs;
1628         pl->phy_state.interface = iface;
1629         pl->link_interface = iface;
1630         if (iface == PHY_INTERFACE_MODE_MOCA)
1631                 pl->link_port = PORT_BNC;
1632         else
1633                 pl->link_port = PORT_MII;
1634         pl->link_config.interface = iface;
1635         pl->link_config.pause = MLO_PAUSE_AN;
1636         pl->link_config.speed = SPEED_UNKNOWN;
1637         pl->link_config.duplex = DUPLEX_UNKNOWN;
1638         pl->pcs_state = PCS_STATE_DOWN;
1639         pl->mac_ops = mac_ops;
1640         __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1641         timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1642
1643         bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1644         linkmode_copy(pl->link_config.advertising, pl->supported);
1645         phylink_validate(pl, pl->supported, &pl->link_config);
1646
1647         ret = phylink_parse_mode(pl, fwnode);
1648         if (ret < 0) {
1649                 kfree(pl);
1650                 return ERR_PTR(ret);
1651         }
1652
1653         if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1654                 ret = phylink_parse_fixedlink(pl, fwnode);
1655                 if (ret < 0) {
1656                         kfree(pl);
1657                         return ERR_PTR(ret);
1658                 }
1659         }
1660
1661         pl->cur_link_an_mode = pl->cfg_link_an_mode;
1662
1663         ret = phylink_register_sfp(pl, fwnode);
1664         if (ret < 0) {
1665                 kfree(pl);
1666                 return ERR_PTR(ret);
1667         }
1668
1669         return pl;
1670 }
1671 EXPORT_SYMBOL_GPL(phylink_create);
1672
1673 /**
1674  * phylink_destroy() - cleanup and destroy the phylink instance
1675  * @pl: a pointer to a &struct phylink returned from phylink_create()
1676  *
1677  * Destroy a phylink instance. Any PHY that has been attached must have been
1678  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1679  *
1680  * Note: the rtnl lock must not be held when calling this function.
1681  */
1682 void phylink_destroy(struct phylink *pl)
1683 {
1684         sfp_bus_del_upstream(pl->sfp_bus);
1685         if (pl->link_gpio)
1686                 gpiod_put(pl->link_gpio);
1687
1688         cancel_work_sync(&pl->resolve);
1689         kfree(pl);
1690 }
1691 EXPORT_SYMBOL_GPL(phylink_destroy);
1692
1693 /**
1694  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1695  * @pl: a pointer to a &struct phylink returned from phylink_create()
1696  *
1697  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1698  * no PHY is needed.
1699  *
1700  * Returns true if phylink will be expecting a PHY.
1701  */
1702 bool phylink_expects_phy(struct phylink *pl)
1703 {
1704         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1705             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1706              phy_interface_mode_is_8023z(pl->link_config.interface)))
1707                 return false;
1708         return true;
1709 }
1710 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1711
1712 static void phylink_phy_change(struct phy_device *phydev, bool up)
1713 {
1714         struct phylink *pl = phydev->phylink;
1715         bool tx_pause, rx_pause;
1716
1717         phy_get_pause(phydev, &tx_pause, &rx_pause);
1718
1719         mutex_lock(&pl->state_mutex);
1720         pl->phy_state.speed = phydev->speed;
1721         pl->phy_state.duplex = phydev->duplex;
1722         pl->phy_state.rate_matching = phydev->rate_matching;
1723         pl->phy_state.pause = MLO_PAUSE_NONE;
1724         if (tx_pause)
1725                 pl->phy_state.pause |= MLO_PAUSE_TX;
1726         if (rx_pause)
1727                 pl->phy_state.pause |= MLO_PAUSE_RX;
1728         pl->phy_state.interface = phydev->interface;
1729         pl->phy_state.link = up;
1730         mutex_unlock(&pl->state_mutex);
1731
1732         phylink_run_resolve(pl);
1733
1734         phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1735                     phy_modes(phydev->interface),
1736                     phy_speed_to_str(phydev->speed),
1737                     phy_duplex_to_str(phydev->duplex),
1738                     phy_rate_matching_to_str(phydev->rate_matching),
1739                     phylink_pause_to_str(pl->phy_state.pause));
1740 }
1741
1742 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1743                                phy_interface_t interface)
1744 {
1745         struct phylink_link_state config;
1746         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1747         char *irq_str;
1748         int ret;
1749
1750         /*
1751          * This is the new way of dealing with flow control for PHYs,
1752          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1753          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1754          * using our validate call to the MAC, we rely upon the MAC
1755          * clearing the bits from both supported and advertising fields.
1756          */
1757         phy_support_asym_pause(phy);
1758
1759         memset(&config, 0, sizeof(config));
1760         linkmode_copy(supported, phy->supported);
1761         linkmode_copy(config.advertising, phy->advertising);
1762
1763         /* Check whether we would use rate matching for the proposed interface
1764          * mode.
1765          */
1766         config.rate_matching = phy_get_rate_matching(phy, interface);
1767
1768         /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1769          * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1770          * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1771          * their Serdes is either unnecessary or not reasonable.
1772          *
1773          * For these which switch interface modes, we really need to know which
1774          * interface modes the PHY supports to properly work out which ethtool
1775          * linkmodes can be supported. For now, as a work-around, we validate
1776          * against all interface modes, which may lead to more ethtool link
1777          * modes being advertised than are actually supported.
1778          */
1779         if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1780             interface != PHY_INTERFACE_MODE_RXAUI &&
1781             interface != PHY_INTERFACE_MODE_XAUI &&
1782             interface != PHY_INTERFACE_MODE_USXGMII)
1783                 config.interface = PHY_INTERFACE_MODE_NA;
1784         else
1785                 config.interface = interface;
1786
1787         ret = phylink_validate(pl, supported, &config);
1788         if (ret) {
1789                 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1790                              phy_modes(config.interface),
1791                              __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1792                              __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1793                              ERR_PTR(ret));
1794                 return ret;
1795         }
1796
1797         phy->phylink = pl;
1798         phy->phy_link_change = phylink_phy_change;
1799
1800         irq_str = phy_attached_info_irq(phy);
1801         phylink_info(pl,
1802                      "PHY [%s] driver [%s] (irq=%s)\n",
1803                      dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1804         kfree(irq_str);
1805
1806         mutex_lock(&phy->lock);
1807         mutex_lock(&pl->state_mutex);
1808         pl->phydev = phy;
1809         pl->phy_state.interface = interface;
1810         pl->phy_state.pause = MLO_PAUSE_NONE;
1811         pl->phy_state.speed = SPEED_UNKNOWN;
1812         pl->phy_state.duplex = DUPLEX_UNKNOWN;
1813         pl->phy_state.rate_matching = RATE_MATCH_NONE;
1814         linkmode_copy(pl->supported, supported);
1815         linkmode_copy(pl->link_config.advertising, config.advertising);
1816
1817         /* Restrict the phy advertisement according to the MAC support. */
1818         linkmode_copy(phy->advertising, config.advertising);
1819         mutex_unlock(&pl->state_mutex);
1820         mutex_unlock(&phy->lock);
1821
1822         phylink_dbg(pl,
1823                     "phy: %s setting supported %*pb advertising %*pb\n",
1824                     phy_modes(interface),
1825                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1826                     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1827
1828         if (phy_interrupt_is_valid(phy))
1829                 phy_request_interrupt(phy);
1830
1831         if (pl->config->mac_managed_pm)
1832                 phy->mac_managed_pm = true;
1833
1834         return 0;
1835 }
1836
1837 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1838                               phy_interface_t interface)
1839 {
1840         if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1841                     (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1842                      phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1843                 return -EINVAL;
1844
1845         if (pl->phydev)
1846                 return -EBUSY;
1847
1848         return phy_attach_direct(pl->netdev, phy, 0, interface);
1849 }
1850
1851 /**
1852  * phylink_connect_phy() - connect a PHY to the phylink instance
1853  * @pl: a pointer to a &struct phylink returned from phylink_create()
1854  * @phy: a pointer to a &struct phy_device.
1855  *
1856  * Connect @phy to the phylink instance specified by @pl by calling
1857  * phy_attach_direct(). Configure the @phy according to the MAC driver's
1858  * capabilities, start the PHYLIB state machine and enable any interrupts
1859  * that the PHY supports.
1860  *
1861  * This updates the phylink's ethtool supported and advertising link mode
1862  * masks.
1863  *
1864  * Returns 0 on success or a negative errno.
1865  */
1866 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1867 {
1868         int ret;
1869
1870         /* Use PHY device/driver interface */
1871         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1872                 pl->link_interface = phy->interface;
1873                 pl->link_config.interface = pl->link_interface;
1874         }
1875
1876         ret = phylink_attach_phy(pl, phy, pl->link_interface);
1877         if (ret < 0)
1878                 return ret;
1879
1880         ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1881         if (ret)
1882                 phy_detach(phy);
1883
1884         return ret;
1885 }
1886 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1887
1888 /**
1889  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1890  * @pl: a pointer to a &struct phylink returned from phylink_create()
1891  * @dn: a pointer to a &struct device_node.
1892  * @flags: PHY-specific flags to communicate to the PHY device driver
1893  *
1894  * Connect the phy specified in the device node @dn to the phylink instance
1895  * specified by @pl. Actions specified in phylink_connect_phy() will be
1896  * performed.
1897  *
1898  * Returns 0 on success or a negative errno.
1899  */
1900 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1901                            u32 flags)
1902 {
1903         return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1904 }
1905 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1906
1907 /**
1908  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1909  * @pl: a pointer to a &struct phylink returned from phylink_create()
1910  * @fwnode: a pointer to a &struct fwnode_handle.
1911  * @flags: PHY-specific flags to communicate to the PHY device driver
1912  *
1913  * Connect the phy specified @fwnode to the phylink instance specified
1914  * by @pl.
1915  *
1916  * Returns 0 on success or a negative errno.
1917  */
1918 int phylink_fwnode_phy_connect(struct phylink *pl,
1919                                const struct fwnode_handle *fwnode,
1920                                u32 flags)
1921 {
1922         struct fwnode_handle *phy_fwnode;
1923         struct phy_device *phy_dev;
1924         int ret;
1925
1926         /* Fixed links and 802.3z are handled without needing a PHY */
1927         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1928             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1929              phy_interface_mode_is_8023z(pl->link_interface)))
1930                 return 0;
1931
1932         phy_fwnode = fwnode_get_phy_node(fwnode);
1933         if (IS_ERR(phy_fwnode)) {
1934                 if (pl->cfg_link_an_mode == MLO_AN_PHY)
1935                         return -ENODEV;
1936                 return 0;
1937         }
1938
1939         phy_dev = fwnode_phy_find_device(phy_fwnode);
1940         /* We're done with the phy_node handle */
1941         fwnode_handle_put(phy_fwnode);
1942         if (!phy_dev)
1943                 return -ENODEV;
1944
1945         /* Use PHY device/driver interface */
1946         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1947                 pl->link_interface = phy_dev->interface;
1948                 pl->link_config.interface = pl->link_interface;
1949         }
1950
1951         ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1952                                 pl->link_interface);
1953         phy_device_free(phy_dev);
1954         if (ret)
1955                 return ret;
1956
1957         ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1958         if (ret)
1959                 phy_detach(phy_dev);
1960
1961         return ret;
1962 }
1963 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1964
1965 /**
1966  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1967  *   instance.
1968  * @pl: a pointer to a &struct phylink returned from phylink_create()
1969  *
1970  * Disconnect any current PHY from the phylink instance described by @pl.
1971  */
1972 void phylink_disconnect_phy(struct phylink *pl)
1973 {
1974         struct phy_device *phy;
1975
1976         ASSERT_RTNL();
1977
1978         phy = pl->phydev;
1979         if (phy) {
1980                 mutex_lock(&phy->lock);
1981                 mutex_lock(&pl->state_mutex);
1982                 pl->phydev = NULL;
1983                 mutex_unlock(&pl->state_mutex);
1984                 mutex_unlock(&phy->lock);
1985                 flush_work(&pl->resolve);
1986
1987                 phy_disconnect(phy);
1988         }
1989 }
1990 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1991
1992 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
1993 {
1994         if (!up)
1995                 pl->mac_link_dropped = true;
1996         phylink_run_resolve(pl);
1997         phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
1998 }
1999
2000 /**
2001  * phylink_mac_change() - notify phylink of a change in MAC state
2002  * @pl: a pointer to a &struct phylink returned from phylink_create()
2003  * @up: indicates whether the link is currently up.
2004  *
2005  * The MAC driver should call this driver when the state of its link
2006  * changes (eg, link failure, new negotiation results, etc.)
2007  */
2008 void phylink_mac_change(struct phylink *pl, bool up)
2009 {
2010         phylink_link_changed(pl, up, "mac");
2011 }
2012 EXPORT_SYMBOL_GPL(phylink_mac_change);
2013
2014 /**
2015  * phylink_pcs_change() - notify phylink of a change to PCS link state
2016  * @pcs: pointer to &struct phylink_pcs
2017  * @up: indicates whether the link is currently up.
2018  *
2019  * The PCS driver should call this when the state of its link changes
2020  * (e.g. link failure, new negotiation results, etc.) Note: it should
2021  * not determine "up" by reading the BMSR. If in doubt about the link
2022  * state at interrupt time, then pass true if pcs_get_state() returns
2023  * the latched link-down state, otherwise pass false.
2024  */
2025 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2026 {
2027         struct phylink *pl = pcs->phylink;
2028
2029         if (pl)
2030                 phylink_link_changed(pl, up, "pcs");
2031 }
2032 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2033
2034 static irqreturn_t phylink_link_handler(int irq, void *data)
2035 {
2036         struct phylink *pl = data;
2037
2038         phylink_run_resolve(pl);
2039
2040         return IRQ_HANDLED;
2041 }
2042
2043 /**
2044  * phylink_start() - start a phylink instance
2045  * @pl: a pointer to a &struct phylink returned from phylink_create()
2046  *
2047  * Start the phylink instance specified by @pl, configuring the MAC for the
2048  * desired link mode(s) and negotiation style. This should be called from the
2049  * network device driver's &struct net_device_ops ndo_open() method.
2050  */
2051 void phylink_start(struct phylink *pl)
2052 {
2053         bool poll = false;
2054
2055         ASSERT_RTNL();
2056
2057         phylink_info(pl, "configuring for %s/%s link mode\n",
2058                      phylink_an_mode_str(pl->cur_link_an_mode),
2059                      phy_modes(pl->link_config.interface));
2060
2061         /* Always set the carrier off */
2062         if (pl->netdev)
2063                 netif_carrier_off(pl->netdev);
2064
2065         pl->pcs_state = PCS_STATE_STARTING;
2066
2067         /* Apply the link configuration to the MAC when starting. This allows
2068          * a fixed-link to start with the correct parameters, and also
2069          * ensures that we set the appropriate advertisement for Serdes links.
2070          *
2071          * Restart autonegotiation if using 802.3z to ensure that the link
2072          * parameters are properly negotiated.  This is necessary for DSA
2073          * switches using 802.3z negotiation to ensure they see our modes.
2074          */
2075         phylink_mac_initial_config(pl, true);
2076
2077         pl->pcs_state = PCS_STATE_STARTED;
2078
2079         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2080
2081         if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2082                 int irq = gpiod_to_irq(pl->link_gpio);
2083
2084                 if (irq > 0) {
2085                         if (!request_irq(irq, phylink_link_handler,
2086                                          IRQF_TRIGGER_RISING |
2087                                          IRQF_TRIGGER_FALLING,
2088                                          "netdev link", pl))
2089                                 pl->link_irq = irq;
2090                         else
2091                                 irq = 0;
2092                 }
2093                 if (irq <= 0)
2094                         poll = true;
2095         }
2096
2097         if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2098                 poll |= pl->config->poll_fixed_state;
2099
2100         if (poll)
2101                 mod_timer(&pl->link_poll, jiffies + HZ);
2102         if (pl->phydev)
2103                 phy_start(pl->phydev);
2104         if (pl->sfp_bus)
2105                 sfp_upstream_start(pl->sfp_bus);
2106 }
2107 EXPORT_SYMBOL_GPL(phylink_start);
2108
2109 /**
2110  * phylink_stop() - stop a phylink instance
2111  * @pl: a pointer to a &struct phylink returned from phylink_create()
2112  *
2113  * Stop the phylink instance specified by @pl. This should be called from the
2114  * network device driver's &struct net_device_ops ndo_stop() method.  The
2115  * network device's carrier state should not be changed prior to calling this
2116  * function.
2117  *
2118  * This will synchronously bring down the link if the link is not already
2119  * down (in other words, it will trigger a mac_link_down() method call.)
2120  */
2121 void phylink_stop(struct phylink *pl)
2122 {
2123         ASSERT_RTNL();
2124
2125         if (pl->sfp_bus)
2126                 sfp_upstream_stop(pl->sfp_bus);
2127         if (pl->phydev)
2128                 phy_stop(pl->phydev);
2129         del_timer_sync(&pl->link_poll);
2130         if (pl->link_irq) {
2131                 free_irq(pl->link_irq, pl);
2132                 pl->link_irq = 0;
2133         }
2134
2135         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2136
2137         pl->pcs_state = PCS_STATE_DOWN;
2138
2139         phylink_pcs_disable(pl->pcs);
2140 }
2141 EXPORT_SYMBOL_GPL(phylink_stop);
2142
2143 /**
2144  * phylink_suspend() - handle a network device suspend event
2145  * @pl: a pointer to a &struct phylink returned from phylink_create()
2146  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2147  *
2148  * Handle a network device suspend event. There are several cases:
2149  *
2150  * - If Wake-on-Lan is not active, we can bring down the link between
2151  *   the MAC and PHY by calling phylink_stop().
2152  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2153  *   can also bring down the link between the MAC and PHY.
2154  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2155  *   still needs to receive packets, so we can not bring the link down.
2156  */
2157 void phylink_suspend(struct phylink *pl, bool mac_wol)
2158 {
2159         ASSERT_RTNL();
2160
2161         if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
2162                 /* Wake-on-Lan enabled, MAC handling */
2163                 mutex_lock(&pl->state_mutex);
2164
2165                 /* Stop the resolver bringing the link up */
2166                 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2167
2168                 /* Disable the carrier, to prevent transmit timeouts,
2169                  * but one would hope all packets have been sent. This
2170                  * also means phylink_resolve() will do nothing.
2171                  */
2172                 if (pl->netdev)
2173                         netif_carrier_off(pl->netdev);
2174                 else
2175                         pl->old_link_state = false;
2176
2177                 /* We do not call mac_link_down() here as we want the
2178                  * link to remain up to receive the WoL packets.
2179                  */
2180                 mutex_unlock(&pl->state_mutex);
2181         } else {
2182                 phylink_stop(pl);
2183         }
2184 }
2185 EXPORT_SYMBOL_GPL(phylink_suspend);
2186
2187 /**
2188  * phylink_resume() - handle a network device resume event
2189  * @pl: a pointer to a &struct phylink returned from phylink_create()
2190  *
2191  * Undo the effects of phylink_suspend(), returning the link to an
2192  * operational state.
2193  */
2194 void phylink_resume(struct phylink *pl)
2195 {
2196         ASSERT_RTNL();
2197
2198         if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2199                 /* Wake-on-Lan enabled, MAC handling */
2200
2201                 /* Call mac_link_down() so we keep the overall state balanced.
2202                  * Do this under the state_mutex lock for consistency. This
2203                  * will cause a "Link Down" message to be printed during
2204                  * resume, which is harmless - the true link state will be
2205                  * printed when we run a resolve.
2206                  */
2207                 mutex_lock(&pl->state_mutex);
2208                 phylink_link_down(pl);
2209                 mutex_unlock(&pl->state_mutex);
2210
2211                 /* Re-apply the link parameters so that all the settings get
2212                  * restored to the MAC.
2213                  */
2214                 phylink_mac_initial_config(pl, true);
2215
2216                 /* Re-enable and re-resolve the link parameters */
2217                 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2218         } else {
2219                 phylink_start(pl);
2220         }
2221 }
2222 EXPORT_SYMBOL_GPL(phylink_resume);
2223
2224 /**
2225  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2226  * @pl: a pointer to a &struct phylink returned from phylink_create()
2227  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2228  *
2229  * Read the wake on lan parameters from the PHY attached to the phylink
2230  * instance specified by @pl. If no PHY is currently attached, report no
2231  * support for wake on lan.
2232  */
2233 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2234 {
2235         ASSERT_RTNL();
2236
2237         wol->supported = 0;
2238         wol->wolopts = 0;
2239
2240         if (pl->phydev)
2241                 phy_ethtool_get_wol(pl->phydev, wol);
2242 }
2243 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2244
2245 /**
2246  * phylink_ethtool_set_wol() - set wake on lan parameters
2247  * @pl: a pointer to a &struct phylink returned from phylink_create()
2248  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2249  *
2250  * Set the wake on lan parameters for the PHY attached to the phylink
2251  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2252  * error.
2253  *
2254  * Returns zero on success or negative errno code.
2255  */
2256 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2257 {
2258         int ret = -EOPNOTSUPP;
2259
2260         ASSERT_RTNL();
2261
2262         if (pl->phydev)
2263                 ret = phy_ethtool_set_wol(pl->phydev, wol);
2264
2265         return ret;
2266 }
2267 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2268
2269 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2270 {
2271         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2272
2273         linkmode_zero(mask);
2274         phylink_set_port_modes(mask);
2275
2276         linkmode_and(dst, dst, mask);
2277         linkmode_or(dst, dst, b);
2278 }
2279
2280 static void phylink_get_ksettings(const struct phylink_link_state *state,
2281                                   struct ethtool_link_ksettings *kset)
2282 {
2283         phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2284         linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2285         if (kset->base.rate_matching == RATE_MATCH_NONE) {
2286                 kset->base.speed = state->speed;
2287                 kset->base.duplex = state->duplex;
2288         }
2289         kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2290                                                state->advertising) ?
2291                                 AUTONEG_ENABLE : AUTONEG_DISABLE;
2292 }
2293
2294 /**
2295  * phylink_ethtool_ksettings_get() - get the current link settings
2296  * @pl: a pointer to a &struct phylink returned from phylink_create()
2297  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2298  *
2299  * Read the current link settings for the phylink instance specified by @pl.
2300  * This will be the link settings read from the MAC, PHY or fixed link
2301  * settings depending on the current negotiation mode.
2302  */
2303 int phylink_ethtool_ksettings_get(struct phylink *pl,
2304                                   struct ethtool_link_ksettings *kset)
2305 {
2306         struct phylink_link_state link_state;
2307
2308         ASSERT_RTNL();
2309
2310         if (pl->phydev)
2311                 phy_ethtool_ksettings_get(pl->phydev, kset);
2312         else
2313                 kset->base.port = pl->link_port;
2314
2315         linkmode_copy(kset->link_modes.supported, pl->supported);
2316
2317         switch (pl->cur_link_an_mode) {
2318         case MLO_AN_FIXED:
2319                 /* We are using fixed settings. Report these as the
2320                  * current link settings - and note that these also
2321                  * represent the supported speeds/duplex/pause modes.
2322                  */
2323                 phylink_get_fixed_state(pl, &link_state);
2324                 phylink_get_ksettings(&link_state, kset);
2325                 break;
2326
2327         case MLO_AN_INBAND:
2328                 /* If there is a phy attached, then use the reported
2329                  * settings from the phy with no modification.
2330                  */
2331                 if (pl->phydev)
2332                         break;
2333
2334                 phylink_mac_pcs_get_state(pl, &link_state);
2335
2336                 /* The MAC is reporting the link results from its own PCS
2337                  * layer via in-band status. Report these as the current
2338                  * link settings.
2339                  */
2340                 phylink_get_ksettings(&link_state, kset);
2341                 break;
2342         }
2343
2344         return 0;
2345 }
2346 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2347
2348 /**
2349  * phylink_ethtool_ksettings_set() - set the link settings
2350  * @pl: a pointer to a &struct phylink returned from phylink_create()
2351  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2352  */
2353 int phylink_ethtool_ksettings_set(struct phylink *pl,
2354                                   const struct ethtool_link_ksettings *kset)
2355 {
2356         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2357         struct phylink_link_state config;
2358         const struct phy_setting *s;
2359
2360         ASSERT_RTNL();
2361
2362         if (pl->phydev) {
2363                 struct ethtool_link_ksettings phy_kset = *kset;
2364
2365                 linkmode_and(phy_kset.link_modes.advertising,
2366                              phy_kset.link_modes.advertising,
2367                              pl->supported);
2368
2369                 /* We can rely on phylib for this update; we also do not need
2370                  * to update the pl->link_config settings:
2371                  * - the configuration returned via ksettings_get() will come
2372                  *   from phylib whenever a PHY is present.
2373                  * - link_config.interface will be updated by the PHY calling
2374                  *   back via phylink_phy_change() and a subsequent resolve.
2375                  * - initial link configuration for PHY mode comes from the
2376                  *   last phy state updated via phylink_phy_change().
2377                  * - other configuration changes (e.g. pause modes) are
2378                  *   performed directly via phylib.
2379                  * - if in in-band mode with a PHY, the link configuration
2380                  *   is passed on the link from the PHY, and all of
2381                  *   link_config.{speed,duplex,an_enabled,pause} are not used.
2382                  * - the only possible use would be link_config.advertising
2383                  *   pause modes when in 1000base-X mode with a PHY, but in
2384                  *   the presence of a PHY, this should not be changed as that
2385                  *   should be determined from the media side advertisement.
2386                  */
2387                 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2388         }
2389
2390         config = pl->link_config;
2391         /* Mask out unsupported advertisements */
2392         linkmode_and(config.advertising, kset->link_modes.advertising,
2393                      pl->supported);
2394
2395         /* FIXME: should we reject autoneg if phy/mac does not support it? */
2396         switch (kset->base.autoneg) {
2397         case AUTONEG_DISABLE:
2398                 /* Autonegotiation disabled, select a suitable speed and
2399                  * duplex.
2400                  */
2401                 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2402                                        pl->supported, false);
2403                 if (!s)
2404                         return -EINVAL;
2405
2406                 /* If we have a fixed link, refuse to change link parameters.
2407                  * If the link parameters match, accept them but do nothing.
2408                  */
2409                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2410                         if (s->speed != pl->link_config.speed ||
2411                             s->duplex != pl->link_config.duplex)
2412                                 return -EINVAL;
2413                         return 0;
2414                 }
2415
2416                 config.speed = s->speed;
2417                 config.duplex = s->duplex;
2418                 break;
2419
2420         case AUTONEG_ENABLE:
2421                 /* If we have a fixed link, allow autonegotiation (since that
2422                  * is our default case) but do not allow the advertisement to
2423                  * be changed. If the advertisement matches, simply return.
2424                  */
2425                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2426                         if (!linkmode_equal(config.advertising,
2427                                             pl->link_config.advertising))
2428                                 return -EINVAL;
2429                         return 0;
2430                 }
2431
2432                 config.speed = SPEED_UNKNOWN;
2433                 config.duplex = DUPLEX_UNKNOWN;
2434                 break;
2435
2436         default:
2437                 return -EINVAL;
2438         }
2439
2440         /* We have ruled out the case with a PHY attached, and the
2441          * fixed-link cases.  All that is left are in-band links.
2442          */
2443         linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2444                          kset->base.autoneg == AUTONEG_ENABLE);
2445
2446         /* If this link is with an SFP, ensure that changes to advertised modes
2447          * also cause the associated interface to be selected such that the
2448          * link can be configured correctly.
2449          */
2450         if (pl->sfp_bus) {
2451                 config.interface = sfp_select_interface(pl->sfp_bus,
2452                                                         config.advertising);
2453                 if (config.interface == PHY_INTERFACE_MODE_NA) {
2454                         phylink_err(pl,
2455                                     "selection of interface failed, advertisement %*pb\n",
2456                                     __ETHTOOL_LINK_MODE_MASK_NBITS,
2457                                     config.advertising);
2458                         return -EINVAL;
2459                 }
2460
2461                 /* Revalidate with the selected interface */
2462                 linkmode_copy(support, pl->supported);
2463                 if (phylink_validate(pl, support, &config)) {
2464                         phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2465                                     phylink_an_mode_str(pl->cur_link_an_mode),
2466                                     phy_modes(config.interface),
2467                                     __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2468                         return -EINVAL;
2469                 }
2470         } else {
2471                 /* Validate without changing the current supported mask. */
2472                 linkmode_copy(support, pl->supported);
2473                 if (phylink_validate(pl, support, &config))
2474                         return -EINVAL;
2475         }
2476
2477         /* If autonegotiation is enabled, we must have an advertisement */
2478         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2479                               config.advertising) &&
2480             phylink_is_empty_linkmode(config.advertising))
2481                 return -EINVAL;
2482
2483         mutex_lock(&pl->state_mutex);
2484         pl->link_config.speed = config.speed;
2485         pl->link_config.duplex = config.duplex;
2486
2487         if (pl->link_config.interface != config.interface) {
2488                 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2489                 /* We need to force the link down, then change the interface */
2490                 if (pl->old_link_state) {
2491                         phylink_link_down(pl);
2492                         pl->old_link_state = false;
2493                 }
2494                 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2495                               &pl->phylink_disable_state))
2496                         phylink_major_config(pl, false, &config);
2497                 pl->link_config.interface = config.interface;
2498                 linkmode_copy(pl->link_config.advertising, config.advertising);
2499         } else if (!linkmode_equal(pl->link_config.advertising,
2500                                    config.advertising)) {
2501                 linkmode_copy(pl->link_config.advertising, config.advertising);
2502                 phylink_change_inband_advert(pl);
2503         }
2504         mutex_unlock(&pl->state_mutex);
2505
2506         return 0;
2507 }
2508 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2509
2510 /**
2511  * phylink_ethtool_nway_reset() - restart negotiation
2512  * @pl: a pointer to a &struct phylink returned from phylink_create()
2513  *
2514  * Restart negotiation for the phylink instance specified by @pl. This will
2515  * cause any attached phy to restart negotiation with the link partner, and
2516  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2517  * negotiation.
2518  *
2519  * Returns zero on success, or negative error code.
2520  */
2521 int phylink_ethtool_nway_reset(struct phylink *pl)
2522 {
2523         int ret = 0;
2524
2525         ASSERT_RTNL();
2526
2527         if (pl->phydev)
2528                 ret = phy_restart_aneg(pl->phydev);
2529         phylink_pcs_an_restart(pl);
2530
2531         return ret;
2532 }
2533 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2534
2535 /**
2536  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2537  * @pl: a pointer to a &struct phylink returned from phylink_create()
2538  * @pause: a pointer to a &struct ethtool_pauseparam
2539  */
2540 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2541                                     struct ethtool_pauseparam *pause)
2542 {
2543         ASSERT_RTNL();
2544
2545         pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2546         pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2547         pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2548 }
2549 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2550
2551 /**
2552  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2553  * @pl: a pointer to a &struct phylink returned from phylink_create()
2554  * @pause: a pointer to a &struct ethtool_pauseparam
2555  */
2556 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2557                                    struct ethtool_pauseparam *pause)
2558 {
2559         struct phylink_link_state *config = &pl->link_config;
2560         bool manual_changed;
2561         int pause_state;
2562
2563         ASSERT_RTNL();
2564
2565         if (pl->cur_link_an_mode == MLO_AN_FIXED)
2566                 return -EOPNOTSUPP;
2567
2568         if (!phylink_test(pl->supported, Pause) &&
2569             !phylink_test(pl->supported, Asym_Pause))
2570                 return -EOPNOTSUPP;
2571
2572         if (!phylink_test(pl->supported, Asym_Pause) &&
2573             pause->rx_pause != pause->tx_pause)
2574                 return -EINVAL;
2575
2576         pause_state = 0;
2577         if (pause->autoneg)
2578                 pause_state |= MLO_PAUSE_AN;
2579         if (pause->rx_pause)
2580                 pause_state |= MLO_PAUSE_RX;
2581         if (pause->tx_pause)
2582                 pause_state |= MLO_PAUSE_TX;
2583
2584         mutex_lock(&pl->state_mutex);
2585         /*
2586          * See the comments for linkmode_set_pause(), wrt the deficiencies
2587          * with the current implementation.  A solution to this issue would
2588          * be:
2589          * ethtool  Local device
2590          *  rx  tx  Pause AsymDir
2591          *  0   0   0     0
2592          *  1   0   1     1
2593          *  0   1   0     1
2594          *  1   1   1     1
2595          * and then use the ethtool rx/tx enablement status to mask the
2596          * rx/tx pause resolution.
2597          */
2598         linkmode_set_pause(config->advertising, pause->tx_pause,
2599                            pause->rx_pause);
2600
2601         manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2602                          (!(pause_state & MLO_PAUSE_AN) &&
2603                            (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2604
2605         config->pause = pause_state;
2606
2607         /* Update our in-band advertisement, triggering a renegotiation if
2608          * the advertisement changed.
2609          */
2610         if (!pl->phydev)
2611                 phylink_change_inband_advert(pl);
2612
2613         mutex_unlock(&pl->state_mutex);
2614
2615         /* If we have a PHY, a change of the pause frame advertisement will
2616          * cause phylib to renegotiate (if AN is enabled) which will in turn
2617          * call our phylink_phy_change() and trigger a resolve.  Note that
2618          * we can't hold our state mutex while calling phy_set_asym_pause().
2619          */
2620         if (pl->phydev)
2621                 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2622                                    pause->tx_pause);
2623
2624         /* If the manual pause settings changed, make sure we trigger a
2625          * resolve to update their state; we can not guarantee that the
2626          * link will cycle.
2627          */
2628         if (manual_changed) {
2629                 pl->mac_link_dropped = true;
2630                 phylink_run_resolve(pl);
2631         }
2632
2633         return 0;
2634 }
2635 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2636
2637 /**
2638  * phylink_get_eee_err() - read the energy efficient ethernet error
2639  *   counter
2640  * @pl: a pointer to a &struct phylink returned from phylink_create().
2641  *
2642  * Read the Energy Efficient Ethernet error counter from the PHY associated
2643  * with the phylink instance specified by @pl.
2644  *
2645  * Returns positive error counter value, or negative error code.
2646  */
2647 int phylink_get_eee_err(struct phylink *pl)
2648 {
2649         int ret = 0;
2650
2651         ASSERT_RTNL();
2652
2653         if (pl->phydev)
2654                 ret = phy_get_eee_err(pl->phydev);
2655
2656         return ret;
2657 }
2658 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2659
2660 /**
2661  * phylink_init_eee() - init and check the EEE features
2662  * @pl: a pointer to a &struct phylink returned from phylink_create()
2663  * @clk_stop_enable: allow PHY to stop receive clock
2664  *
2665  * Must be called either with RTNL held or within mac_link_up()
2666  */
2667 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2668 {
2669         int ret = -EOPNOTSUPP;
2670
2671         if (pl->phydev)
2672                 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2673
2674         return ret;
2675 }
2676 EXPORT_SYMBOL_GPL(phylink_init_eee);
2677
2678 /**
2679  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2680  * @pl: a pointer to a &struct phylink returned from phylink_create()
2681  * @eee: a pointer to a &struct ethtool_eee for the read parameters
2682  */
2683 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2684 {
2685         int ret = -EOPNOTSUPP;
2686
2687         ASSERT_RTNL();
2688
2689         if (pl->phydev)
2690                 ret = phy_ethtool_get_eee(pl->phydev, eee);
2691
2692         return ret;
2693 }
2694 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2695
2696 /**
2697  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2698  * @pl: a pointer to a &struct phylink returned from phylink_create()
2699  * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2700  */
2701 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2702 {
2703         int ret = -EOPNOTSUPP;
2704
2705         ASSERT_RTNL();
2706
2707         if (pl->phydev)
2708                 ret = phy_ethtool_set_eee(pl->phydev, eee);
2709
2710         return ret;
2711 }
2712 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2713
2714 /* This emulates MII registers for a fixed-mode phy operating as per the
2715  * passed in state. "aneg" defines if we report negotiation is possible.
2716  *
2717  * FIXME: should deal with negotiation state too.
2718  */
2719 static int phylink_mii_emul_read(unsigned int reg,
2720                                  struct phylink_link_state *state)
2721 {
2722         struct fixed_phy_status fs;
2723         unsigned long *lpa = state->lp_advertising;
2724         int val;
2725
2726         fs.link = state->link;
2727         fs.speed = state->speed;
2728         fs.duplex = state->duplex;
2729         fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2730         fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2731
2732         val = swphy_read_reg(reg, &fs);
2733         if (reg == MII_BMSR) {
2734                 if (!state->an_complete)
2735                         val &= ~BMSR_ANEGCOMPLETE;
2736         }
2737         return val;
2738 }
2739
2740 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2741                             unsigned int reg)
2742 {
2743         struct phy_device *phydev = pl->phydev;
2744         int prtad, devad;
2745
2746         if (mdio_phy_id_is_c45(phy_id)) {
2747                 prtad = mdio_phy_id_prtad(phy_id);
2748                 devad = mdio_phy_id_devad(phy_id);
2749                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2750                                         reg);
2751         }
2752
2753         if (phydev->is_c45) {
2754                 switch (reg) {
2755                 case MII_BMCR:
2756                 case MII_BMSR:
2757                 case MII_PHYSID1:
2758                 case MII_PHYSID2:
2759                         devad = __ffs(phydev->c45_ids.mmds_present);
2760                         break;
2761                 case MII_ADVERTISE:
2762                 case MII_LPA:
2763                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2764                                 return -EINVAL;
2765                         devad = MDIO_MMD_AN;
2766                         if (reg == MII_ADVERTISE)
2767                                 reg = MDIO_AN_ADVERTISE;
2768                         else
2769                                 reg = MDIO_AN_LPA;
2770                         break;
2771                 default:
2772                         return -EINVAL;
2773                 }
2774                 prtad = phy_id;
2775                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2776                                         reg);
2777         }
2778
2779         return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2780 }
2781
2782 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2783                              unsigned int reg, unsigned int val)
2784 {
2785         struct phy_device *phydev = pl->phydev;
2786         int prtad, devad;
2787
2788         if (mdio_phy_id_is_c45(phy_id)) {
2789                 prtad = mdio_phy_id_prtad(phy_id);
2790                 devad = mdio_phy_id_devad(phy_id);
2791                 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2792                                          reg, val);
2793         }
2794
2795         if (phydev->is_c45) {
2796                 switch (reg) {
2797                 case MII_BMCR:
2798                 case MII_BMSR:
2799                 case MII_PHYSID1:
2800                 case MII_PHYSID2:
2801                         devad = __ffs(phydev->c45_ids.mmds_present);
2802                         break;
2803                 case MII_ADVERTISE:
2804                 case MII_LPA:
2805                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2806                                 return -EINVAL;
2807                         devad = MDIO_MMD_AN;
2808                         if (reg == MII_ADVERTISE)
2809                                 reg = MDIO_AN_ADVERTISE;
2810                         else
2811                                 reg = MDIO_AN_LPA;
2812                         break;
2813                 default:
2814                         return -EINVAL;
2815                 }
2816                 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2817                                          reg, val);
2818         }
2819
2820         return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2821 }
2822
2823 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2824                             unsigned int reg)
2825 {
2826         struct phylink_link_state state;
2827         int val = 0xffff;
2828
2829         switch (pl->cur_link_an_mode) {
2830         case MLO_AN_FIXED:
2831                 if (phy_id == 0) {
2832                         phylink_get_fixed_state(pl, &state);
2833                         val = phylink_mii_emul_read(reg, &state);
2834                 }
2835                 break;
2836
2837         case MLO_AN_PHY:
2838                 return -EOPNOTSUPP;
2839
2840         case MLO_AN_INBAND:
2841                 if (phy_id == 0) {
2842                         phylink_mac_pcs_get_state(pl, &state);
2843                         val = phylink_mii_emul_read(reg, &state);
2844                 }
2845                 break;
2846         }
2847
2848         return val & 0xffff;
2849 }
2850
2851 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2852                              unsigned int reg, unsigned int val)
2853 {
2854         switch (pl->cur_link_an_mode) {
2855         case MLO_AN_FIXED:
2856                 break;
2857
2858         case MLO_AN_PHY:
2859                 return -EOPNOTSUPP;
2860
2861         case MLO_AN_INBAND:
2862                 break;
2863         }
2864
2865         return 0;
2866 }
2867
2868 /**
2869  * phylink_mii_ioctl() - generic mii ioctl interface
2870  * @pl: a pointer to a &struct phylink returned from phylink_create()
2871  * @ifr: a pointer to a &struct ifreq for socket ioctls
2872  * @cmd: ioctl cmd to execute
2873  *
2874  * Perform the specified MII ioctl on the PHY attached to the phylink instance
2875  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2876  *
2877  * Returns: zero on success or negative error code.
2878  *
2879  * %SIOCGMIIPHY:
2880  *  read register from the current PHY.
2881  * %SIOCGMIIREG:
2882  *  read register from the specified PHY.
2883  * %SIOCSMIIREG:
2884  *  set a register on the specified PHY.
2885  */
2886 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2887 {
2888         struct mii_ioctl_data *mii = if_mii(ifr);
2889         int  ret;
2890
2891         ASSERT_RTNL();
2892
2893         if (pl->phydev) {
2894                 /* PHYs only exist for MLO_AN_PHY and SGMII */
2895                 switch (cmd) {
2896                 case SIOCGMIIPHY:
2897                         mii->phy_id = pl->phydev->mdio.addr;
2898                         fallthrough;
2899
2900                 case SIOCGMIIREG:
2901                         ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2902                         if (ret >= 0) {
2903                                 mii->val_out = ret;
2904                                 ret = 0;
2905                         }
2906                         break;
2907
2908                 case SIOCSMIIREG:
2909                         ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2910                                                 mii->val_in);
2911                         break;
2912
2913                 default:
2914                         ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2915                         break;
2916                 }
2917         } else {
2918                 switch (cmd) {
2919                 case SIOCGMIIPHY:
2920                         mii->phy_id = 0;
2921                         fallthrough;
2922
2923                 case SIOCGMIIREG:
2924                         ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2925                         if (ret >= 0) {
2926                                 mii->val_out = ret;
2927                                 ret = 0;
2928                         }
2929                         break;
2930
2931                 case SIOCSMIIREG:
2932                         ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2933                                                 mii->val_in);
2934                         break;
2935
2936                 default:
2937                         ret = -EOPNOTSUPP;
2938                         break;
2939                 }
2940         }
2941
2942         return ret;
2943 }
2944 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2945
2946 /**
2947  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2948  *   link partners
2949  * @pl: a pointer to a &struct phylink returned from phylink_create()
2950  * @sync: perform action synchronously
2951  *
2952  * If we have a PHY that is not part of a SFP module, then set the speed
2953  * as described in the phy_speed_down() function. Please see this function
2954  * for a description of the @sync parameter.
2955  *
2956  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2957  */
2958 int phylink_speed_down(struct phylink *pl, bool sync)
2959 {
2960         int ret = 0;
2961
2962         ASSERT_RTNL();
2963
2964         if (!pl->sfp_bus && pl->phydev)
2965                 ret = phy_speed_down(pl->phydev, sync);
2966
2967         return ret;
2968 }
2969 EXPORT_SYMBOL_GPL(phylink_speed_down);
2970
2971 /**
2972  * phylink_speed_up() - restore the advertised speeds prior to the call to
2973  *   phylink_speed_down()
2974  * @pl: a pointer to a &struct phylink returned from phylink_create()
2975  *
2976  * If we have a PHY that is not part of a SFP module, then restore the
2977  * PHY speeds as per phy_speed_up().
2978  *
2979  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2980  */
2981 int phylink_speed_up(struct phylink *pl)
2982 {
2983         int ret = 0;
2984
2985         ASSERT_RTNL();
2986
2987         if (!pl->sfp_bus && pl->phydev)
2988                 ret = phy_speed_up(pl->phydev);
2989
2990         return ret;
2991 }
2992 EXPORT_SYMBOL_GPL(phylink_speed_up);
2993
2994 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2995 {
2996         struct phylink *pl = upstream;
2997
2998         pl->netdev->sfp_bus = bus;
2999 }
3000
3001 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3002 {
3003         struct phylink *pl = upstream;
3004
3005         pl->netdev->sfp_bus = NULL;
3006 }
3007
3008 static const phy_interface_t phylink_sfp_interface_preference[] = {
3009         PHY_INTERFACE_MODE_25GBASER,
3010         PHY_INTERFACE_MODE_USXGMII,
3011         PHY_INTERFACE_MODE_10GBASER,
3012         PHY_INTERFACE_MODE_5GBASER,
3013         PHY_INTERFACE_MODE_2500BASEX,
3014         PHY_INTERFACE_MODE_SGMII,
3015         PHY_INTERFACE_MODE_1000BASEX,
3016         PHY_INTERFACE_MODE_100BASEX,
3017 };
3018
3019 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
3020
3021 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3022                                                     const unsigned long *intf)
3023 {
3024         phy_interface_t interface;
3025         size_t i;
3026
3027         interface = PHY_INTERFACE_MODE_NA;
3028         for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3029                 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3030                         interface = phylink_sfp_interface_preference[i];
3031                         break;
3032                 }
3033
3034         return interface;
3035 }
3036
3037 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
3038                                    unsigned long *supported,
3039                                    struct phylink_link_state *state)
3040 {
3041         bool changed = false;
3042
3043         phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3044                     phylink_an_mode_str(mode), phy_modes(state->interface),
3045                     __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3046
3047         if (!linkmode_equal(pl->supported, supported)) {
3048                 linkmode_copy(pl->supported, supported);
3049                 changed = true;
3050         }
3051
3052         if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3053                 linkmode_copy(pl->link_config.advertising, state->advertising);
3054                 changed = true;
3055         }
3056
3057         if (pl->cur_link_an_mode != mode ||
3058             pl->link_config.interface != state->interface) {
3059                 pl->cur_link_an_mode = mode;
3060                 pl->link_config.interface = state->interface;
3061
3062                 changed = true;
3063
3064                 phylink_info(pl, "switched to %s/%s link mode\n",
3065                              phylink_an_mode_str(mode),
3066                              phy_modes(state->interface));
3067         }
3068
3069         if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3070                                  &pl->phylink_disable_state))
3071                 phylink_mac_initial_config(pl, false);
3072 }
3073
3074 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3075                                   struct phy_device *phy)
3076 {
3077         __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
3078         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3079         struct phylink_link_state config;
3080         phy_interface_t iface;
3081         int ret;
3082
3083         linkmode_copy(support, phy->supported);
3084
3085         memset(&config, 0, sizeof(config));
3086         linkmode_copy(config.advertising, phy->advertising);
3087         config.interface = PHY_INTERFACE_MODE_NA;
3088         config.speed = SPEED_UNKNOWN;
3089         config.duplex = DUPLEX_UNKNOWN;
3090         config.pause = MLO_PAUSE_AN;
3091
3092         /* Ignore errors if we're expecting a PHY to attach later */
3093         ret = phylink_validate(pl, support, &config);
3094         if (ret) {
3095                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3096                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3097                             ERR_PTR(ret));
3098                 return ret;
3099         }
3100
3101         iface = sfp_select_interface(pl->sfp_bus, config.advertising);
3102         if (iface == PHY_INTERFACE_MODE_NA) {
3103                 phylink_err(pl,
3104                             "selection of interface failed, advertisement %*pb\n",
3105                             __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
3106                 return -EINVAL;
3107         }
3108
3109         config.interface = iface;
3110         linkmode_copy(support1, support);
3111         ret = phylink_validate(pl, support1, &config);
3112         if (ret) {
3113                 phylink_err(pl,
3114                             "validation of %s/%s with support %*pb failed: %pe\n",
3115                             phylink_an_mode_str(mode),
3116                             phy_modes(config.interface),
3117                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3118                             ERR_PTR(ret));
3119                 return ret;
3120         }
3121
3122         pl->link_port = pl->sfp_port;
3123
3124         phylink_sfp_set_config(pl, mode, support, &config);
3125
3126         return 0;
3127 }
3128
3129 static int phylink_sfp_config_optical(struct phylink *pl)
3130 {
3131         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3132         DECLARE_PHY_INTERFACE_MASK(interfaces);
3133         struct phylink_link_state config;
3134         phy_interface_t interface;
3135         int ret;
3136
3137         phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3138                     (int)PHY_INTERFACE_MODE_MAX,
3139                     pl->config->supported_interfaces,
3140                     (int)PHY_INTERFACE_MODE_MAX,
3141                     pl->sfp_interfaces);
3142
3143         /* Find the union of the supported interfaces by the PCS/MAC and
3144          * the SFP module.
3145          */
3146         phy_interface_and(interfaces, pl->config->supported_interfaces,
3147                           pl->sfp_interfaces);
3148         if (phy_interface_empty(interfaces)) {
3149                 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3150                 return -EINVAL;
3151         }
3152
3153         memset(&config, 0, sizeof(config));
3154         linkmode_copy(support, pl->sfp_support);
3155         linkmode_copy(config.advertising, pl->sfp_support);
3156         config.speed = SPEED_UNKNOWN;
3157         config.duplex = DUPLEX_UNKNOWN;
3158         config.pause = MLO_PAUSE_AN;
3159
3160         /* For all the interfaces that are supported, reduce the sfp_support
3161          * mask to only those link modes that can be supported.
3162          */
3163         ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
3164         if (ret) {
3165                 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3166                             __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3167                 return ret;
3168         }
3169
3170         interface = phylink_choose_sfp_interface(pl, interfaces);
3171         if (interface == PHY_INTERFACE_MODE_NA) {
3172                 phylink_err(pl, "failed to select SFP interface\n");
3173                 return -EINVAL;
3174         }
3175
3176         phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3177                     phy_modes(interface));
3178
3179         config.interface = interface;
3180
3181         /* Ignore errors if we're expecting a PHY to attach later */
3182         ret = phylink_validate(pl, support, &config);
3183         if (ret) {
3184                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3185                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3186                             ERR_PTR(ret));
3187                 return ret;
3188         }
3189
3190         pl->link_port = pl->sfp_port;
3191
3192         phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3193
3194         return 0;
3195 }
3196
3197 static int phylink_sfp_module_insert(void *upstream,
3198                                      const struct sfp_eeprom_id *id)
3199 {
3200         struct phylink *pl = upstream;
3201
3202         ASSERT_RTNL();
3203
3204         linkmode_zero(pl->sfp_support);
3205         phy_interface_zero(pl->sfp_interfaces);
3206         sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3207         pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3208
3209         /* If this module may have a PHY connecting later, defer until later */
3210         pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3211         if (pl->sfp_may_have_phy)
3212                 return 0;
3213
3214         return phylink_sfp_config_optical(pl);
3215 }
3216
3217 static int phylink_sfp_module_start(void *upstream)
3218 {
3219         struct phylink *pl = upstream;
3220
3221         /* If this SFP module has a PHY, start the PHY now. */
3222         if (pl->phydev) {
3223                 phy_start(pl->phydev);
3224                 return 0;
3225         }
3226
3227         /* If the module may have a PHY but we didn't detect one we
3228          * need to configure the MAC here.
3229          */
3230         if (!pl->sfp_may_have_phy)
3231                 return 0;
3232
3233         return phylink_sfp_config_optical(pl);
3234 }
3235
3236 static void phylink_sfp_module_stop(void *upstream)
3237 {
3238         struct phylink *pl = upstream;
3239
3240         /* If this SFP module has a PHY, stop it. */
3241         if (pl->phydev)
3242                 phy_stop(pl->phydev);
3243 }
3244
3245 static void phylink_sfp_link_down(void *upstream)
3246 {
3247         struct phylink *pl = upstream;
3248
3249         ASSERT_RTNL();
3250
3251         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3252 }
3253
3254 static void phylink_sfp_link_up(void *upstream)
3255 {
3256         struct phylink *pl = upstream;
3257
3258         ASSERT_RTNL();
3259
3260         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3261 }
3262
3263 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3264  * or 802.3z control word, so inband will not work.
3265  */
3266 static bool phylink_phy_no_inband(struct phy_device *phy)
3267 {
3268         return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3269                                              0xae025150, 0xfffffff0);
3270 }
3271
3272 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3273 {
3274         struct phylink *pl = upstream;
3275         phy_interface_t interface;
3276         u8 mode;
3277         int ret;
3278
3279         /*
3280          * This is the new way of dealing with flow control for PHYs,
3281          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3282          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3283          * using our validate call to the MAC, we rely upon the MAC
3284          * clearing the bits from both supported and advertising fields.
3285          */
3286         phy_support_asym_pause(phy);
3287
3288         if (phylink_phy_no_inband(phy))
3289                 mode = MLO_AN_PHY;
3290         else
3291                 mode = MLO_AN_INBAND;
3292
3293         /* Set the PHY's host supported interfaces */
3294         phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3295                           pl->config->supported_interfaces);
3296
3297         /* Do the initial configuration */
3298         ret = phylink_sfp_config_phy(pl, mode, phy);
3299         if (ret < 0)
3300                 return ret;
3301
3302         interface = pl->link_config.interface;
3303         ret = phylink_attach_phy(pl, phy, interface);
3304         if (ret < 0)
3305                 return ret;
3306
3307         ret = phylink_bringup_phy(pl, phy, interface);
3308         if (ret)
3309                 phy_detach(phy);
3310
3311         return ret;
3312 }
3313
3314 static void phylink_sfp_disconnect_phy(void *upstream)
3315 {
3316         phylink_disconnect_phy(upstream);
3317 }
3318
3319 static const struct sfp_upstream_ops sfp_phylink_ops = {
3320         .attach = phylink_sfp_attach,
3321         .detach = phylink_sfp_detach,
3322         .module_insert = phylink_sfp_module_insert,
3323         .module_start = phylink_sfp_module_start,
3324         .module_stop = phylink_sfp_module_stop,
3325         .link_up = phylink_sfp_link_up,
3326         .link_down = phylink_sfp_link_down,
3327         .connect_phy = phylink_sfp_connect_phy,
3328         .disconnect_phy = phylink_sfp_disconnect_phy,
3329 };
3330
3331 /* Helpers for MAC drivers */
3332
3333 static struct {
3334         int bit;
3335         int speed;
3336 } phylink_c73_priority_resolution[] = {
3337         { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3338         { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3339         /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3340         { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3341         { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3342         { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3343         { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3344         /* 5GBASE-KR not supported */
3345         { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3346         { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3347 };
3348
3349 void phylink_resolve_c73(struct phylink_link_state *state)
3350 {
3351         int i;
3352
3353         for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3354                 int bit = phylink_c73_priority_resolution[i].bit;
3355                 if (linkmode_test_bit(bit, state->advertising) &&
3356                     linkmode_test_bit(bit, state->lp_advertising))
3357                         break;
3358         }
3359
3360         if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3361                 state->speed = phylink_c73_priority_resolution[i].speed;
3362                 state->duplex = DUPLEX_FULL;
3363         } else {
3364                 /* negotiation failure */
3365                 state->link = false;
3366         }
3367
3368         phylink_resolve_an_pause(state);
3369 }
3370 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3371
3372 static void phylink_decode_c37_word(struct phylink_link_state *state,
3373                                     uint16_t config_reg, int speed)
3374 {
3375         int fd_bit;
3376
3377         if (speed == SPEED_2500)
3378                 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3379         else
3380                 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3381
3382         mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3383
3384         if (linkmode_test_bit(fd_bit, state->advertising) &&
3385             linkmode_test_bit(fd_bit, state->lp_advertising)) {
3386                 state->speed = speed;
3387                 state->duplex = DUPLEX_FULL;
3388         } else {
3389                 /* negotiation failure */
3390                 state->link = false;
3391         }
3392
3393         phylink_resolve_an_pause(state);
3394 }
3395
3396 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3397                                       uint16_t config_reg)
3398 {
3399         if (!(config_reg & LPA_SGMII_LINK)) {
3400                 state->link = false;
3401                 return;
3402         }
3403
3404         switch (config_reg & LPA_SGMII_SPD_MASK) {
3405         case LPA_SGMII_10:
3406                 state->speed = SPEED_10;
3407                 break;
3408         case LPA_SGMII_100:
3409                 state->speed = SPEED_100;
3410                 break;
3411         case LPA_SGMII_1000:
3412                 state->speed = SPEED_1000;
3413                 break;
3414         default:
3415                 state->link = false;
3416                 return;
3417         }
3418         if (config_reg & LPA_SGMII_FULL_DUPLEX)
3419                 state->duplex = DUPLEX_FULL;
3420         else
3421                 state->duplex = DUPLEX_HALF;
3422 }
3423
3424 /**
3425  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3426  * @state: a pointer to a struct phylink_link_state.
3427  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3428  *
3429  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3430  * code word.  Decode the USXGMII code word and populate the corresponding fields
3431  * (speed, duplex) into the phylink_link_state structure.
3432  */
3433 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3434                                  uint16_t lpa)
3435 {
3436         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3437         case MDIO_USXGMII_10:
3438                 state->speed = SPEED_10;
3439                 break;
3440         case MDIO_USXGMII_100:
3441                 state->speed = SPEED_100;
3442                 break;
3443         case MDIO_USXGMII_1000:
3444                 state->speed = SPEED_1000;
3445                 break;
3446         case MDIO_USXGMII_2500:
3447                 state->speed = SPEED_2500;
3448                 break;
3449         case MDIO_USXGMII_5000:
3450                 state->speed = SPEED_5000;
3451                 break;
3452         case MDIO_USXGMII_10G:
3453                 state->speed = SPEED_10000;
3454                 break;
3455         default:
3456                 state->link = false;
3457                 return;
3458         }
3459
3460         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3461                 state->duplex = DUPLEX_FULL;
3462         else
3463                 state->duplex = DUPLEX_HALF;
3464 }
3465 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3466
3467 /**
3468  * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3469  * @state: a pointer to a struct phylink_link_state.
3470  * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3471  *
3472  * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3473  * code word.  Decode the USGMII code word and populate the corresponding fields
3474  * (speed, duplex) into the phylink_link_state structure. The structure for this
3475  * word is the same as the USXGMII word, except it only supports speeds up to
3476  * 1Gbps.
3477  */
3478 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3479                                        uint16_t lpa)
3480 {
3481         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3482         case MDIO_USXGMII_10:
3483                 state->speed = SPEED_10;
3484                 break;
3485         case MDIO_USXGMII_100:
3486                 state->speed = SPEED_100;
3487                 break;
3488         case MDIO_USXGMII_1000:
3489                 state->speed = SPEED_1000;
3490                 break;
3491         default:
3492                 state->link = false;
3493                 return;
3494         }
3495
3496         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3497                 state->duplex = DUPLEX_FULL;
3498         else
3499                 state->duplex = DUPLEX_HALF;
3500 }
3501
3502 /**
3503  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3504  * @state: a pointer to a &struct phylink_link_state.
3505  * @bmsr: The value of the %MII_BMSR register
3506  * @lpa: The value of the %MII_LPA register
3507  *
3508  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3509  * clause 37 negotiation and/or SGMII control.
3510  *
3511  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3512  * the phylink @state structure. This is suitable to be used for implementing
3513  * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3514  * accessing @bmsr and @lpa cannot be done with MDIO directly.
3515  */
3516 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3517                                       u16 bmsr, u16 lpa)
3518 {
3519         state->link = !!(bmsr & BMSR_LSTATUS);
3520         state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3521         /* If there is no link or autonegotiation is disabled, the LP advertisement
3522          * data is not meaningful, so don't go any further.
3523          */
3524         if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3525                                                state->advertising))
3526                 return;
3527
3528         switch (state->interface) {
3529         case PHY_INTERFACE_MODE_1000BASEX:
3530                 phylink_decode_c37_word(state, lpa, SPEED_1000);
3531                 break;
3532
3533         case PHY_INTERFACE_MODE_2500BASEX:
3534                 phylink_decode_c37_word(state, lpa, SPEED_2500);
3535                 break;
3536
3537         case PHY_INTERFACE_MODE_SGMII:
3538         case PHY_INTERFACE_MODE_QSGMII:
3539                 phylink_decode_sgmii_word(state, lpa);
3540                 break;
3541         case PHY_INTERFACE_MODE_QUSGMII:
3542                 phylink_decode_usgmii_word(state, lpa);
3543                 break;
3544
3545         default:
3546                 state->link = false;
3547                 break;
3548         }
3549 }
3550 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3551
3552 /**
3553  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3554  * @pcs: a pointer to a &struct mdio_device.
3555  * @state: a pointer to a &struct phylink_link_state.
3556  *
3557  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3558  * clause 37 negotiation and/or SGMII control.
3559  *
3560  * Read the MAC PCS state from the MII device configured in @config and
3561  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3562  * the phylink @state structure. This is suitable to be directly plugged
3563  * into the pcs_get_state() member of the struct phylink_pcs_ops
3564  * structure.
3565  */
3566 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3567                                    struct phylink_link_state *state)
3568 {
3569         int bmsr, lpa;
3570
3571         bmsr = mdiodev_read(pcs, MII_BMSR);
3572         lpa = mdiodev_read(pcs, MII_LPA);
3573         if (bmsr < 0 || lpa < 0) {
3574                 state->link = false;
3575                 return;
3576         }
3577
3578         phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3579 }
3580 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3581
3582 /**
3583  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3584  *      advertisement
3585  * @interface: the PHY interface mode being configured
3586  * @advertising: the ethtool advertisement mask
3587  *
3588  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3589  * clause 37 negotiation and/or SGMII control.
3590  *
3591  * Encode the clause 37 PCS advertisement as specified by @interface and
3592  * @advertising.
3593  *
3594  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3595  */
3596 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3597                                              const unsigned long *advertising)
3598 {
3599         u16 adv;
3600
3601         switch (interface) {
3602         case PHY_INTERFACE_MODE_1000BASEX:
3603         case PHY_INTERFACE_MODE_2500BASEX:
3604                 adv = ADVERTISE_1000XFULL;
3605                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3606                                       advertising))
3607                         adv |= ADVERTISE_1000XPAUSE;
3608                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3609                                       advertising))
3610                         adv |= ADVERTISE_1000XPSE_ASYM;
3611                 return adv;
3612         case PHY_INTERFACE_MODE_SGMII:
3613         case PHY_INTERFACE_MODE_QSGMII:
3614                 return 0x0001;
3615         default:
3616                 /* Nothing to do for other modes */
3617                 return -EINVAL;
3618         }
3619 }
3620 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3621
3622 /**
3623  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3624  * @pcs: a pointer to a &struct mdio_device.
3625  * @interface: the PHY interface mode being configured
3626  * @advertising: the ethtool advertisement mask
3627  * @neg_mode: PCS negotiation mode
3628  *
3629  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3630  * parameters for the @mode, @interface and @advertising parameters.
3631  * Returns negative error number on failure, zero if the advertisement
3632  * has not changed, or positive if there is a change.
3633  */
3634 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3635                                phy_interface_t interface,
3636                                const unsigned long *advertising,
3637                                unsigned int neg_mode)
3638 {
3639         bool changed = 0;
3640         u16 bmcr;
3641         int ret, adv;
3642
3643         adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3644         if (adv >= 0) {
3645                 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3646                                              MII_ADVERTISE, 0xffff, adv);
3647                 if (ret < 0)
3648                         return ret;
3649                 changed = ret;
3650         }
3651
3652         if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3653                 bmcr = BMCR_ANENABLE;
3654         else
3655                 bmcr = 0;
3656
3657         /* Configure the inband state. Ensure ISOLATE bit is disabled */
3658         ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3659         if (ret < 0)
3660                 return ret;
3661
3662         return changed;
3663 }
3664 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3665
3666 /**
3667  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3668  * @pcs: a pointer to a &struct mdio_device.
3669  *
3670  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3671  * clause 37 negotiation.
3672  *
3673  * Restart the clause 37 negotiation with the link partner. This is
3674  * suitable to be directly plugged into the pcs_get_state() member
3675  * of the struct phylink_pcs_ops structure.
3676  */
3677 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3678 {
3679         int val = mdiodev_read(pcs, MII_BMCR);
3680
3681         if (val >= 0) {
3682                 val |= BMCR_ANRESTART;
3683
3684                 mdiodev_write(pcs, MII_BMCR, val);
3685         }
3686 }
3687 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3688
3689 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3690                                    struct phylink_link_state *state)
3691 {
3692         struct mii_bus *bus = pcs->bus;
3693         int addr = pcs->addr;
3694         int stat;
3695
3696         stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3697         if (stat < 0) {
3698                 state->link = false;
3699                 return;
3700         }
3701
3702         state->link = !!(stat & MDIO_STAT1_LSTATUS);
3703         if (!state->link)
3704                 return;
3705
3706         switch (state->interface) {
3707         case PHY_INTERFACE_MODE_10GBASER:
3708                 state->speed = SPEED_10000;
3709                 state->duplex = DUPLEX_FULL;
3710                 break;
3711
3712         default:
3713                 break;
3714         }
3715 }
3716 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3717
3718 static int __init phylink_init(void)
3719 {
3720         for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3721                 __set_bit(phylink_sfp_interface_preference[i],
3722                           phylink_sfp_interfaces);
3723
3724         return 0;
3725 }
3726
3727 module_init(phylink_init);
3728
3729 MODULE_LICENSE("GPL v2");
3730 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");