include/linux/irqchip/riscv-imsic.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2021 Western Digital Corporation or its affiliates.
   4  * Copyright (C) 2022 Ventana Micro Systems Inc.
   5  */
   6 #ifndef __LINUX_IRQCHIP_RISCV_IMSIC_H
   7 #define __LINUX_IRQCHIP_RISCV_IMSIC_H
   8
   9 #include <linux/types.h>
  10 #include <linux/bitops.h>
  11 #include <linux/device.h>
  12 #include <linux/fwnode.h>
  13 #include <asm/csr.h>
  14
  15 #define IMSIC_MMIO_PAGE_SHIFT           12
  16 #define IMSIC_MMIO_PAGE_SZ              BIT(IMSIC_MMIO_PAGE_SHIFT)
  17 #define IMSIC_MMIO_PAGE_LE              0x00
  18 #define IMSIC_MMIO_PAGE_BE              0x04
  19
  20 #define IMSIC_MIN_ID                    63
  21 #define IMSIC_MAX_ID                    2048
  22
  23 #define IMSIC_EIDELIVERY                0x70
  24
  25 #define IMSIC_EITHRESHOLD               0x72
  26
  27 #define IMSIC_EIP0                      0x80
  28 #define IMSIC_EIP63                     0xbf
  29 #define IMSIC_EIPx_BITS                 32
  30
  31 #define IMSIC_EIE0                      0xc0
  32 #define IMSIC_EIE63                     0xff
  33 #define IMSIC_EIEx_BITS                 32
  34
  35 #define IMSIC_FIRST                     IMSIC_EIDELIVERY
  36 #define IMSIC_LAST                      IMSIC_EIE63
  37
  38 #define IMSIC_MMIO_SETIPNUM_LE          0x00
  39 #define IMSIC_MMIO_SETIPNUM_BE          0x04
  40
  41 struct imsic_local_config {
  42         phys_addr_t                             msi_pa;
  43         void __iomem                            *msi_va;
  44 };
  45
  46 struct imsic_global_config {
  47         /*
  48          * MSI Target Address Scheme
  49          *
  50          * XLEN-1                                                12     0
  51          * |                                                     |     |
  52          * -------------------------------------------------------------
  53          * |xxxxxx|Group Index|xxxxxxxxxxx|HART Index|Guest Index|  0  |
  54          * -------------------------------------------------------------
  55          */
  56
  57         /* Bits representing Guest index, HART index, and Group index */
  58         u32                                     guest_index_bits;
  59         u32                                     hart_index_bits;
  60         u32                                     group_index_bits;
  61         u32                                     group_index_shift;
  62
  63         /* Global base address matching all target MSI addresses */
  64         phys_addr_t                             base_addr;
  65
  66         /* Number of interrupt identities */
  67         u32                                     nr_ids;
  68
  69         /* Number of guest interrupt identities */
  70         u32                                     nr_guest_ids;
  71
  72         /* Per-CPU IMSIC addresses */
  73         struct imsic_local_config __percpu      *local;
  74 };
  75
  76 #ifdef CONFIG_RISCV_IMSIC
  77
  78 const struct imsic_global_config *imsic_get_global_config(void);
  79
  80 #else
  81
  82 static inline const struct imsic_global_config *imsic_get_global_config(void)
  83 {
  84         return NULL;
  85 }
  86
  87 #endif
  88
  89 #ifdef CONFIG_ACPI
  90 int imsic_platform_acpi_probe(struct fwnode_handle *fwnode);
  91 struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev);
  92 #else
  93 static inline struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev) { return NULL; }
  94 #endif
  95
  96 #endif