1 // SPDX-License-Identifier: GPL-2.0
3 * Broadcom specific Advanced Microcontroller Bus
4 * Broadcom USB-core driver (BCMA bus glue)
9 * Based on ssb-ohci driver
12 * Derived from the OHCI-PCI driver
13 * Copyright 1999 Roman Weissgaerber
14 * Copyright 2000-2002 David Brownell
15 * Copyright 1999 Linus Torvalds
16 * Copyright 1999 Gregory P. Smith
18 * Derived from the USBcore related parts of Broadcom-SB
19 * Copyright 2005-2011 Broadcom Corporation
21 #include <linux/bcma/bcma.h>
22 #include <linux/delay.h>
23 #include <linux/gpio/consumer.h>
24 #include <linux/platform_device.h>
25 #include <linux/module.h>
26 #include <linux/slab.h>
28 #include <linux/of_platform.h>
29 #include <linux/usb/ehci_pdriver.h>
30 #include <linux/usb/ohci_pdriver.h>
32 MODULE_AUTHOR("Hauke Mehrtens");
33 MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
34 MODULE_LICENSE("GPL");
36 /* See BCMA_CLKCTLST_EXTRESREQ and BCMA_CLKCTLST_EXTRESST */
37 #define USB_BCMA_CLKCTLST_USB_CLK_REQ 0x00000100
39 struct bcma_hcd_device {
40 struct bcma_device *core;
41 struct platform_device *ehci_dev;
42 struct platform_device *ohci_dev;
43 struct gpio_desc *gpio_desc;
46 /* Wait for bitmask in a register to get set or cleared.
47 * timeout is in units of ten-microseconds.
49 static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
55 for (i = 0; i < timeout; i++) {
56 val = bcma_read32(dev, reg);
57 if ((val & bitmask) == bitmask)
65 static void bcma_hcd_4716wa(struct bcma_device *dev)
67 #ifdef CONFIG_BCMA_DRIVER_MIPS
68 /* Work around for 4716 failures. */
69 if (dev->bus->chipinfo.id == 0x4716) {
72 tmp = bcma_cpu_clock(&dev->bus->drv_mips);
74 tmp = 0x1846b; /* set CDR to 0x11(fast) */
75 else if (tmp == 453000000)
76 tmp = 0x1046b; /* set CDR to 0x10(slow) */
80 /* Change Shim mdio control reg to fix host not acking at
84 bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
87 bcma_write32(dev, 0x524, tmp);
89 bcma_write32(dev, 0x524, 0x4ab);
91 bcma_read32(dev, 0x528);
92 bcma_write32(dev, 0x528, 0x80000000);
95 #endif /* CONFIG_BCMA_DRIVER_MIPS */
98 /* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
99 static void bcma_hcd_init_chip_mips(struct bcma_device *dev)
104 * USB 2.0 special considerations:
106 * 1. Since the core supports both OHCI and EHCI functions, it must
107 * only be reset once.
109 * 2. In addition to the standard SI reset sequence, the Host Control
110 * Register must be programmed to bring the USB core and various
111 * phy components out of reset.
113 if (!bcma_core_is_enabled(dev)) {
114 bcma_core_enable(dev, 0);
116 if (dev->id.rev >= 5) {
117 /* Enable Misc PLL */
118 tmp = bcma_read32(dev, 0x1e0);
120 bcma_write32(dev, 0x1e0, tmp);
121 if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
122 printk(KERN_EMERG "Failed to enable misc PPL!\n");
124 /* Take out of resets */
125 bcma_write32(dev, 0x200, 0x4ff);
127 bcma_write32(dev, 0x200, 0x6ff);
130 /* Make sure digital and AFE are locked in USB PHY */
131 bcma_write32(dev, 0x524, 0x6b);
133 tmp = bcma_read32(dev, 0x524);
135 bcma_write32(dev, 0x524, 0xab);
137 tmp = bcma_read32(dev, 0x524);
139 bcma_write32(dev, 0x524, 0x2b);
141 tmp = bcma_read32(dev, 0x524);
143 bcma_write32(dev, 0x524, 0x10ab);
145 tmp = bcma_read32(dev, 0x524);
147 if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
148 tmp = bcma_read32(dev, 0x528);
150 "USB20H mdio_rddata 0x%08x\n", tmp);
152 bcma_write32(dev, 0x528, 0x80000000);
153 tmp = bcma_read32(dev, 0x314);
155 bcma_write32(dev, 0x200, 0x7ff);
158 /* Take USB and HSIC out of non-driving modes */
159 bcma_write32(dev, 0x510, 0);
161 bcma_write32(dev, 0x200, 0x7ff);
166 bcma_hcd_4716wa(dev);
171 * bcma_hcd_usb20_old_arm_init - Initialize old USB 2.0 controller on ARM
173 * Old USB 2.0 core is identified as BCMA_CORE_USB20_HOST and was introduced
174 * long before Northstar devices. It seems some cheaper chipsets like BCM53573
176 * Initialization of this old core differs between MIPS and ARM.
178 static int bcma_hcd_usb20_old_arm_init(struct bcma_hcd_device *usb_dev)
180 struct bcma_device *core = usb_dev->core;
181 struct device *dev = &core->dev;
182 struct bcma_device *pmu_core;
184 usleep_range(10000, 20000);
185 if (core->id.rev < 5)
188 pmu_core = bcma_find_core(core->bus, BCMA_CORE_PMU);
190 dev_err(dev, "Could not find PMU core\n");
194 /* Take USB core out of reset */
195 bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK | BCMA_IOCTL_FGC);
196 usleep_range(100, 200);
197 bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
198 usleep_range(100, 200);
199 bcma_awrite32(core, BCMA_RESET_CTL, 0);
200 usleep_range(100, 200);
201 bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK);
202 usleep_range(100, 200);
204 /* Enable Misc PLL */
205 bcma_write32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT |
206 BCMA_CLKCTLST_HQCLKREQ |
207 USB_BCMA_CLKCTLST_USB_CLK_REQ);
208 usleep_range(100, 200);
210 bcma_write32(core, 0x510, 0xc7f85000);
211 bcma_write32(core, 0x510, 0xc7f85003);
212 usleep_range(300, 600);
214 /* Program USB PHY PLL parameters */
215 bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x6);
216 bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x005360c1);
217 usleep_range(100, 200);
218 bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x7);
219 bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x0);
220 usleep_range(100, 200);
221 bcma_set32(pmu_core, BCMA_CC_PMU_CTL, BCMA_CC_PMU_CTL_PLL_UPD);
222 usleep_range(100, 200);
224 bcma_write32(core, 0x510, 0x7f8d007);
227 /* Take controller out of reset */
228 bcma_write32(core, 0x200, 0x4ff);
229 usleep_range(25, 50);
230 bcma_write32(core, 0x200, 0x6ff);
231 usleep_range(25, 50);
232 bcma_write32(core, 0x200, 0x7ff);
233 usleep_range(25, 50);
235 of_platform_default_populate(dev->of_node, NULL, dev);
240 static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
244 /* Set packet buffer OUT threshold */
245 val = bcma_read32(dev, 0x94);
248 bcma_write32(dev, 0x94, val);
250 /* Enable break memory transfer */
251 val = bcma_read32(dev, 0x9c);
253 bcma_write32(dev, 0x9c, val);
256 * Broadcom initializes PHY and then waits to ensure HC is ready to be
257 * configured. In our case the order is reversed. We just initialized
258 * controller and we let HCD initialize PHY, so let's wait (sleep) now.
260 usleep_range(1000, 2000);
264 * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
266 static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
268 struct bcma_device *core = bcma_hcd->core;
269 struct bcma_chipinfo *ci = &core->bus->chipinfo;
270 struct device *dev = &core->dev;
272 bcma_core_enable(core, 0);
274 if (ci->id == BCMA_CHIP_ID_BCM4707 ||
275 ci->id == BCMA_CHIP_ID_BCM53018)
276 bcma_hcd_usb20_ns_init_hc(core);
278 of_platform_default_populate(dev->of_node, NULL, dev);
283 static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
285 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
287 if (!usb_dev->gpio_desc)
290 gpiod_set_value(usb_dev->gpio_desc, val);
293 static const struct usb_ehci_pdata ehci_pdata = {
296 static const struct usb_ohci_pdata ohci_pdata = {
299 static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
300 const char *name, u32 addr,
304 struct platform_device *hci_dev;
305 struct resource hci_res[2];
308 memset(hci_res, 0, sizeof(hci_res));
310 hci_res[0].start = addr;
311 hci_res[0].end = hci_res[0].start + 0x1000 - 1;
312 hci_res[0].flags = IORESOURCE_MEM;
314 hci_res[1].start = dev->irq;
315 hci_res[1].flags = IORESOURCE_IRQ;
317 hci_dev = platform_device_alloc(name, 0);
319 return ERR_PTR(-ENOMEM);
321 hci_dev->dev.parent = &dev->dev;
322 hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
324 ret = platform_device_add_resources(hci_dev, hci_res,
325 ARRAY_SIZE(hci_res));
329 ret = platform_device_add_data(hci_dev, data, size);
332 ret = platform_device_add(hci_dev);
339 platform_device_put(hci_dev);
343 static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev)
345 struct bcma_device *dev = usb_dev->core;
346 struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
350 if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
353 bcma_hcd_init_chip_mips(dev);
355 /* In AI chips EHCI is addrspace 0, OHCI is 1 */
356 ohci_addr = dev->addr_s[0];
357 if ((chipinfo->id == BCMA_CHIP_ID_BCM5357 ||
358 chipinfo->id == BCMA_CHIP_ID_BCM4749)
359 && chipinfo->rev == 0)
360 ohci_addr = 0x18009000;
362 usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
363 ohci_addr, &ohci_pdata,
365 if (IS_ERR(usb_dev->ohci_dev))
366 return PTR_ERR(usb_dev->ohci_dev);
368 usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
369 dev->addr, &ehci_pdata,
371 if (IS_ERR(usb_dev->ehci_dev)) {
372 err = PTR_ERR(usb_dev->ehci_dev);
373 goto err_unregister_ohci_dev;
378 err_unregister_ohci_dev:
379 platform_device_unregister(usb_dev->ohci_dev);
383 static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
385 struct bcma_device *core = bcma_hcd->core;
386 struct device *dev = &core->dev;
388 bcma_core_enable(core, 0);
390 of_platform_default_populate(dev->of_node, NULL, dev);
395 static int bcma_hcd_probe(struct bcma_device *core)
398 struct bcma_hcd_device *usb_dev;
400 /* TODO: Probably need checks here; is the core connected? */
402 usb_dev = devm_kzalloc(&core->dev, sizeof(struct bcma_hcd_device),
406 usb_dev->core = core;
408 usb_dev->gpio_desc = devm_gpiod_get_optional(&core->dev, "vcc",
410 if (IS_ERR(usb_dev->gpio_desc))
411 return dev_err_probe(&core->dev, PTR_ERR(usb_dev->gpio_desc),
412 "error obtaining VCC GPIO");
414 switch (core->id.id) {
415 case BCMA_CORE_USB20_HOST:
416 if (IS_ENABLED(CONFIG_ARM))
417 err = bcma_hcd_usb20_old_arm_init(usb_dev);
418 else if (IS_ENABLED(CONFIG_MIPS))
419 err = bcma_hcd_usb20_init(usb_dev);
423 case BCMA_CORE_NS_USB20:
424 err = bcma_hcd_usb20_ns_init(usb_dev);
426 case BCMA_CORE_NS_USB30:
427 err = bcma_hcd_usb30_init(usb_dev);
435 bcma_set_drvdata(core, usb_dev);
439 static void bcma_hcd_remove(struct bcma_device *dev)
441 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
442 struct platform_device *ohci_dev = usb_dev->ohci_dev;
443 struct platform_device *ehci_dev = usb_dev->ehci_dev;
446 platform_device_unregister(ohci_dev);
448 platform_device_unregister(ehci_dev);
450 bcma_core_disable(dev, 0);
453 static void bcma_hcd_shutdown(struct bcma_device *dev)
455 bcma_hci_platform_power_gpio(dev, false);
456 bcma_core_disable(dev, 0);
461 static int bcma_hcd_suspend(struct bcma_device *dev)
463 bcma_hci_platform_power_gpio(dev, false);
464 bcma_core_disable(dev, 0);
469 static int bcma_hcd_resume(struct bcma_device *dev)
471 bcma_hci_platform_power_gpio(dev, true);
472 bcma_core_enable(dev, 0);
477 #else /* !CONFIG_PM */
478 #define bcma_hcd_suspend NULL
479 #define bcma_hcd_resume NULL
480 #endif /* CONFIG_PM */
482 static const struct bcma_device_id bcma_hcd_table[] = {
483 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
484 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
485 BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB30, BCMA_ANY_REV, BCMA_ANY_CLASS),
488 MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
490 static struct bcma_driver bcma_hcd_driver = {
491 .name = KBUILD_MODNAME,
492 .id_table = bcma_hcd_table,
493 .probe = bcma_hcd_probe,
494 .remove = bcma_hcd_remove,
495 .shutdown = bcma_hcd_shutdown,
496 .suspend = bcma_hcd_suspend,
497 .resume = bcma_hcd_resume,
499 module_bcma_driver(bcma_hcd_driver);