1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2015, Intel Corporation.
7 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9 #include <linux/bitops.h>
10 #include <linux/intel_tcc.h>
11 #include <linux/module.h>
12 #include <linux/slab.h>
13 #include <linux/interrupt.h>
14 #include <asm/iosf_mbi.h>
15 #include "intel_soc_dts_iosf.h"
17 #define SOC_DTS_OFFSET_ENABLE 0xB0
18 #define SOC_DTS_OFFSET_TEMP 0xB1
20 #define SOC_DTS_OFFSET_PTPS 0xB2
21 #define SOC_DTS_OFFSET_PTTS 0xB3
22 #define SOC_DTS_OFFSET_PTTSS 0xB4
23 #define SOC_DTS_OFFSET_PTMC 0x80
24 #define SOC_DTS_TE_AUX0 0xB5
25 #define SOC_DTS_TE_AUX1 0xB6
27 #define SOC_DTS_AUX0_ENABLE_BIT BIT(0)
28 #define SOC_DTS_AUX1_ENABLE_BIT BIT(1)
29 #define SOC_DTS_CPU_MODULE0_ENABLE_BIT BIT(16)
30 #define SOC_DTS_CPU_MODULE1_ENABLE_BIT BIT(17)
31 #define SOC_DTS_TE_SCI_ENABLE BIT(9)
32 #define SOC_DTS_TE_SMI_ENABLE BIT(10)
33 #define SOC_DTS_TE_MSI_ENABLE BIT(11)
34 #define SOC_DTS_TE_APICA_ENABLE BIT(14)
35 #define SOC_DTS_PTMC_APIC_DEASSERT_BIT BIT(4)
37 /* DTS encoding for TJ MAX temperature */
38 #define SOC_DTS_TJMAX_ENCODING 0x7F
40 /* Mask for two trips in status bits */
41 #define SOC_DTS_TRIP_MASK 0x03
43 static int update_trip_temp(struct intel_soc_dts_sensors *sensors,
44 int thres_index, int temp)
49 unsigned long update_ptps;
54 u32 int_enable_bit = SOC_DTS_TE_APICA_ENABLE;
56 if (sensors->intr_type == INTEL_SOC_DTS_INTERRUPT_MSI)
57 int_enable_bit |= SOC_DTS_TE_MSI_ENABLE;
59 temp_out = (sensors->tj_max - temp) / 1000;
61 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
62 SOC_DTS_OFFSET_PTPS, &store_ptps);
66 update_ptps = store_ptps;
67 bitmap_set_value8(&update_ptps, temp_out & 0xFF, thres_index * 8);
70 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
71 SOC_DTS_OFFSET_PTPS, out);
75 pr_debug("update_trip_temp PTPS = %x\n", out);
76 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
77 SOC_DTS_OFFSET_PTMC, &out);
79 goto err_restore_ptps;
83 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
84 SOC_DTS_TE_AUX0 + thres_index,
87 goto err_restore_ptmc;
89 store_te_out = te_out;
90 /* Enable for CPU module 0 and module 1 */
91 out |= (SOC_DTS_CPU_MODULE0_ENABLE_BIT |
92 SOC_DTS_CPU_MODULE1_ENABLE_BIT);
95 out |= SOC_DTS_AUX1_ENABLE_BIT;
97 out |= SOC_DTS_AUX0_ENABLE_BIT;
98 te_out |= int_enable_bit;
101 out &= ~SOC_DTS_AUX1_ENABLE_BIT;
103 out &= ~SOC_DTS_AUX0_ENABLE_BIT;
104 te_out &= ~int_enable_bit;
106 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
107 SOC_DTS_OFFSET_PTMC, out);
109 goto err_restore_te_out;
111 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
112 SOC_DTS_TE_AUX0 + thres_index,
115 goto err_restore_te_out;
119 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
120 SOC_DTS_OFFSET_PTMC, store_te_out);
122 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
123 SOC_DTS_OFFSET_PTMC, store_ptmc);
125 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
126 SOC_DTS_OFFSET_PTPS, store_ptps);
127 /* Nothing we can do if restore fails */
132 static int sys_set_trip_temp(struct thermal_zone_device *tzd,
133 const struct thermal_trip *trip,
136 struct intel_soc_dts_sensor_entry *dts = thermal_zone_device_priv(tzd);
137 struct intel_soc_dts_sensors *sensors = dts->sensors;
138 unsigned int trip_index = THERMAL_TRIP_PRIV_TO_INT(trip->priv);
141 if (temp > sensors->tj_max)
144 mutex_lock(&sensors->dts_update_lock);
145 status = update_trip_temp(sensors, trip_index, temp);
146 mutex_unlock(&sensors->dts_update_lock);
151 static int sys_get_curr_temp(struct thermal_zone_device *tzd,
156 struct intel_soc_dts_sensor_entry *dts = thermal_zone_device_priv(tzd);
157 struct intel_soc_dts_sensors *sensors;
160 sensors = dts->sensors;
161 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
162 SOC_DTS_OFFSET_TEMP, &out);
167 out = bitmap_get_value8(&raw, dts->id * 8) - SOC_DTS_TJMAX_ENCODING;
168 *temp = sensors->tj_max - out * 1000;
173 static const struct thermal_zone_device_ops tzone_ops = {
174 .get_temp = sys_get_curr_temp,
175 .set_trip_temp = sys_set_trip_temp,
178 static int soc_dts_enable(int id)
183 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
184 SOC_DTS_OFFSET_ENABLE, &out);
188 if (!(out & BIT(id))) {
190 ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
191 SOC_DTS_OFFSET_ENABLE, out);
199 static void remove_dts_thermal_zone(struct intel_soc_dts_sensor_entry *dts)
201 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
202 SOC_DTS_OFFSET_ENABLE, dts->store_status);
203 thermal_zone_device_unregister(dts->tzone);
206 static int add_dts_thermal_zone(int id, struct intel_soc_dts_sensor_entry *dts,
207 struct thermal_trip *trips)
213 /* Store status to restor on exit */
214 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
215 SOC_DTS_OFFSET_ENABLE, &dts->store_status);
221 /* Check if the writable trip we provide is not used by BIOS */
222 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
223 SOC_DTS_OFFSET_PTPS, &store_ptps);
227 for (i = 0; i <= 1; i++) {
228 if (store_ptps & (0xFFU << i * 8))
229 trips[i].flags &= ~THERMAL_TRIP_FLAG_RW_TEMP;
232 snprintf(name, sizeof(name), "soc_dts%d", id);
233 dts->tzone = thermal_zone_device_register_with_trips(name, trips,
237 if (IS_ERR(dts->tzone)) {
238 ret = PTR_ERR(dts->tzone);
241 ret = thermal_zone_device_enable(dts->tzone);
245 ret = soc_dts_enable(id);
251 thermal_zone_device_unregister(dts->tzone);
256 void intel_soc_dts_iosf_interrupt_handler(struct intel_soc_dts_sensors *sensors)
263 spin_lock_irqsave(&sensors->intr_notify_lock, flags);
265 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
266 SOC_DTS_OFFSET_PTMC, &ptmc_out);
267 ptmc_out |= SOC_DTS_PTMC_APIC_DEASSERT_BIT;
268 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
269 SOC_DTS_OFFSET_PTMC, ptmc_out);
271 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
272 SOC_DTS_OFFSET_PTTSS, &sticky_out);
273 pr_debug("status %d PTTSS %x\n", status, sticky_out);
274 if (sticky_out & SOC_DTS_TRIP_MASK) {
276 /* reset sticky bit */
277 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
278 SOC_DTS_OFFSET_PTTSS, sticky_out);
279 spin_unlock_irqrestore(&sensors->intr_notify_lock, flags);
281 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
282 pr_debug("TZD update for zone %d\n", i);
283 thermal_zone_device_update(sensors->soc_dts[i].tzone,
284 THERMAL_EVENT_UNSPECIFIED);
287 spin_unlock_irqrestore(&sensors->intr_notify_lock, flags);
289 EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_interrupt_handler);
291 static void dts_trips_reset(struct intel_soc_dts_sensors *sensors, int dts_index)
293 update_trip_temp(sensors, 0, 0);
294 update_trip_temp(sensors, 1, 0);
297 static void set_trip(struct thermal_trip *trip, enum thermal_trip_type type,
298 u8 flags, int temp, unsigned int index)
302 trip->temperature = temp;
303 trip->priv = THERMAL_INT_TO_TRIP_PRIV(index);
306 struct intel_soc_dts_sensors *
307 intel_soc_dts_iosf_init(enum intel_soc_dts_interrupt_type intr_type,
308 bool critical_trip, int crit_offset)
310 struct thermal_trip trips[SOC_MAX_DTS_SENSORS][SOC_MAX_DTS_TRIPS] = { 0 };
311 struct intel_soc_dts_sensors *sensors;
316 if (!iosf_mbi_available())
317 return ERR_PTR(-ENODEV);
319 tj_max = intel_tcc_get_tjmax(-1);
321 return ERR_PTR(tj_max);
323 sensors = kzalloc(sizeof(*sensors), GFP_KERNEL);
325 return ERR_PTR(-ENOMEM);
327 spin_lock_init(&sensors->intr_notify_lock);
328 mutex_init(&sensors->dts_update_lock);
329 sensors->intr_type = intr_type;
330 sensors->tj_max = tj_max * 1000;
332 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
335 sensors->soc_dts[i].sensors = sensors;
337 set_trip(&trips[i][0], THERMAL_TRIP_PASSIVE,
338 THERMAL_TRIP_FLAG_RW_TEMP, 0, 0);
340 ret = update_trip_temp(sensors, 0, 0);
342 goto err_reset_trips;
345 temp = sensors->tj_max - crit_offset;
346 set_trip(&trips[i][1], THERMAL_TRIP_CRITICAL, 0, temp, 1);
348 set_trip(&trips[i][1], THERMAL_TRIP_PASSIVE,
349 THERMAL_TRIP_FLAG_RW_TEMP, 0, 1);
353 ret = update_trip_temp(sensors, 1, temp);
355 goto err_reset_trips;
358 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
359 ret = add_dts_thermal_zone(i, &sensors->soc_dts[i], trips[i]);
361 goto err_remove_zone;
367 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i)
368 remove_dts_thermal_zone(&sensors->soc_dts[i]);
371 for (i = 0; i < SOC_MAX_DTS_SENSORS; i++)
372 dts_trips_reset(sensors, i);
377 EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_init);
379 void intel_soc_dts_iosf_exit(struct intel_soc_dts_sensors *sensors)
383 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
384 remove_dts_thermal_zone(&sensors->soc_dts[i]);
385 dts_trips_reset(sensors, i);
389 EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_exit);
391 MODULE_IMPORT_NS("INTEL_TCC");
392 MODULE_LICENSE("GPL v2");
393 MODULE_DESCRIPTION("SoC DTS driver using side band interface");