drivers/net/wireless/realtek/rtlwifi/rtl8723ae/def.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /* Copyright(c) 2009-2012  Realtek Corporation.*/
   3
   4 #ifndef __RTL8723E_DEF_H__
   5 #define __RTL8723E_DEF_H__
   6
   7 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE         0
   8 #define HAL_PRIME_CHNL_OFFSET_LOWER                     1
   9 #define HAL_PRIME_CHNL_OFFSET_UPPER                     2
  10
  11 #define RX_MPDU_QUEUE                                           0
  12 #define RX_CMD_QUEUE                                            1
  13
  14 #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
  15 #define CHIP_BONDING_92C_1T2R           0x1
  16
  17 #define CHIP_8723               BIT(0)
  18 #define NORMAL_CHIP             BIT(3)
  19 #define RF_TYPE_1T1R            (~(BIT(4)|BIT(5)|BIT(6)))
  20 #define RF_TYPE_1T2R            BIT(4)
  21 #define RF_TYPE_2T2R            BIT(5)
  22 #define CHIP_VENDOR_UMC         BIT(7)
  23 #define B_CUT_VERSION           BIT(12)
  24 #define C_CUT_VERSION           BIT(13)
  25 #define D_CUT_VERSION           ((BIT(12)|BIT(13)))
  26 #define E_CUT_VERSION           BIT(14)
  27 #define RF_RL_ID                (BIT(31)|BIT(30)|BIT(29)|BIT(28))
  28
  29 /* MASK */
  30 #define IC_TYPE_MASK            (BIT(0)|BIT(1)|BIT(2))
  31 #define CHIP_TYPE_MASK          BIT(3)
  32 #define RF_TYPE_MASK            (BIT(4)|BIT(5)|BIT(6))
  33 #define MANUFACTUER_MASK        BIT(7)
  34 #define ROM_VERSION_MASK        (BIT(11)|BIT(10)|BIT(9)|BIT(8))
  35 #define CUT_VERSION_MASK        (BIT(15)|BIT(14)|BIT(13)|BIT(12))
  36
  37 /* Get element */
  38 #define GET_CVID_IC_TYPE(version)       ((version) & IC_TYPE_MASK)
  39 #define GET_CVID_CHIP_TYPE(version)     ((version) & CHIP_TYPE_MASK)
  40 #define GET_CVID_RF_TYPE(version)       ((version) & RF_TYPE_MASK)
  41 #define GET_CVID_MANUFACTUER(version)   ((version) & MANUFACTUER_MASK)
  42 #define GET_CVID_ROM_VERSION(version)   ((version) & ROM_VERSION_MASK)
  43 #define GET_CVID_CUT_VERSION(version)   ((version) & CUT_VERSION_MASK)
  44
  45 #define IS_81XXC(version)       ((GET_CVID_IC_TYPE(version) == 0) ?\
  46                                                 true : false)
  47 #define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723) ? \
  48                                                 true : false)
  49 #define IS_1T1R(version)        ((GET_CVID_RF_TYPE(version)) ? false : true)
  50 #define IS_1T2R(version)        ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)\
  51                                                 ? true : false)
  52 #define IS_2T2R(version)        ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)\
  53                                                 ? true : false)
  54 #define IS_CHIP_VENDOR_UMC(version)     ((GET_CVID_MANUFACTUER(version)) ? \
  55                                                 true : false)
  56
  57 #define IS_VENDOR_UMC_A_CUT(version)    ((IS_CHIP_VENDOR_UMC(version))\
  58                                         ? ((GET_CVID_CUT_VERSION(version)) ? \
  59                                         false : true) : false)
  60 #define IS_VENDOR_8723_A_CUT(version)   ((IS_8723_SERIES(version))\
  61                                         ? ((GET_CVID_CUT_VERSION(version)) ? \
  62                                         false : true) : false)
  63 #define IS_VENDOR_8723A_B_CUT(version)  ((IS_8723_SERIES(version))\
  64                 ? ((GET_CVID_CUT_VERSION(version) == \
  65                 B_CUT_VERSION) ? true : false) : false)
  66 #define IS_81XXC_VENDOR_UMC_B_CUT(version)      ((IS_CHIP_VENDOR_UMC(version))\
  67                 ? ((GET_CVID_CUT_VERSION(version) == \
  68                 B_CUT_VERSION) ? true : false) : false)
  69
  70 enum rf_optype {
  71         RF_OP_BY_SW_3WIRE = 0,
  72         RF_OP_BY_FW,
  73         RF_OP_MAX
  74 };
  75
  76 enum rf_power_state {
  77         RF_ON,
  78         RF_OFF,
  79         RF_SLEEP,
  80         RF_SHUT_DOWN,
  81 };
  82
  83 enum power_save_mode {
  84         POWER_SAVE_MODE_ACTIVE,
  85         POWER_SAVE_MODE_SAVE,
  86 };
  87
  88 enum power_policy_config {
  89         POWERCFG_MAX_POWER_SAVINGS,
  90         POWERCFG_GLOBAL_POWER_SAVINGS,
  91         POWERCFG_LOCAL_POWER_SAVINGS,
  92         POWERCFG_LENOVO,
  93 };
  94
  95 enum interface_select_pci {
  96         INTF_SEL1_MINICARD = 0,
  97         INTF_SEL0_PCIE = 1,
  98         INTF_SEL2_RSV = 2,
  99         INTF_SEL3_RSV = 3,
 100 };
 101
 102 enum rtl_desc_qsel {
 103         QSLT_BK = 0x2,
 104         QSLT_BE = 0x0,
 105         QSLT_VI = 0x5,
 106         QSLT_VO = 0x7,
 107         QSLT_BEACON = 0x10,
 108         QSLT_HIGH = 0x11,
 109         QSLT_MGNT = 0x12,
 110         QSLT_CMD = 0x13,
 111 };
 112
 113 enum rtl_desc8723e_rate {
 114         DESC92C_RATE1M = 0x00,
 115         DESC92C_RATE2M = 0x01,
 116         DESC92C_RATE5_5M = 0x02,
 117         DESC92C_RATE11M = 0x03,
 118
 119         DESC92C_RATE6M = 0x04,
 120         DESC92C_RATE9M = 0x05,
 121         DESC92C_RATE12M = 0x06,
 122         DESC92C_RATE18M = 0x07,
 123         DESC92C_RATE24M = 0x08,
 124         DESC92C_RATE36M = 0x09,
 125         DESC92C_RATE48M = 0x0a,
 126         DESC92C_RATE54M = 0x0b,
 127
 128         DESC92C_RATEMCS0 = 0x0c,
 129         DESC92C_RATEMCS1 = 0x0d,
 130         DESC92C_RATEMCS2 = 0x0e,
 131         DESC92C_RATEMCS3 = 0x0f,
 132         DESC92C_RATEMCS4 = 0x10,
 133         DESC92C_RATEMCS5 = 0x11,
 134         DESC92C_RATEMCS6 = 0x12,
 135         DESC92C_RATEMCS7 = 0x13,
 136         DESC92C_RATEMCS8 = 0x14,
 137         DESC92C_RATEMCS9 = 0x15,
 138         DESC92C_RATEMCS10 = 0x16,
 139         DESC92C_RATEMCS11 = 0x17,
 140         DESC92C_RATEMCS12 = 0x18,
 141         DESC92C_RATEMCS13 = 0x19,
 142         DESC92C_RATEMCS14 = 0x1a,
 143         DESC92C_RATEMCS15 = 0x1b,
 144         DESC92C_RATEMCS15_SG = 0x1c,
 145         DESC92C_RATEMCS32 = 0x20,
 146 };
 147
 148 struct phy_sts_cck_8723e_t {
 149         u8 adc_pwdb_X[4];
 150         u8 sq_rpt;
 151         u8 cck_agc_rpt;
 152 };
 153
 154 struct h2c_cmd_8723e {
 155         u8 element_id;
 156         u32 cmd_len;
 157         u8 *p_cmdbuffer;
 158 };
 159
 160 #endif