1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2020, 2022, 2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
7 #ifndef __iwl_fw_api_binding_h__
8 #define __iwl_fw_api_binding_h__
13 #define MAX_MACS_IN_BINDING (3)
14 #define MAX_BINDINGS (4)
17 * struct iwl_binding_cmd_v1 - configuring bindings
18 * ( BINDING_CONTEXT_CMD = 0x2b )
19 * @id_and_color: ID and color of the relevant Binding,
20 * &enum iwl_ctxt_id_and_color
21 * @action: action to perform, see &enum iwl_ctxt_action
22 * @macs: array of MAC id and colors which belong to the binding,
23 * &enum iwl_ctxt_id_and_color
24 * @phy: PHY id and color which belongs to the binding,
25 * &enum iwl_ctxt_id_and_color
27 struct iwl_binding_cmd_v1 {
28 /* COMMON_INDEX_HDR_API_S_VER_1 */
31 /* BINDING_DATA_API_S_VER_1 */
32 __le32 macs[MAX_MACS_IN_BINDING];
34 } __packed; /* BINDING_CMD_API_S_VER_1 */
37 * struct iwl_binding_cmd - configuring bindings
38 * ( BINDING_CONTEXT_CMD = 0x2b )
39 * @id_and_color: ID and color of the relevant Binding,
40 * &enum iwl_ctxt_id_and_color
41 * @action: action to perform, see &enum iwl_ctxt_action
42 * @macs: array of MAC id and colors which belong to the binding
43 * &enum iwl_ctxt_id_and_color
44 * @phy: PHY id and color which belongs to the binding
45 * &enum iwl_ctxt_id_and_color
46 * @lmac_id: the lmac id the binding belongs to
48 struct iwl_binding_cmd {
49 /* COMMON_INDEX_HDR_API_S_VER_1 */
52 /* BINDING_DATA_API_S_VER_1 */
53 __le32 macs[MAX_MACS_IN_BINDING];
56 } __packed; /* BINDING_CMD_API_S_VER_2 */
58 #define IWL_BINDING_CMD_SIZE_V1 sizeof(struct iwl_binding_cmd_v1)
60 /* The maximal number of fragments in the FW's schedule session */
61 #define IWL_MVM_MAX_QUOTA 128
64 * struct iwl_time_quota_data_v1 - configuration of time quota per binding
65 * @id_and_color: ID and color of the relevant Binding,
66 * &enum iwl_ctxt_id_and_color
67 * @quota: absolute time quota in TU. The scheduler will try to divide the
68 * remainig quota (after Time Events) according to this quota.
69 * @max_duration: max uninterrupted context duration in TU
71 struct iwl_time_quota_data_v1 {
75 } __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
78 * struct iwl_time_quota_cmd_v1 - configuration of time quota between bindings
79 * ( TIME_QUOTA_CMD = 0x2c )
80 * @quotas: allocations per binding
81 * Note: on non-CDB the fourth one is the auxilary mac and is
83 * On CDB the fourth one is a regular binding.
85 struct iwl_time_quota_cmd_v1 {
86 struct iwl_time_quota_data_v1 quotas[MAX_BINDINGS];
87 } __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
89 enum iwl_quota_low_latency {
90 IWL_QUOTA_LOW_LATENCY_NONE = 0,
91 IWL_QUOTA_LOW_LATENCY_TX = BIT(0),
92 IWL_QUOTA_LOW_LATENCY_RX = BIT(1),
93 IWL_QUOTA_LOW_LATENCY_TX_RX =
94 IWL_QUOTA_LOW_LATENCY_TX | IWL_QUOTA_LOW_LATENCY_RX,
98 * struct iwl_time_quota_data - configuration of time quota per binding
99 * @id_and_color: ID and color of the relevant Binding.
100 * @quota: absolute time quota in TU. The scheduler will try to divide the
101 * remainig quota (after Time Events) according to this quota.
102 * @max_duration: max uninterrupted context duration in TU
103 * @low_latency: low latency status, &enum iwl_quota_low_latency
105 struct iwl_time_quota_data {
110 } __packed; /* TIME_QUOTA_DATA_API_S_VER_2 */
113 * struct iwl_time_quota_cmd - configuration of time quota between bindings
114 * ( TIME_QUOTA_CMD = 0x2c )
115 * Note: on non-CDB the fourth one is the auxilary mac and is essentially zero.
116 * On CDB the fourth one is a regular binding.
118 * @quotas: allocations per binding
120 struct iwl_time_quota_cmd {
121 struct iwl_time_quota_data quotas[MAX_BINDINGS];
122 } __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_2 */
124 #endif /* __iwl_fw_api_binding_h__ */