drivers/net/wireless/intel/iwlwifi/cfg/bz.c

   1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2015-2017 Intel Deutschland GmbH
   4  * Copyright (C) 2018-2024 Intel Corporation
   5  */
   6 #include <linux/module.h>
   7 #include <linux/stringify.h>
   8 #include "iwl-config.h"
   9 #include "iwl-prph.h"
  10 #include "fw/api/txq.h"
  11
  12 /* Highest firmware API version supported */
  13 #define IWL_BZ_UCODE_API_MAX    94
  14
  15 /* Lowest firmware API version supported */
  16 #define IWL_BZ_UCODE_API_MIN    92
  17
  18 /* NVM versions */
  19 #define IWL_BZ_NVM_VERSION              0x0a1d
  20
  21 /* Memory offsets and lengths */
  22 #define IWL_BZ_DCCM_OFFSET              0x800000 /* LMAC1 */
  23 #define IWL_BZ_DCCM_LEN                 0x10000 /* LMAC1 */
  24 #define IWL_BZ_DCCM2_OFFSET             0x880000
  25 #define IWL_BZ_DCCM2_LEN                0x8000
  26 #define IWL_BZ_SMEM_OFFSET              0x400000
  27 #define IWL_BZ_SMEM_LEN                 0xD0000
  28
  29 #define IWL_BZ_A_HR_B_FW_PRE            "iwlwifi-bz-a0-hr-b0"
  30 #define IWL_BZ_A_GF_A_FW_PRE            "iwlwifi-bz-a0-gf-a0"
  31 #define IWL_BZ_A_GF4_A_FW_PRE           "iwlwifi-bz-a0-gf4-a0"
  32 #define IWL_BZ_A_FM_B_FW_PRE            "iwlwifi-bz-a0-fm-b0"
  33 #define IWL_BZ_A_FM_C_FW_PRE            "iwlwifi-bz-a0-fm-c0"
  34 #define IWL_BZ_A_FM4_B_FW_PRE           "iwlwifi-bz-a0-fm4-b0"
  35 #define IWL_GL_B_FM_B_FW_PRE            "iwlwifi-gl-b0-fm-b0"
  36 #define IWL_GL_C_FM_C_FW_PRE            "iwlwifi-gl-c0-fm-c0"
  37
  38 #define IWL_BZ_A_HR_B_MODULE_FIRMWARE(api) \
  39         IWL_BZ_A_HR_B_FW_PRE "-" __stringify(api) ".ucode"
  40 #define IWL_BZ_A_GF_A_MODULE_FIRMWARE(api) \
  41         IWL_BZ_A_GF_A_FW_PRE "-" __stringify(api) ".ucode"
  42 #define IWL_BZ_A_GF4_A_MODULE_FIRMWARE(api) \
  43         IWL_BZ_A_GF4_A_FW_PRE "-" __stringify(api) ".ucode"
  44 #define IWL_BZ_A_FM_B_MODULE_FIRMWARE(api) \
  45         IWL_BZ_A_FM_B_FW_PRE "-" __stringify(api) ".ucode"
  46 #define IWL_BZ_A_FM_C_MODULE_FIRMWARE(api) \
  47         IWL_BZ_A_FM_C_FW_PRE "-" __stringify(api) ".ucode"
  48 #define IWL_BZ_A_FM4_B_MODULE_FIRMWARE(api) \
  49         IWL_BZ_A_FM4_B_FW_PRE "-" __stringify(api) ".ucode"
  50 #define IWL_GL_B_FM_B_MODULE_FIRMWARE(api) \
  51         IWL_GL_B_FM_B_FW_PRE "-" __stringify(api) ".ucode"
  52 #define IWL_GL_C_FM_C_MODULE_FIRMWARE(api) \
  53         IWL_GL_C_FM_C_FW_PRE "-" __stringify(api) ".ucode"
  54
  55 static const struct iwl_base_params iwl_bz_base_params = {
  56         .eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
  57         .num_of_queues = 512,
  58         .max_tfd_queue_size = 65536,
  59         .shadow_ram_support = true,
  60         .led_compensation = 57,
  61         .wd_timeout = IWL_LONG_WD_TIMEOUT,
  62         .max_event_log_size = 512,
  63         .shadow_reg_enable = true,
  64         .pcie_l1_allowed = true,
  65 };
  66
  67 #define IWL_DEVICE_BZ_COMMON                                            \
  68         .ucode_api_max = IWL_BZ_UCODE_API_MAX,                  \
  69         .ucode_api_min = IWL_BZ_UCODE_API_MIN,                  \
  70         .led_mode = IWL_LED_RF_STATE,                                   \
  71         .nvm_hw_section_num = 10,                                       \
  72         .non_shared_ant = ANT_B,                                        \
  73         .dccm_offset = IWL_BZ_DCCM_OFFSET,                              \
  74         .dccm_len = IWL_BZ_DCCM_LEN,                                    \
  75         .dccm2_offset = IWL_BZ_DCCM2_OFFSET,                            \
  76         .dccm2_len = IWL_BZ_DCCM2_LEN,                          \
  77         .smem_offset = IWL_BZ_SMEM_OFFSET,                              \
  78         .smem_len = IWL_BZ_SMEM_LEN,                                    \
  79         .apmg_not_supported = true,                                     \
  80         .trans.mq_rx_supported = true,                                  \
  81         .vht_mu_mimo_supported = true,                                  \
  82         .mac_addr_from_csr = 0x30,                                      \
  83         .nvm_ver = IWL_BZ_NVM_VERSION,                          \
  84         .trans.rf_id = true,                                            \
  85         .trans.gen2 = true,                                             \
  86         .nvm_type = IWL_NVM_EXT,                                        \
  87         .dbgc_supported = true,                                         \
  88         .min_umac_error_event_table = 0xD0000,                          \
  89         .d3_debug_data_base_addr = 0x401000,                            \
  90         .d3_debug_data_length = 60 * 1024,                              \
  91         .mon_smem_regs = {                                              \
  92                 .write_ptr = {                                          \
  93                         .addr = LDBG_M2S_BUF_WPTR,                      \
  94                         .mask = LDBG_M2S_BUF_WPTR_VAL_MSK,              \
  95         },                                                              \
  96                 .cycle_cnt = {                                          \
  97                         .addr = LDBG_M2S_BUF_WRAP_CNT,                  \
  98                         .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK,          \
  99                 },                                                      \
 100         },                                                              \
 101         .trans.umac_prph_offset = 0x300000,                             \
 102         .trans.device_family = IWL_DEVICE_FAMILY_BZ,                    \
 103         .trans.base_params = &iwl_bz_base_params,                       \
 104         .min_txq_size = 128,                                            \
 105         .gp2_reg_addr = 0xd02c68,                                       \
 106         .min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_EHT,                  \
 107         .mon_dram_regs = {                                              \
 108                 .write_ptr = {                                          \
 109                         .addr = DBGC_CUR_DBGBUF_STATUS,                 \
 110                         .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK,      \
 111                 },                                                      \
 112                 .cycle_cnt = {                                          \
 113                         .addr = DBGC_DBGBUF_WRAP_AROUND,                \
 114                         .mask = 0xffffffff,                             \
 115                 },                                                      \
 116                 .cur_frag = {                                           \
 117                         .addr = DBGC_CUR_DBGBUF_STATUS,                 \
 118                         .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK,         \
 119                 },                                                      \
 120         },                                                              \
 121         .mon_dbgi_regs = {                                              \
 122                 .write_ptr = {                                          \
 123                         .addr = DBGI_SRAM_FIFO_POINTERS,                \
 124                         .mask = DBGI_SRAM_FIFO_POINTERS_WR_PTR_MSK,     \
 125                 },                                                      \
 126         }
 127
 128 #define IWL_DEVICE_BZ                                                   \
 129         IWL_DEVICE_BZ_COMMON,                                           \
 130         .ht_params = &iwl_22000_ht_params
 131
 132 /*
 133  * This size was picked according to 8 MSDUs inside 512 A-MSDUs in an
 134  * A-MPDU, with additional overhead to account for processing time.
 135  */
 136 #define IWL_NUM_RBDS_BZ_EHT             (512 * 16)
 137
 138 const struct iwl_cfg_trans_params iwl_bz_trans_cfg = {
 139         .device_family = IWL_DEVICE_FAMILY_BZ,
 140         .base_params = &iwl_bz_base_params,
 141         .mq_rx_supported = true,
 142         .rf_id = true,
 143         .gen2 = true,
 144         .integrated = true,
 145         .umac_prph_offset = 0x300000,
 146         .xtal_latency = 12000,
 147         .low_latency_xtal = true,
 148         .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
 149 };
 150
 151 const struct iwl_cfg_trans_params iwl_gl_trans_cfg = {
 152         .device_family = IWL_DEVICE_FAMILY_BZ,
 153         .base_params = &iwl_bz_base_params,
 154         .mq_rx_supported = true,
 155         .rf_id = true,
 156         .gen2 = true,
 157         .umac_prph_offset = 0x300000,
 158         .xtal_latency = 12000,
 159         .low_latency_xtal = true,
 160 };
 161
 162 const char iwl_bz_name[] = "Intel(R) TBD Bz device";
 163 const char iwl_fm_name[] = "Intel(R) Wi-Fi 7 BE201 320MHz";
 164 const char iwl_wh_name[] = "Intel(R) Wi-Fi 7 BE211 320MHz";
 165 const char iwl_gl_name[] = "Intel(R) Wi-Fi 7 BE200 320MHz";
 166 const char iwl_mtp_name[] = "Intel(R) Wi-Fi 7 BE202 160MHz";
 167
 168 const struct iwl_cfg iwl_cfg_bz = {
 169         .fw_name_mac = "bz",
 170         .uhb_supported = true,
 171         IWL_DEVICE_BZ,
 172         .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
 173         .num_rbds = IWL_NUM_RBDS_BZ_EHT,
 174 };
 175
 176 const struct iwl_cfg iwl_cfg_gl = {
 177         .fw_name_mac = "gl",
 178         .uhb_supported = true,
 179         IWL_DEVICE_BZ,
 180         .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,
 181         .num_rbds = IWL_NUM_RBDS_BZ_EHT,
 182 };
 183
 184
 185 MODULE_FIRMWARE(IWL_BZ_A_HR_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
 186 MODULE_FIRMWARE(IWL_BZ_A_GF_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
 187 MODULE_FIRMWARE(IWL_BZ_A_GF4_A_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
 188 MODULE_FIRMWARE(IWL_BZ_A_FM_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
 189 MODULE_FIRMWARE(IWL_BZ_A_FM_C_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
 190 MODULE_FIRMWARE(IWL_BZ_A_FM4_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
 191 MODULE_FIRMWARE(IWL_GL_B_FM_B_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
 192 MODULE_FIRMWARE(IWL_GL_C_FM_C_MODULE_FIRMWARE(IWL_BZ_UCODE_API_MAX));
 193
 194 MODULE_FIRMWARE("iwlwifi-gl-c0-fm-c0.pnvm");