1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 #include <linux/types.h>
4 #include <linux/kernel.h>
6 #include "lan966x_vcap_ag_api.h"
9 static const struct vcap_field is1_normal_keyfield[] = {
11 .type = VCAP_FIELD_BIT,
15 [VCAP_KF_LOOKUP_INDEX] = {
16 .type = VCAP_FIELD_U32,
20 [VCAP_KF_IF_IGR_PORT_MASK] = {
21 .type = VCAP_FIELD_U32,
25 [VCAP_KF_L2_MC_IS] = {
26 .type = VCAP_FIELD_BIT,
30 [VCAP_KF_L2_BC_IS] = {
31 .type = VCAP_FIELD_BIT,
35 [VCAP_KF_IP_MC_IS] = {
36 .type = VCAP_FIELD_BIT,
40 [VCAP_KF_8021CB_R_TAGGED_IS] = {
41 .type = VCAP_FIELD_BIT,
45 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
46 .type = VCAP_FIELD_BIT,
50 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = {
51 .type = VCAP_FIELD_BIT,
55 [VCAP_KF_8021Q_TPID0] = {
56 .type = VCAP_FIELD_BIT,
60 [VCAP_KF_8021Q_VID0] = {
61 .type = VCAP_FIELD_U32,
65 [VCAP_KF_8021Q_DEI0] = {
66 .type = VCAP_FIELD_BIT,
70 [VCAP_KF_8021Q_PCP0] = {
71 .type = VCAP_FIELD_U32,
76 .type = VCAP_FIELD_U48,
80 [VCAP_KF_ETYPE_LEN_IS] = {
81 .type = VCAP_FIELD_BIT,
86 .type = VCAP_FIELD_U32,
90 [VCAP_KF_IP_SNAP_IS] = {
91 .type = VCAP_FIELD_BIT,
96 .type = VCAP_FIELD_BIT,
100 [VCAP_KF_L3_FRAGMENT] = {
101 .type = VCAP_FIELD_BIT,
105 [VCAP_KF_L3_FRAG_OFS_GT0] = {
106 .type = VCAP_FIELD_BIT,
110 [VCAP_KF_L3_OPTIONS_IS] = {
111 .type = VCAP_FIELD_BIT,
115 [VCAP_KF_L3_DSCP] = {
116 .type = VCAP_FIELD_U32,
120 [VCAP_KF_L3_IP4_SIP] = {
121 .type = VCAP_FIELD_U32,
125 [VCAP_KF_TCP_UDP_IS] = {
126 .type = VCAP_FIELD_BIT,
131 .type = VCAP_FIELD_BIT,
135 [VCAP_KF_L4_SPORT] = {
136 .type = VCAP_FIELD_U32,
141 .type = VCAP_FIELD_U32,
147 static const struct vcap_field is1_5tuple_ip4_keyfield[] = {
149 .type = VCAP_FIELD_BIT,
153 [VCAP_KF_LOOKUP_INDEX] = {
154 .type = VCAP_FIELD_U32,
158 [VCAP_KF_IF_IGR_PORT_MASK] = {
159 .type = VCAP_FIELD_U32,
163 [VCAP_KF_L2_MC_IS] = {
164 .type = VCAP_FIELD_BIT,
168 [VCAP_KF_L2_BC_IS] = {
169 .type = VCAP_FIELD_BIT,
173 [VCAP_KF_IP_MC_IS] = {
174 .type = VCAP_FIELD_BIT,
178 [VCAP_KF_8021CB_R_TAGGED_IS] = {
179 .type = VCAP_FIELD_BIT,
183 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
184 .type = VCAP_FIELD_BIT,
188 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = {
189 .type = VCAP_FIELD_BIT,
193 [VCAP_KF_8021Q_TPID0] = {
194 .type = VCAP_FIELD_BIT,
198 [VCAP_KF_8021Q_VID0] = {
199 .type = VCAP_FIELD_U32,
203 [VCAP_KF_8021Q_DEI0] = {
204 .type = VCAP_FIELD_BIT,
208 [VCAP_KF_8021Q_PCP0] = {
209 .type = VCAP_FIELD_U32,
213 [VCAP_KF_8021Q_TPID1] = {
214 .type = VCAP_FIELD_BIT,
218 [VCAP_KF_8021Q_VID1] = {
219 .type = VCAP_FIELD_U32,
223 [VCAP_KF_8021Q_DEI1] = {
224 .type = VCAP_FIELD_BIT,
228 [VCAP_KF_8021Q_PCP1] = {
229 .type = VCAP_FIELD_U32,
234 .type = VCAP_FIELD_BIT,
238 [VCAP_KF_L3_FRAGMENT] = {
239 .type = VCAP_FIELD_BIT,
243 [VCAP_KF_L3_FRAG_OFS_GT0] = {
244 .type = VCAP_FIELD_BIT,
248 [VCAP_KF_L3_OPTIONS_IS] = {
249 .type = VCAP_FIELD_BIT,
253 [VCAP_KF_L3_DSCP] = {
254 .type = VCAP_FIELD_U32,
258 [VCAP_KF_L3_IP4_DIP] = {
259 .type = VCAP_FIELD_U32,
263 [VCAP_KF_L3_IP4_SIP] = {
264 .type = VCAP_FIELD_U32,
268 [VCAP_KF_L3_IP_PROTO] = {
269 .type = VCAP_FIELD_U32,
273 [VCAP_KF_TCP_UDP_IS] = {
274 .type = VCAP_FIELD_BIT,
279 .type = VCAP_FIELD_BIT,
284 .type = VCAP_FIELD_U32,
288 [VCAP_KF_IP_PAYLOAD_5TUPLE] = {
289 .type = VCAP_FIELD_U32,
295 static const struct vcap_field is1_normal_ip6_keyfield[] = {
297 .type = VCAP_FIELD_U32,
301 [VCAP_KF_LOOKUP_INDEX] = {
302 .type = VCAP_FIELD_U32,
306 [VCAP_KF_IF_IGR_PORT_MASK] = {
307 .type = VCAP_FIELD_U32,
311 [VCAP_KF_L2_MC_IS] = {
312 .type = VCAP_FIELD_BIT,
316 [VCAP_KF_L2_BC_IS] = {
317 .type = VCAP_FIELD_BIT,
321 [VCAP_KF_IP_MC_IS] = {
322 .type = VCAP_FIELD_BIT,
326 [VCAP_KF_8021CB_R_TAGGED_IS] = {
327 .type = VCAP_FIELD_BIT,
331 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
332 .type = VCAP_FIELD_BIT,
336 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = {
337 .type = VCAP_FIELD_BIT,
341 [VCAP_KF_8021Q_TPID0] = {
342 .type = VCAP_FIELD_BIT,
346 [VCAP_KF_8021Q_VID0] = {
347 .type = VCAP_FIELD_U32,
351 [VCAP_KF_8021Q_DEI0] = {
352 .type = VCAP_FIELD_BIT,
356 [VCAP_KF_8021Q_PCP0] = {
357 .type = VCAP_FIELD_U32,
361 [VCAP_KF_8021Q_TPID1] = {
362 .type = VCAP_FIELD_BIT,
366 [VCAP_KF_8021Q_VID1] = {
367 .type = VCAP_FIELD_U32,
371 [VCAP_KF_8021Q_DEI1] = {
372 .type = VCAP_FIELD_BIT,
376 [VCAP_KF_8021Q_PCP1] = {
377 .type = VCAP_FIELD_U32,
381 [VCAP_KF_L2_SMAC] = {
382 .type = VCAP_FIELD_U48,
386 [VCAP_KF_L3_DSCP] = {
387 .type = VCAP_FIELD_U32,
391 [VCAP_KF_L3_IP6_SIP] = {
392 .type = VCAP_FIELD_U128,
396 [VCAP_KF_L3_IP_PROTO] = {
397 .type = VCAP_FIELD_U32,
401 [VCAP_KF_TCP_UDP_IS] = {
402 .type = VCAP_FIELD_BIT,
407 .type = VCAP_FIELD_U32,
411 [VCAP_KF_IP_PAYLOAD_S1_IP6] = {
412 .type = VCAP_FIELD_U112,
418 static const struct vcap_field is1_7tuple_keyfield[] = {
420 .type = VCAP_FIELD_U32,
424 [VCAP_KF_LOOKUP_INDEX] = {
425 .type = VCAP_FIELD_U32,
429 [VCAP_KF_IF_IGR_PORT_MASK] = {
430 .type = VCAP_FIELD_U32,
434 [VCAP_KF_L2_MC_IS] = {
435 .type = VCAP_FIELD_BIT,
439 [VCAP_KF_L2_BC_IS] = {
440 .type = VCAP_FIELD_BIT,
444 [VCAP_KF_IP_MC_IS] = {
445 .type = VCAP_FIELD_BIT,
449 [VCAP_KF_8021CB_R_TAGGED_IS] = {
450 .type = VCAP_FIELD_BIT,
454 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
455 .type = VCAP_FIELD_BIT,
459 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = {
460 .type = VCAP_FIELD_BIT,
464 [VCAP_KF_8021Q_TPID0] = {
465 .type = VCAP_FIELD_BIT,
469 [VCAP_KF_8021Q_VID0] = {
470 .type = VCAP_FIELD_U32,
474 [VCAP_KF_8021Q_DEI0] = {
475 .type = VCAP_FIELD_BIT,
479 [VCAP_KF_8021Q_PCP0] = {
480 .type = VCAP_FIELD_U32,
484 [VCAP_KF_8021Q_TPID1] = {
485 .type = VCAP_FIELD_BIT,
489 [VCAP_KF_8021Q_VID1] = {
490 .type = VCAP_FIELD_U32,
494 [VCAP_KF_8021Q_DEI1] = {
495 .type = VCAP_FIELD_BIT,
499 [VCAP_KF_8021Q_PCP1] = {
500 .type = VCAP_FIELD_U32,
504 [VCAP_KF_L2_DMAC] = {
505 .type = VCAP_FIELD_U48,
509 [VCAP_KF_L2_SMAC] = {
510 .type = VCAP_FIELD_U48,
514 [VCAP_KF_ETYPE_LEN_IS] = {
515 .type = VCAP_FIELD_BIT,
520 .type = VCAP_FIELD_U32,
524 [VCAP_KF_IP_SNAP_IS] = {
525 .type = VCAP_FIELD_BIT,
530 .type = VCAP_FIELD_BIT,
534 [VCAP_KF_L3_FRAGMENT] = {
535 .type = VCAP_FIELD_BIT,
539 [VCAP_KF_L3_FRAG_OFS_GT0] = {
540 .type = VCAP_FIELD_BIT,
544 [VCAP_KF_L3_OPTIONS_IS] = {
545 .type = VCAP_FIELD_BIT,
549 [VCAP_KF_L3_DSCP] = {
550 .type = VCAP_FIELD_U32,
554 [VCAP_KF_L3_IP6_DIP_MSB] = {
555 .type = VCAP_FIELD_U32,
559 [VCAP_KF_L3_IP6_DIP] = {
560 .type = VCAP_FIELD_U64,
564 [VCAP_KF_L3_IP6_SIP_MSB] = {
565 .type = VCAP_FIELD_U32,
569 [VCAP_KF_L3_IP6_SIP] = {
570 .type = VCAP_FIELD_U64,
574 [VCAP_KF_TCP_UDP_IS] = {
575 .type = VCAP_FIELD_BIT,
580 .type = VCAP_FIELD_BIT,
584 [VCAP_KF_L4_SPORT] = {
585 .type = VCAP_FIELD_U32,
590 .type = VCAP_FIELD_U32,
596 static const struct vcap_field is1_5tuple_ip6_keyfield[] = {
598 .type = VCAP_FIELD_U32,
602 [VCAP_KF_LOOKUP_INDEX] = {
603 .type = VCAP_FIELD_U32,
607 [VCAP_KF_IF_IGR_PORT_MASK] = {
608 .type = VCAP_FIELD_U32,
612 [VCAP_KF_L2_MC_IS] = {
613 .type = VCAP_FIELD_BIT,
617 [VCAP_KF_L2_BC_IS] = {
618 .type = VCAP_FIELD_BIT,
622 [VCAP_KF_IP_MC_IS] = {
623 .type = VCAP_FIELD_BIT,
627 [VCAP_KF_8021CB_R_TAGGED_IS] = {
628 .type = VCAP_FIELD_BIT,
632 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
633 .type = VCAP_FIELD_BIT,
637 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = {
638 .type = VCAP_FIELD_BIT,
642 [VCAP_KF_8021Q_TPID0] = {
643 .type = VCAP_FIELD_BIT,
647 [VCAP_KF_8021Q_VID0] = {
648 .type = VCAP_FIELD_U32,
652 [VCAP_KF_8021Q_DEI0] = {
653 .type = VCAP_FIELD_BIT,
657 [VCAP_KF_8021Q_PCP0] = {
658 .type = VCAP_FIELD_U32,
662 [VCAP_KF_8021Q_TPID1] = {
663 .type = VCAP_FIELD_BIT,
667 [VCAP_KF_8021Q_VID1] = {
668 .type = VCAP_FIELD_U32,
672 [VCAP_KF_8021Q_DEI1] = {
673 .type = VCAP_FIELD_BIT,
677 [VCAP_KF_8021Q_PCP1] = {
678 .type = VCAP_FIELD_U32,
682 [VCAP_KF_L3_DSCP] = {
683 .type = VCAP_FIELD_U32,
687 [VCAP_KF_L3_IP6_DIP] = {
688 .type = VCAP_FIELD_U128,
692 [VCAP_KF_L3_IP6_SIP] = {
693 .type = VCAP_FIELD_U128,
697 [VCAP_KF_L3_IP_PROTO] = {
698 .type = VCAP_FIELD_U32,
702 [VCAP_KF_TCP_UDP_IS] = {
703 .type = VCAP_FIELD_BIT,
708 .type = VCAP_FIELD_U32,
712 [VCAP_KF_IP_PAYLOAD_5TUPLE] = {
713 .type = VCAP_FIELD_U32,
719 static const struct vcap_field is1_dbl_vid_keyfield[] = {
721 .type = VCAP_FIELD_U32,
725 [VCAP_KF_LOOKUP_INDEX] = {
726 .type = VCAP_FIELD_U32,
730 [VCAP_KF_IF_IGR_PORT_MASK] = {
731 .type = VCAP_FIELD_U32,
735 [VCAP_KF_L2_MC_IS] = {
736 .type = VCAP_FIELD_BIT,
740 [VCAP_KF_L2_BC_IS] = {
741 .type = VCAP_FIELD_BIT,
745 [VCAP_KF_IP_MC_IS] = {
746 .type = VCAP_FIELD_BIT,
750 [VCAP_KF_8021CB_R_TAGGED_IS] = {
751 .type = VCAP_FIELD_BIT,
755 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
756 .type = VCAP_FIELD_BIT,
760 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = {
761 .type = VCAP_FIELD_BIT,
765 [VCAP_KF_8021Q_TPID0] = {
766 .type = VCAP_FIELD_BIT,
770 [VCAP_KF_8021Q_VID0] = {
771 .type = VCAP_FIELD_U32,
775 [VCAP_KF_8021Q_DEI0] = {
776 .type = VCAP_FIELD_BIT,
780 [VCAP_KF_8021Q_PCP0] = {
781 .type = VCAP_FIELD_U32,
785 [VCAP_KF_8021Q_TPID1] = {
786 .type = VCAP_FIELD_BIT,
790 [VCAP_KF_8021Q_VID1] = {
791 .type = VCAP_FIELD_U32,
795 [VCAP_KF_8021Q_DEI1] = {
796 .type = VCAP_FIELD_BIT,
800 [VCAP_KF_8021Q_PCP1] = {
801 .type = VCAP_FIELD_U32,
805 [VCAP_KF_ETYPE_LEN_IS] = {
806 .type = VCAP_FIELD_BIT,
811 .type = VCAP_FIELD_U32,
815 [VCAP_KF_IP_SNAP_IS] = {
816 .type = VCAP_FIELD_BIT,
821 .type = VCAP_FIELD_BIT,
825 [VCAP_KF_L3_FRAGMENT] = {
826 .type = VCAP_FIELD_BIT,
830 [VCAP_KF_L3_FRAG_OFS_GT0] = {
831 .type = VCAP_FIELD_BIT,
835 [VCAP_KF_L3_OPTIONS_IS] = {
836 .type = VCAP_FIELD_BIT,
840 [VCAP_KF_L3_DSCP] = {
841 .type = VCAP_FIELD_U32,
845 [VCAP_KF_TCP_UDP_IS] = {
846 .type = VCAP_FIELD_BIT,
851 .type = VCAP_FIELD_BIT,
857 static const struct vcap_field is1_rt_keyfield[] = {
859 .type = VCAP_FIELD_U32,
863 [VCAP_KF_LOOKUP_FIRST_IS] = {
864 .type = VCAP_FIELD_BIT,
868 [VCAP_KF_IF_IGR_PORT] = {
869 .type = VCAP_FIELD_U32,
873 [VCAP_KF_8021CB_R_TAGGED_IS] = {
874 .type = VCAP_FIELD_BIT,
878 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
879 .type = VCAP_FIELD_BIT,
883 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = {
884 .type = VCAP_FIELD_BIT,
889 .type = VCAP_FIELD_U48,
893 [VCAP_KF_RT_VLAN_IDX] = {
894 .type = VCAP_FIELD_U32,
898 [VCAP_KF_RT_TYPE] = {
899 .type = VCAP_FIELD_U32,
903 [VCAP_KF_RT_FRMID] = {
904 .type = VCAP_FIELD_U32,
910 static const struct vcap_field is1_dmac_vid_keyfield[] = {
912 .type = VCAP_FIELD_U32,
916 [VCAP_KF_LOOKUP_INDEX] = {
917 .type = VCAP_FIELD_U32,
921 [VCAP_KF_IF_IGR_PORT_MASK] = {
922 .type = VCAP_FIELD_U32,
926 [VCAP_KF_8021CB_R_TAGGED_IS] = {
927 .type = VCAP_FIELD_BIT,
931 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
932 .type = VCAP_FIELD_BIT,
936 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = {
937 .type = VCAP_FIELD_BIT,
941 [VCAP_KF_8021Q_TPID0] = {
942 .type = VCAP_FIELD_BIT,
946 [VCAP_KF_8021Q_VID0] = {
947 .type = VCAP_FIELD_U32,
951 [VCAP_KF_8021Q_DEI0] = {
952 .type = VCAP_FIELD_BIT,
956 [VCAP_KF_8021Q_PCP0] = {
957 .type = VCAP_FIELD_U32,
961 [VCAP_KF_L2_DMAC] = {
962 .type = VCAP_FIELD_U48,
968 static const struct vcap_field is2_mac_etype_keyfield[] = {
970 .type = VCAP_FIELD_U32,
974 [VCAP_KF_LOOKUP_FIRST_IS] = {
975 .type = VCAP_FIELD_BIT,
979 [VCAP_KF_LOOKUP_PAG] = {
980 .type = VCAP_FIELD_U32,
984 [VCAP_KF_IF_IGR_PORT_MASK] = {
985 .type = VCAP_FIELD_U32,
989 [VCAP_KF_ISDX_GT0_IS] = {
990 .type = VCAP_FIELD_BIT,
994 [VCAP_KF_HOST_MATCH] = {
995 .type = VCAP_FIELD_BIT,
999 [VCAP_KF_L2_MC_IS] = {
1000 .type = VCAP_FIELD_BIT,
1004 [VCAP_KF_L2_BC_IS] = {
1005 .type = VCAP_FIELD_BIT,
1009 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1010 .type = VCAP_FIELD_BIT,
1014 [VCAP_KF_8021Q_VID_CLS] = {
1015 .type = VCAP_FIELD_U32,
1019 [VCAP_KF_8021Q_DEI_CLS] = {
1020 .type = VCAP_FIELD_BIT,
1024 [VCAP_KF_8021Q_PCP_CLS] = {
1025 .type = VCAP_FIELD_U32,
1029 [VCAP_KF_L2_DMAC] = {
1030 .type = VCAP_FIELD_U48,
1034 [VCAP_KF_L2_SMAC] = {
1035 .type = VCAP_FIELD_U48,
1040 .type = VCAP_FIELD_U32,
1044 [VCAP_KF_L2_FRM_TYPE] = {
1045 .type = VCAP_FIELD_U32,
1049 [VCAP_KF_L2_PAYLOAD0] = {
1050 .type = VCAP_FIELD_U32,
1054 [VCAP_KF_L2_PAYLOAD1] = {
1055 .type = VCAP_FIELD_U32,
1059 [VCAP_KF_L2_PAYLOAD2] = {
1060 .type = VCAP_FIELD_U32,
1066 static const struct vcap_field is2_mac_llc_keyfield[] = {
1068 .type = VCAP_FIELD_U32,
1072 [VCAP_KF_LOOKUP_FIRST_IS] = {
1073 .type = VCAP_FIELD_BIT,
1077 [VCAP_KF_LOOKUP_PAG] = {
1078 .type = VCAP_FIELD_U32,
1082 [VCAP_KF_IF_IGR_PORT_MASK] = {
1083 .type = VCAP_FIELD_U32,
1087 [VCAP_KF_ISDX_GT0_IS] = {
1088 .type = VCAP_FIELD_BIT,
1092 [VCAP_KF_HOST_MATCH] = {
1093 .type = VCAP_FIELD_BIT,
1097 [VCAP_KF_L2_MC_IS] = {
1098 .type = VCAP_FIELD_BIT,
1102 [VCAP_KF_L2_BC_IS] = {
1103 .type = VCAP_FIELD_BIT,
1107 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1108 .type = VCAP_FIELD_BIT,
1112 [VCAP_KF_8021Q_VID_CLS] = {
1113 .type = VCAP_FIELD_U32,
1117 [VCAP_KF_8021Q_DEI_CLS] = {
1118 .type = VCAP_FIELD_BIT,
1122 [VCAP_KF_8021Q_PCP_CLS] = {
1123 .type = VCAP_FIELD_U32,
1127 [VCAP_KF_L2_DMAC] = {
1128 .type = VCAP_FIELD_U48,
1132 [VCAP_KF_L2_SMAC] = {
1133 .type = VCAP_FIELD_U48,
1137 [VCAP_KF_L2_LLC] = {
1138 .type = VCAP_FIELD_U48,
1144 static const struct vcap_field is2_mac_snap_keyfield[] = {
1146 .type = VCAP_FIELD_U32,
1150 [VCAP_KF_LOOKUP_FIRST_IS] = {
1151 .type = VCAP_FIELD_BIT,
1155 [VCAP_KF_LOOKUP_PAG] = {
1156 .type = VCAP_FIELD_U32,
1160 [VCAP_KF_IF_IGR_PORT_MASK] = {
1161 .type = VCAP_FIELD_U32,
1165 [VCAP_KF_ISDX_GT0_IS] = {
1166 .type = VCAP_FIELD_BIT,
1170 [VCAP_KF_HOST_MATCH] = {
1171 .type = VCAP_FIELD_BIT,
1175 [VCAP_KF_L2_MC_IS] = {
1176 .type = VCAP_FIELD_BIT,
1180 [VCAP_KF_L2_BC_IS] = {
1181 .type = VCAP_FIELD_BIT,
1185 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1186 .type = VCAP_FIELD_BIT,
1190 [VCAP_KF_8021Q_VID_CLS] = {
1191 .type = VCAP_FIELD_U32,
1195 [VCAP_KF_8021Q_DEI_CLS] = {
1196 .type = VCAP_FIELD_BIT,
1200 [VCAP_KF_8021Q_PCP_CLS] = {
1201 .type = VCAP_FIELD_U32,
1205 [VCAP_KF_L2_DMAC] = {
1206 .type = VCAP_FIELD_U48,
1210 [VCAP_KF_L2_SMAC] = {
1211 .type = VCAP_FIELD_U48,
1215 [VCAP_KF_L2_SNAP] = {
1216 .type = VCAP_FIELD_U48,
1222 static const struct vcap_field is2_arp_keyfield[] = {
1224 .type = VCAP_FIELD_U32,
1228 [VCAP_KF_LOOKUP_FIRST_IS] = {
1229 .type = VCAP_FIELD_BIT,
1233 [VCAP_KF_LOOKUP_PAG] = {
1234 .type = VCAP_FIELD_U32,
1238 [VCAP_KF_IF_IGR_PORT_MASK] = {
1239 .type = VCAP_FIELD_U32,
1243 [VCAP_KF_ISDX_GT0_IS] = {
1244 .type = VCAP_FIELD_BIT,
1248 [VCAP_KF_HOST_MATCH] = {
1249 .type = VCAP_FIELD_BIT,
1253 [VCAP_KF_L2_MC_IS] = {
1254 .type = VCAP_FIELD_BIT,
1258 [VCAP_KF_L2_BC_IS] = {
1259 .type = VCAP_FIELD_BIT,
1263 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1264 .type = VCAP_FIELD_BIT,
1268 [VCAP_KF_8021Q_VID_CLS] = {
1269 .type = VCAP_FIELD_U32,
1273 [VCAP_KF_8021Q_DEI_CLS] = {
1274 .type = VCAP_FIELD_BIT,
1278 [VCAP_KF_8021Q_PCP_CLS] = {
1279 .type = VCAP_FIELD_U32,
1283 [VCAP_KF_L2_SMAC] = {
1284 .type = VCAP_FIELD_U48,
1288 [VCAP_KF_ARP_ADDR_SPACE_OK_IS] = {
1289 .type = VCAP_FIELD_BIT,
1293 [VCAP_KF_ARP_PROTO_SPACE_OK_IS] = {
1294 .type = VCAP_FIELD_BIT,
1298 [VCAP_KF_ARP_LEN_OK_IS] = {
1299 .type = VCAP_FIELD_BIT,
1303 [VCAP_KF_ARP_TGT_MATCH_IS] = {
1304 .type = VCAP_FIELD_BIT,
1308 [VCAP_KF_ARP_SENDER_MATCH_IS] = {
1309 .type = VCAP_FIELD_BIT,
1313 [VCAP_KF_ARP_OPCODE_UNKNOWN_IS] = {
1314 .type = VCAP_FIELD_BIT,
1318 [VCAP_KF_ARP_OPCODE] = {
1319 .type = VCAP_FIELD_U32,
1323 [VCAP_KF_L3_IP4_DIP] = {
1324 .type = VCAP_FIELD_U32,
1328 [VCAP_KF_L3_IP4_SIP] = {
1329 .type = VCAP_FIELD_U32,
1333 [VCAP_KF_L3_DIP_EQ_SIP_IS] = {
1334 .type = VCAP_FIELD_BIT,
1340 static const struct vcap_field is2_ip4_tcp_udp_keyfield[] = {
1342 .type = VCAP_FIELD_U32,
1346 [VCAP_KF_LOOKUP_FIRST_IS] = {
1347 .type = VCAP_FIELD_BIT,
1351 [VCAP_KF_LOOKUP_PAG] = {
1352 .type = VCAP_FIELD_U32,
1356 [VCAP_KF_IF_IGR_PORT_MASK] = {
1357 .type = VCAP_FIELD_U32,
1361 [VCAP_KF_ISDX_GT0_IS] = {
1362 .type = VCAP_FIELD_BIT,
1366 [VCAP_KF_HOST_MATCH] = {
1367 .type = VCAP_FIELD_BIT,
1371 [VCAP_KF_L2_MC_IS] = {
1372 .type = VCAP_FIELD_BIT,
1376 [VCAP_KF_L2_BC_IS] = {
1377 .type = VCAP_FIELD_BIT,
1381 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1382 .type = VCAP_FIELD_BIT,
1386 [VCAP_KF_8021Q_VID_CLS] = {
1387 .type = VCAP_FIELD_U32,
1391 [VCAP_KF_8021Q_DEI_CLS] = {
1392 .type = VCAP_FIELD_BIT,
1396 [VCAP_KF_8021Q_PCP_CLS] = {
1397 .type = VCAP_FIELD_U32,
1401 [VCAP_KF_IP4_IS] = {
1402 .type = VCAP_FIELD_BIT,
1406 [VCAP_KF_L3_FRAGMENT] = {
1407 .type = VCAP_FIELD_BIT,
1411 [VCAP_KF_L3_FRAG_OFS_GT0] = {
1412 .type = VCAP_FIELD_BIT,
1416 [VCAP_KF_L3_OPTIONS_IS] = {
1417 .type = VCAP_FIELD_BIT,
1421 [VCAP_KF_L3_TTL_GT0] = {
1422 .type = VCAP_FIELD_BIT,
1426 [VCAP_KF_L3_TOS] = {
1427 .type = VCAP_FIELD_U32,
1431 [VCAP_KF_L3_IP4_DIP] = {
1432 .type = VCAP_FIELD_U32,
1436 [VCAP_KF_L3_IP4_SIP] = {
1437 .type = VCAP_FIELD_U32,
1441 [VCAP_KF_L3_DIP_EQ_SIP_IS] = {
1442 .type = VCAP_FIELD_BIT,
1446 [VCAP_KF_TCP_IS] = {
1447 .type = VCAP_FIELD_BIT,
1451 [VCAP_KF_L4_DPORT] = {
1452 .type = VCAP_FIELD_U32,
1456 [VCAP_KF_L4_SPORT] = {
1457 .type = VCAP_FIELD_U32,
1461 [VCAP_KF_L4_RNG] = {
1462 .type = VCAP_FIELD_U32,
1466 [VCAP_KF_L4_SPORT_EQ_DPORT_IS] = {
1467 .type = VCAP_FIELD_BIT,
1471 [VCAP_KF_L4_SEQUENCE_EQ0_IS] = {
1472 .type = VCAP_FIELD_BIT,
1476 [VCAP_KF_L4_FIN] = {
1477 .type = VCAP_FIELD_BIT,
1481 [VCAP_KF_L4_SYN] = {
1482 .type = VCAP_FIELD_BIT,
1486 [VCAP_KF_L4_RST] = {
1487 .type = VCAP_FIELD_BIT,
1491 [VCAP_KF_L4_PSH] = {
1492 .type = VCAP_FIELD_BIT,
1496 [VCAP_KF_L4_ACK] = {
1497 .type = VCAP_FIELD_BIT,
1501 [VCAP_KF_L4_URG] = {
1502 .type = VCAP_FIELD_BIT,
1506 [VCAP_KF_L4_1588_DOM] = {
1507 .type = VCAP_FIELD_U32,
1511 [VCAP_KF_L4_1588_VER] = {
1512 .type = VCAP_FIELD_U32,
1518 static const struct vcap_field is2_ip4_other_keyfield[] = {
1520 .type = VCAP_FIELD_U32,
1524 [VCAP_KF_LOOKUP_FIRST_IS] = {
1525 .type = VCAP_FIELD_BIT,
1529 [VCAP_KF_LOOKUP_PAG] = {
1530 .type = VCAP_FIELD_U32,
1534 [VCAP_KF_IF_IGR_PORT_MASK] = {
1535 .type = VCAP_FIELD_U32,
1539 [VCAP_KF_ISDX_GT0_IS] = {
1540 .type = VCAP_FIELD_BIT,
1544 [VCAP_KF_HOST_MATCH] = {
1545 .type = VCAP_FIELD_BIT,
1549 [VCAP_KF_L2_MC_IS] = {
1550 .type = VCAP_FIELD_BIT,
1554 [VCAP_KF_L2_BC_IS] = {
1555 .type = VCAP_FIELD_BIT,
1559 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1560 .type = VCAP_FIELD_BIT,
1564 [VCAP_KF_8021Q_VID_CLS] = {
1565 .type = VCAP_FIELD_U32,
1569 [VCAP_KF_8021Q_DEI_CLS] = {
1570 .type = VCAP_FIELD_BIT,
1574 [VCAP_KF_8021Q_PCP_CLS] = {
1575 .type = VCAP_FIELD_U32,
1579 [VCAP_KF_IP4_IS] = {
1580 .type = VCAP_FIELD_BIT,
1584 [VCAP_KF_L3_FRAGMENT] = {
1585 .type = VCAP_FIELD_BIT,
1589 [VCAP_KF_L3_FRAG_OFS_GT0] = {
1590 .type = VCAP_FIELD_BIT,
1594 [VCAP_KF_L3_OPTIONS_IS] = {
1595 .type = VCAP_FIELD_BIT,
1599 [VCAP_KF_L3_TTL_GT0] = {
1600 .type = VCAP_FIELD_BIT,
1604 [VCAP_KF_L3_TOS] = {
1605 .type = VCAP_FIELD_U32,
1609 [VCAP_KF_L3_IP4_DIP] = {
1610 .type = VCAP_FIELD_U32,
1614 [VCAP_KF_L3_IP4_SIP] = {
1615 .type = VCAP_FIELD_U32,
1619 [VCAP_KF_L3_DIP_EQ_SIP_IS] = {
1620 .type = VCAP_FIELD_BIT,
1624 [VCAP_KF_L3_IP_PROTO] = {
1625 .type = VCAP_FIELD_U32,
1629 [VCAP_KF_L3_PAYLOAD] = {
1630 .type = VCAP_FIELD_U56,
1636 static const struct vcap_field is2_ip6_std_keyfield[] = {
1638 .type = VCAP_FIELD_U32,
1642 [VCAP_KF_LOOKUP_FIRST_IS] = {
1643 .type = VCAP_FIELD_BIT,
1647 [VCAP_KF_LOOKUP_PAG] = {
1648 .type = VCAP_FIELD_U32,
1652 [VCAP_KF_IF_IGR_PORT_MASK] = {
1653 .type = VCAP_FIELD_U32,
1657 [VCAP_KF_ISDX_GT0_IS] = {
1658 .type = VCAP_FIELD_BIT,
1662 [VCAP_KF_HOST_MATCH] = {
1663 .type = VCAP_FIELD_BIT,
1667 [VCAP_KF_L2_MC_IS] = {
1668 .type = VCAP_FIELD_BIT,
1672 [VCAP_KF_L2_BC_IS] = {
1673 .type = VCAP_FIELD_BIT,
1677 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1678 .type = VCAP_FIELD_BIT,
1682 [VCAP_KF_8021Q_VID_CLS] = {
1683 .type = VCAP_FIELD_U32,
1687 [VCAP_KF_8021Q_DEI_CLS] = {
1688 .type = VCAP_FIELD_BIT,
1692 [VCAP_KF_8021Q_PCP_CLS] = {
1693 .type = VCAP_FIELD_U32,
1697 [VCAP_KF_L3_TTL_GT0] = {
1698 .type = VCAP_FIELD_BIT,
1702 [VCAP_KF_L3_IP6_SIP] = {
1703 .type = VCAP_FIELD_U128,
1707 [VCAP_KF_L3_IP_PROTO] = {
1708 .type = VCAP_FIELD_U32,
1714 static const struct vcap_field is2_oam_keyfield[] = {
1716 .type = VCAP_FIELD_U32,
1720 [VCAP_KF_LOOKUP_FIRST_IS] = {
1721 .type = VCAP_FIELD_BIT,
1725 [VCAP_KF_LOOKUP_PAG] = {
1726 .type = VCAP_FIELD_U32,
1730 [VCAP_KF_IF_IGR_PORT_MASK] = {
1731 .type = VCAP_FIELD_U32,
1735 [VCAP_KF_ISDX_GT0_IS] = {
1736 .type = VCAP_FIELD_BIT,
1740 [VCAP_KF_HOST_MATCH] = {
1741 .type = VCAP_FIELD_BIT,
1745 [VCAP_KF_L2_MC_IS] = {
1746 .type = VCAP_FIELD_BIT,
1750 [VCAP_KF_L2_BC_IS] = {
1751 .type = VCAP_FIELD_BIT,
1755 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1756 .type = VCAP_FIELD_BIT,
1760 [VCAP_KF_8021Q_VID_CLS] = {
1761 .type = VCAP_FIELD_U32,
1765 [VCAP_KF_8021Q_DEI_CLS] = {
1766 .type = VCAP_FIELD_BIT,
1770 [VCAP_KF_8021Q_PCP_CLS] = {
1771 .type = VCAP_FIELD_U32,
1775 [VCAP_KF_L2_DMAC] = {
1776 .type = VCAP_FIELD_U48,
1780 [VCAP_KF_L2_SMAC] = {
1781 .type = VCAP_FIELD_U48,
1785 [VCAP_KF_OAM_MEL_FLAGS] = {
1786 .type = VCAP_FIELD_U32,
1790 [VCAP_KF_OAM_VER] = {
1791 .type = VCAP_FIELD_U32,
1795 [VCAP_KF_OAM_OPCODE] = {
1796 .type = VCAP_FIELD_U32,
1800 [VCAP_KF_OAM_FLAGS] = {
1801 .type = VCAP_FIELD_U32,
1805 [VCAP_KF_OAM_MEPID] = {
1806 .type = VCAP_FIELD_U32,
1810 [VCAP_KF_OAM_CCM_CNTS_EQ0] = {
1811 .type = VCAP_FIELD_BIT,
1815 [VCAP_KF_OAM_Y1731_IS] = {
1816 .type = VCAP_FIELD_BIT,
1820 [VCAP_KF_OAM_DETECTED] = {
1821 .type = VCAP_FIELD_BIT,
1827 static const struct vcap_field is2_ip6_tcp_udp_keyfield[] = {
1829 .type = VCAP_FIELD_U32,
1833 [VCAP_KF_LOOKUP_FIRST_IS] = {
1834 .type = VCAP_FIELD_BIT,
1838 [VCAP_KF_LOOKUP_PAG] = {
1839 .type = VCAP_FIELD_U32,
1843 [VCAP_KF_IF_IGR_PORT_MASK] = {
1844 .type = VCAP_FIELD_U32,
1848 [VCAP_KF_ISDX_GT0_IS] = {
1849 .type = VCAP_FIELD_BIT,
1853 [VCAP_KF_HOST_MATCH] = {
1854 .type = VCAP_FIELD_BIT,
1858 [VCAP_KF_L2_MC_IS] = {
1859 .type = VCAP_FIELD_BIT,
1863 [VCAP_KF_L2_BC_IS] = {
1864 .type = VCAP_FIELD_BIT,
1868 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
1869 .type = VCAP_FIELD_BIT,
1873 [VCAP_KF_8021Q_VID_CLS] = {
1874 .type = VCAP_FIELD_U32,
1878 [VCAP_KF_8021Q_DEI_CLS] = {
1879 .type = VCAP_FIELD_BIT,
1883 [VCAP_KF_8021Q_PCP_CLS] = {
1884 .type = VCAP_FIELD_U32,
1888 [VCAP_KF_L3_TTL_GT0] = {
1889 .type = VCAP_FIELD_BIT,
1893 [VCAP_KF_L3_TOS] = {
1894 .type = VCAP_FIELD_U32,
1898 [VCAP_KF_L3_IP6_DIP] = {
1899 .type = VCAP_FIELD_U128,
1903 [VCAP_KF_L3_IP6_SIP] = {
1904 .type = VCAP_FIELD_U128,
1908 [VCAP_KF_L3_DIP_EQ_SIP_IS] = {
1909 .type = VCAP_FIELD_BIT,
1913 [VCAP_KF_TCP_IS] = {
1914 .type = VCAP_FIELD_BIT,
1918 [VCAP_KF_L4_DPORT] = {
1919 .type = VCAP_FIELD_U32,
1923 [VCAP_KF_L4_SPORT] = {
1924 .type = VCAP_FIELD_U32,
1928 [VCAP_KF_L4_RNG] = {
1929 .type = VCAP_FIELD_U32,
1933 [VCAP_KF_L4_SPORT_EQ_DPORT_IS] = {
1934 .type = VCAP_FIELD_BIT,
1938 [VCAP_KF_L4_SEQUENCE_EQ0_IS] = {
1939 .type = VCAP_FIELD_BIT,
1943 [VCAP_KF_L4_FIN] = {
1944 .type = VCAP_FIELD_BIT,
1948 [VCAP_KF_L4_SYN] = {
1949 .type = VCAP_FIELD_BIT,
1953 [VCAP_KF_L4_RST] = {
1954 .type = VCAP_FIELD_BIT,
1958 [VCAP_KF_L4_PSH] = {
1959 .type = VCAP_FIELD_BIT,
1963 [VCAP_KF_L4_ACK] = {
1964 .type = VCAP_FIELD_BIT,
1968 [VCAP_KF_L4_URG] = {
1969 .type = VCAP_FIELD_BIT,
1973 [VCAP_KF_L4_1588_DOM] = {
1974 .type = VCAP_FIELD_U32,
1978 [VCAP_KF_L4_1588_VER] = {
1979 .type = VCAP_FIELD_U32,
1985 static const struct vcap_field is2_ip6_other_keyfield[] = {
1987 .type = VCAP_FIELD_U32,
1991 [VCAP_KF_LOOKUP_FIRST_IS] = {
1992 .type = VCAP_FIELD_BIT,
1996 [VCAP_KF_LOOKUP_PAG] = {
1997 .type = VCAP_FIELD_U32,
2001 [VCAP_KF_IF_IGR_PORT_MASK] = {
2002 .type = VCAP_FIELD_U32,
2006 [VCAP_KF_ISDX_GT0_IS] = {
2007 .type = VCAP_FIELD_BIT,
2011 [VCAP_KF_HOST_MATCH] = {
2012 .type = VCAP_FIELD_BIT,
2016 [VCAP_KF_L2_MC_IS] = {
2017 .type = VCAP_FIELD_BIT,
2021 [VCAP_KF_L2_BC_IS] = {
2022 .type = VCAP_FIELD_BIT,
2026 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = {
2027 .type = VCAP_FIELD_BIT,
2031 [VCAP_KF_8021Q_VID_CLS] = {
2032 .type = VCAP_FIELD_U32,
2036 [VCAP_KF_8021Q_DEI_CLS] = {
2037 .type = VCAP_FIELD_BIT,
2041 [VCAP_KF_8021Q_PCP_CLS] = {
2042 .type = VCAP_FIELD_U32,
2046 [VCAP_KF_L3_TTL_GT0] = {
2047 .type = VCAP_FIELD_BIT,
2051 [VCAP_KF_L3_TOS] = {
2052 .type = VCAP_FIELD_U32,
2056 [VCAP_KF_L3_IP6_DIP] = {
2057 .type = VCAP_FIELD_U128,
2061 [VCAP_KF_L3_IP6_SIP] = {
2062 .type = VCAP_FIELD_U128,
2066 [VCAP_KF_L3_DIP_EQ_SIP_IS] = {
2067 .type = VCAP_FIELD_BIT,
2071 [VCAP_KF_L3_IP_PROTO] = {
2072 .type = VCAP_FIELD_U32,
2076 [VCAP_KF_L3_PAYLOAD] = {
2077 .type = VCAP_FIELD_U56,
2083 static const struct vcap_field is2_smac_sip4_keyfield[] = {
2084 [VCAP_KF_IF_IGR_PORT] = {
2085 .type = VCAP_FIELD_U32,
2089 [VCAP_KF_L2_SMAC] = {
2090 .type = VCAP_FIELD_U48,
2094 [VCAP_KF_L3_IP4_SIP] = {
2095 .type = VCAP_FIELD_U32,
2101 static const struct vcap_field is2_smac_sip6_keyfield[] = {
2103 .type = VCAP_FIELD_U32,
2107 [VCAP_KF_IF_IGR_PORT] = {
2108 .type = VCAP_FIELD_U32,
2112 [VCAP_KF_L2_SMAC] = {
2113 .type = VCAP_FIELD_U48,
2117 [VCAP_KF_L3_IP6_SIP] = {
2118 .type = VCAP_FIELD_U128,
2124 static const struct vcap_field es0_vid_keyfield[] = {
2125 [VCAP_KF_IF_EGR_PORT_NO] = {
2126 .type = VCAP_FIELD_U32,
2130 [VCAP_KF_IF_IGR_PORT] = {
2131 .type = VCAP_FIELD_U32,
2135 [VCAP_KF_ISDX_GT0_IS] = {
2136 .type = VCAP_FIELD_BIT,
2140 [VCAP_KF_ISDX_CLS] = {
2141 .type = VCAP_FIELD_U32,
2145 [VCAP_KF_L2_MC_IS] = {
2146 .type = VCAP_FIELD_BIT,
2150 [VCAP_KF_L2_BC_IS] = {
2151 .type = VCAP_FIELD_BIT,
2155 [VCAP_KF_8021Q_VID_CLS] = {
2156 .type = VCAP_FIELD_U32,
2160 [VCAP_KF_8021Q_DEI_CLS] = {
2161 .type = VCAP_FIELD_BIT,
2165 [VCAP_KF_8021Q_PCP_CLS] = {
2166 .type = VCAP_FIELD_U32,
2170 [VCAP_KF_L3_DPL_CLS] = {
2171 .type = VCAP_FIELD_BIT,
2175 [VCAP_KF_RTP_ID] = {
2176 .type = VCAP_FIELD_U32,
2180 [VCAP_KF_PDU_TYPE] = {
2181 .type = VCAP_FIELD_U32,
2188 static const struct vcap_set is1_keyfield_set[] = {
2189 [VCAP_KFS_NORMAL] = {
2194 [VCAP_KFS_5TUPLE_IP4] = {
2199 [VCAP_KFS_NORMAL_IP6] = {
2204 [VCAP_KFS_7TUPLE] = {
2209 [VCAP_KFS_5TUPLE_IP6] = {
2214 [VCAP_KFS_DBL_VID] = {
2224 [VCAP_KFS_DMAC_VID] = {
2231 static const struct vcap_set is2_keyfield_set[] = {
2232 [VCAP_KFS_MAC_ETYPE] = {
2237 [VCAP_KFS_MAC_LLC] = {
2242 [VCAP_KFS_MAC_SNAP] = {
2252 [VCAP_KFS_IP4_TCP_UDP] = {
2257 [VCAP_KFS_IP4_OTHER] = {
2262 [VCAP_KFS_IP6_STD] = {
2272 [VCAP_KFS_IP6_TCP_UDP] = {
2277 [VCAP_KFS_IP6_OTHER] = {
2282 [VCAP_KFS_SMAC_SIP4] = {
2287 [VCAP_KFS_SMAC_SIP6] = {
2294 static const struct vcap_set es0_keyfield_set[] = {
2302 /* keyfield_set map */
2303 static const struct vcap_field *is1_keyfield_set_map[] = {
2304 [VCAP_KFS_NORMAL] = is1_normal_keyfield,
2305 [VCAP_KFS_5TUPLE_IP4] = is1_5tuple_ip4_keyfield,
2306 [VCAP_KFS_NORMAL_IP6] = is1_normal_ip6_keyfield,
2307 [VCAP_KFS_7TUPLE] = is1_7tuple_keyfield,
2308 [VCAP_KFS_5TUPLE_IP6] = is1_5tuple_ip6_keyfield,
2309 [VCAP_KFS_DBL_VID] = is1_dbl_vid_keyfield,
2310 [VCAP_KFS_RT] = is1_rt_keyfield,
2311 [VCAP_KFS_DMAC_VID] = is1_dmac_vid_keyfield,
2314 static const struct vcap_field *is2_keyfield_set_map[] = {
2315 [VCAP_KFS_MAC_ETYPE] = is2_mac_etype_keyfield,
2316 [VCAP_KFS_MAC_LLC] = is2_mac_llc_keyfield,
2317 [VCAP_KFS_MAC_SNAP] = is2_mac_snap_keyfield,
2318 [VCAP_KFS_ARP] = is2_arp_keyfield,
2319 [VCAP_KFS_IP4_TCP_UDP] = is2_ip4_tcp_udp_keyfield,
2320 [VCAP_KFS_IP4_OTHER] = is2_ip4_other_keyfield,
2321 [VCAP_KFS_IP6_STD] = is2_ip6_std_keyfield,
2322 [VCAP_KFS_OAM] = is2_oam_keyfield,
2323 [VCAP_KFS_IP6_TCP_UDP] = is2_ip6_tcp_udp_keyfield,
2324 [VCAP_KFS_IP6_OTHER] = is2_ip6_other_keyfield,
2325 [VCAP_KFS_SMAC_SIP4] = is2_smac_sip4_keyfield,
2326 [VCAP_KFS_SMAC_SIP6] = is2_smac_sip6_keyfield,
2329 static const struct vcap_field *es0_keyfield_set_map[] = {
2330 [VCAP_KFS_VID] = es0_vid_keyfield,
2333 /* keyfield_set map sizes */
2334 static int is1_keyfield_set_map_size[] = {
2335 [VCAP_KFS_NORMAL] = ARRAY_SIZE(is1_normal_keyfield),
2336 [VCAP_KFS_5TUPLE_IP4] = ARRAY_SIZE(is1_5tuple_ip4_keyfield),
2337 [VCAP_KFS_NORMAL_IP6] = ARRAY_SIZE(is1_normal_ip6_keyfield),
2338 [VCAP_KFS_7TUPLE] = ARRAY_SIZE(is1_7tuple_keyfield),
2339 [VCAP_KFS_5TUPLE_IP6] = ARRAY_SIZE(is1_5tuple_ip6_keyfield),
2340 [VCAP_KFS_DBL_VID] = ARRAY_SIZE(is1_dbl_vid_keyfield),
2341 [VCAP_KFS_RT] = ARRAY_SIZE(is1_rt_keyfield),
2342 [VCAP_KFS_DMAC_VID] = ARRAY_SIZE(is1_dmac_vid_keyfield),
2345 static int is2_keyfield_set_map_size[] = {
2346 [VCAP_KFS_MAC_ETYPE] = ARRAY_SIZE(is2_mac_etype_keyfield),
2347 [VCAP_KFS_MAC_LLC] = ARRAY_SIZE(is2_mac_llc_keyfield),
2348 [VCAP_KFS_MAC_SNAP] = ARRAY_SIZE(is2_mac_snap_keyfield),
2349 [VCAP_KFS_ARP] = ARRAY_SIZE(is2_arp_keyfield),
2350 [VCAP_KFS_IP4_TCP_UDP] = ARRAY_SIZE(is2_ip4_tcp_udp_keyfield),
2351 [VCAP_KFS_IP4_OTHER] = ARRAY_SIZE(is2_ip4_other_keyfield),
2352 [VCAP_KFS_IP6_STD] = ARRAY_SIZE(is2_ip6_std_keyfield),
2353 [VCAP_KFS_OAM] = ARRAY_SIZE(is2_oam_keyfield),
2354 [VCAP_KFS_IP6_TCP_UDP] = ARRAY_SIZE(is2_ip6_tcp_udp_keyfield),
2355 [VCAP_KFS_IP6_OTHER] = ARRAY_SIZE(is2_ip6_other_keyfield),
2356 [VCAP_KFS_SMAC_SIP4] = ARRAY_SIZE(is2_smac_sip4_keyfield),
2357 [VCAP_KFS_SMAC_SIP6] = ARRAY_SIZE(is2_smac_sip6_keyfield),
2360 static int es0_keyfield_set_map_size[] = {
2361 [VCAP_KFS_VID] = ARRAY_SIZE(es0_vid_keyfield),
2365 static const struct vcap_field is1_s1_actionfield[] = {
2367 .type = VCAP_FIELD_BIT,
2371 [VCAP_AF_DSCP_ENA] = {
2372 .type = VCAP_FIELD_BIT,
2376 [VCAP_AF_DSCP_VAL] = {
2377 .type = VCAP_FIELD_U32,
2381 [VCAP_AF_QOS_ENA] = {
2382 .type = VCAP_FIELD_BIT,
2386 [VCAP_AF_QOS_VAL] = {
2387 .type = VCAP_FIELD_U32,
2391 [VCAP_AF_DP_ENA] = {
2392 .type = VCAP_FIELD_BIT,
2396 [VCAP_AF_DP_VAL] = {
2397 .type = VCAP_FIELD_BIT,
2401 [VCAP_AF_PAG_OVERRIDE_MASK] = {
2402 .type = VCAP_FIELD_U32,
2406 [VCAP_AF_PAG_VAL] = {
2407 .type = VCAP_FIELD_U32,
2411 [VCAP_AF_ISDX_REPLACE_ENA] = {
2412 .type = VCAP_FIELD_BIT,
2416 [VCAP_AF_ISDX_ADD_VAL] = {
2417 .type = VCAP_FIELD_U32,
2421 [VCAP_AF_VID_REPLACE_ENA] = {
2422 .type = VCAP_FIELD_BIT,
2426 [VCAP_AF_VID_VAL] = {
2427 .type = VCAP_FIELD_U32,
2431 [VCAP_AF_PCP_ENA] = {
2432 .type = VCAP_FIELD_BIT,
2436 [VCAP_AF_PCP_VAL] = {
2437 .type = VCAP_FIELD_U32,
2441 [VCAP_AF_DEI_ENA] = {
2442 .type = VCAP_FIELD_BIT,
2446 [VCAP_AF_DEI_VAL] = {
2447 .type = VCAP_FIELD_BIT,
2451 [VCAP_AF_VLAN_POP_CNT_ENA] = {
2452 .type = VCAP_FIELD_BIT,
2456 [VCAP_AF_VLAN_POP_CNT] = {
2457 .type = VCAP_FIELD_U32,
2461 [VCAP_AF_CUSTOM_ACE_TYPE_ENA] = {
2462 .type = VCAP_FIELD_U32,
2466 [VCAP_AF_SFID_ENA] = {
2467 .type = VCAP_FIELD_BIT,
2471 [VCAP_AF_SFID_VAL] = {
2472 .type = VCAP_FIELD_U32,
2476 [VCAP_AF_SGID_ENA] = {
2477 .type = VCAP_FIELD_BIT,
2481 [VCAP_AF_SGID_VAL] = {
2482 .type = VCAP_FIELD_U32,
2486 [VCAP_AF_POLICE_ENA] = {
2487 .type = VCAP_FIELD_BIT,
2491 [VCAP_AF_POLICE_IDX] = {
2492 .type = VCAP_FIELD_U32,
2496 [VCAP_AF_OAM_SEL] = {
2497 .type = VCAP_FIELD_U32,
2501 [VCAP_AF_MRP_SEL] = {
2502 .type = VCAP_FIELD_U32,
2506 [VCAP_AF_DLR_SEL] = {
2507 .type = VCAP_FIELD_U32,
2513 static const struct vcap_field is2_base_type_actionfield[] = {
2514 [VCAP_AF_HIT_ME_ONCE] = {
2515 .type = VCAP_FIELD_BIT,
2519 [VCAP_AF_CPU_COPY_ENA] = {
2520 .type = VCAP_FIELD_BIT,
2524 [VCAP_AF_CPU_QUEUE_NUM] = {
2525 .type = VCAP_FIELD_U32,
2529 [VCAP_AF_MASK_MODE] = {
2530 .type = VCAP_FIELD_U32,
2534 [VCAP_AF_MIRROR_ENA] = {
2535 .type = VCAP_FIELD_BIT,
2539 [VCAP_AF_LRN_DIS] = {
2540 .type = VCAP_FIELD_BIT,
2544 [VCAP_AF_POLICE_ENA] = {
2545 .type = VCAP_FIELD_BIT,
2549 [VCAP_AF_POLICE_IDX] = {
2550 .type = VCAP_FIELD_U32,
2554 [VCAP_AF_POLICE_VCAP_ONLY] = {
2555 .type = VCAP_FIELD_BIT,
2559 [VCAP_AF_PORT_MASK] = {
2560 .type = VCAP_FIELD_U32,
2564 [VCAP_AF_REW_OP] = {
2565 .type = VCAP_FIELD_U32,
2569 [VCAP_AF_ISDX_ENA] = {
2570 .type = VCAP_FIELD_BIT,
2574 [VCAP_AF_ACL_ID] = {
2575 .type = VCAP_FIELD_U32,
2581 static const struct vcap_field is2_smac_sip_actionfield[] = {
2582 [VCAP_AF_CPU_COPY_ENA] = {
2583 .type = VCAP_FIELD_BIT,
2587 [VCAP_AF_CPU_QUEUE_NUM] = {
2588 .type = VCAP_FIELD_U32,
2592 [VCAP_AF_FWD_KILL_ENA] = {
2593 .type = VCAP_FIELD_BIT,
2597 [VCAP_AF_HOST_MATCH] = {
2598 .type = VCAP_FIELD_BIT,
2604 static const struct vcap_field es0_vid_actionfield[] = {
2605 [VCAP_AF_PUSH_OUTER_TAG] = {
2606 .type = VCAP_FIELD_U32,
2610 [VCAP_AF_PUSH_INNER_TAG] = {
2611 .type = VCAP_FIELD_BIT,
2615 [VCAP_AF_TAG_A_TPID_SEL] = {
2616 .type = VCAP_FIELD_U32,
2620 [VCAP_AF_TAG_A_VID_SEL] = {
2621 .type = VCAP_FIELD_BIT,
2625 [VCAP_AF_TAG_A_PCP_SEL] = {
2626 .type = VCAP_FIELD_U32,
2630 [VCAP_AF_TAG_A_DEI_SEL] = {
2631 .type = VCAP_FIELD_U32,
2635 [VCAP_AF_TAG_B_TPID_SEL] = {
2636 .type = VCAP_FIELD_U32,
2640 [VCAP_AF_TAG_B_VID_SEL] = {
2641 .type = VCAP_FIELD_BIT,
2645 [VCAP_AF_TAG_B_PCP_SEL] = {
2646 .type = VCAP_FIELD_U32,
2650 [VCAP_AF_TAG_B_DEI_SEL] = {
2651 .type = VCAP_FIELD_U32,
2655 [VCAP_AF_VID_A_VAL] = {
2656 .type = VCAP_FIELD_U32,
2660 [VCAP_AF_PCP_A_VAL] = {
2661 .type = VCAP_FIELD_U32,
2665 [VCAP_AF_DEI_A_VAL] = {
2666 .type = VCAP_FIELD_BIT,
2670 [VCAP_AF_VID_B_VAL] = {
2671 .type = VCAP_FIELD_U32,
2675 [VCAP_AF_PCP_B_VAL] = {
2676 .type = VCAP_FIELD_U32,
2680 [VCAP_AF_DEI_B_VAL] = {
2681 .type = VCAP_FIELD_BIT,
2686 .type = VCAP_FIELD_U32,
2692 /* actionfield_set */
2693 static const struct vcap_set is1_actionfield_set[] = {
2701 static const struct vcap_set is2_actionfield_set[] = {
2702 [VCAP_AFS_BASE_TYPE] = {
2707 [VCAP_AFS_SMAC_SIP] = {
2714 static const struct vcap_set es0_actionfield_set[] = {
2722 /* actionfield_set map */
2723 static const struct vcap_field *is1_actionfield_set_map[] = {
2724 [VCAP_AFS_S1] = is1_s1_actionfield,
2727 static const struct vcap_field *is2_actionfield_set_map[] = {
2728 [VCAP_AFS_BASE_TYPE] = is2_base_type_actionfield,
2729 [VCAP_AFS_SMAC_SIP] = is2_smac_sip_actionfield,
2732 static const struct vcap_field *es0_actionfield_set_map[] = {
2733 [VCAP_AFS_VID] = es0_vid_actionfield,
2736 /* actionfield_set map size */
2737 static int is1_actionfield_set_map_size[] = {
2738 [VCAP_AFS_S1] = ARRAY_SIZE(is1_s1_actionfield),
2741 static int is2_actionfield_set_map_size[] = {
2742 [VCAP_AFS_BASE_TYPE] = ARRAY_SIZE(is2_base_type_actionfield),
2743 [VCAP_AFS_SMAC_SIP] = ARRAY_SIZE(is2_smac_sip_actionfield),
2746 static int es0_actionfield_set_map_size[] = {
2747 [VCAP_AFS_VID] = ARRAY_SIZE(es0_vid_actionfield),
2751 static const struct vcap_typegroup is1_x4_keyfield_set_typegroups[] = {
2775 static const struct vcap_typegroup is1_x2_keyfield_set_typegroups[] = {
2789 static const struct vcap_typegroup is1_x1_keyfield_set_typegroups[] = {
2798 static const struct vcap_typegroup is2_x4_keyfield_set_typegroups[] = {
2822 static const struct vcap_typegroup is2_x2_keyfield_set_typegroups[] = {
2836 static const struct vcap_typegroup is2_x1_keyfield_set_typegroups[] = {
2845 static const struct vcap_typegroup es0_x1_keyfield_set_typegroups[] = {
2849 static const struct vcap_typegroup *is1_keyfield_set_typegroups[] = {
2850 [4] = is1_x4_keyfield_set_typegroups,
2851 [2] = is1_x2_keyfield_set_typegroups,
2852 [1] = is1_x1_keyfield_set_typegroups,
2856 static const struct vcap_typegroup *is2_keyfield_set_typegroups[] = {
2857 [4] = is2_x4_keyfield_set_typegroups,
2858 [2] = is2_x2_keyfield_set_typegroups,
2859 [1] = is2_x1_keyfield_set_typegroups,
2863 static const struct vcap_typegroup *es0_keyfield_set_typegroups[] = {
2864 [1] = es0_x1_keyfield_set_typegroups,
2868 static const struct vcap_typegroup is1_x1_actionfield_set_typegroups[] = {
2872 static const struct vcap_typegroup is2_x2_actionfield_set_typegroups[] = {
2886 static const struct vcap_typegroup is2_x1_actionfield_set_typegroups[] = {
2895 static const struct vcap_typegroup es0_x1_actionfield_set_typegroups[] = {
2899 static const struct vcap_typegroup *is1_actionfield_set_typegroups[] = {
2900 [1] = is1_x1_actionfield_set_typegroups,
2904 static const struct vcap_typegroup *is2_actionfield_set_typegroups[] = {
2905 [2] = is2_x2_actionfield_set_typegroups,
2906 [1] = is2_x1_actionfield_set_typegroups,
2910 static const struct vcap_typegroup *es0_actionfield_set_typegroups[] = {
2911 [1] = es0_x1_actionfield_set_typegroups,
2915 /* Keyfieldset names */
2916 static const char * const vcap_keyfield_set_names[] = {
2917 [VCAP_KFS_NO_VALUE] = "(None)",
2918 [VCAP_KFS_5TUPLE_IP4] = "VCAP_KFS_5TUPLE_IP4",
2919 [VCAP_KFS_5TUPLE_IP6] = "VCAP_KFS_5TUPLE_IP6",
2920 [VCAP_KFS_7TUPLE] = "VCAP_KFS_7TUPLE",
2921 [VCAP_KFS_ARP] = "VCAP_KFS_ARP",
2922 [VCAP_KFS_DBL_VID] = "VCAP_KFS_DBL_VID",
2923 [VCAP_KFS_DMAC_VID] = "VCAP_KFS_DMAC_VID",
2924 [VCAP_KFS_ETAG] = "VCAP_KFS_ETAG",
2925 [VCAP_KFS_IP4_OTHER] = "VCAP_KFS_IP4_OTHER",
2926 [VCAP_KFS_IP4_TCP_UDP] = "VCAP_KFS_IP4_TCP_UDP",
2927 [VCAP_KFS_IP4_VID] = "VCAP_KFS_IP4_VID",
2928 [VCAP_KFS_IP6_OTHER] = "VCAP_KFS_IP6_OTHER",
2929 [VCAP_KFS_IP6_STD] = "VCAP_KFS_IP6_STD",
2930 [VCAP_KFS_IP6_TCP_UDP] = "VCAP_KFS_IP6_TCP_UDP",
2931 [VCAP_KFS_IP6_VID] = "VCAP_KFS_IP6_VID",
2932 [VCAP_KFS_IP_7TUPLE] = "VCAP_KFS_IP_7TUPLE",
2933 [VCAP_KFS_ISDX] = "VCAP_KFS_ISDX",
2934 [VCAP_KFS_LL_FULL] = "VCAP_KFS_LL_FULL",
2935 [VCAP_KFS_MAC_ETYPE] = "VCAP_KFS_MAC_ETYPE",
2936 [VCAP_KFS_MAC_LLC] = "VCAP_KFS_MAC_LLC",
2937 [VCAP_KFS_MAC_SNAP] = "VCAP_KFS_MAC_SNAP",
2938 [VCAP_KFS_NORMAL] = "VCAP_KFS_NORMAL",
2939 [VCAP_KFS_NORMAL_5TUPLE_IP4] = "VCAP_KFS_NORMAL_5TUPLE_IP4",
2940 [VCAP_KFS_NORMAL_7TUPLE] = "VCAP_KFS_NORMAL_7TUPLE",
2941 [VCAP_KFS_NORMAL_IP6] = "VCAP_KFS_NORMAL_IP6",
2942 [VCAP_KFS_OAM] = "VCAP_KFS_OAM",
2943 [VCAP_KFS_PURE_5TUPLE_IP4] = "VCAP_KFS_PURE_5TUPLE_IP4",
2944 [VCAP_KFS_RT] = "VCAP_KFS_RT",
2945 [VCAP_KFS_SMAC_SIP4] = "VCAP_KFS_SMAC_SIP4",
2946 [VCAP_KFS_SMAC_SIP6] = "VCAP_KFS_SMAC_SIP6",
2947 [VCAP_KFS_VID] = "VCAP_KFS_VID",
2950 /* Actionfieldset names */
2951 static const char * const vcap_actionfield_set_names[] = {
2952 [VCAP_AFS_NO_VALUE] = "(None)",
2953 [VCAP_AFS_BASE_TYPE] = "VCAP_AFS_BASE_TYPE",
2954 [VCAP_AFS_CLASSIFICATION] = "VCAP_AFS_CLASSIFICATION",
2955 [VCAP_AFS_CLASS_REDUCED] = "VCAP_AFS_CLASS_REDUCED",
2956 [VCAP_AFS_ES0] = "VCAP_AFS_ES0",
2957 [VCAP_AFS_FULL] = "VCAP_AFS_FULL",
2958 [VCAP_AFS_S1] = "VCAP_AFS_S1",
2959 [VCAP_AFS_SMAC_SIP] = "VCAP_AFS_SMAC_SIP",
2960 [VCAP_AFS_VID] = "VCAP_AFS_VID",
2963 /* Keyfield names */
2964 static const char * const vcap_keyfield_names[] = {
2965 [VCAP_KF_NO_VALUE] = "(None)",
2966 [VCAP_KF_8021BR_ECID_BASE] = "8021BR_ECID_BASE",
2967 [VCAP_KF_8021BR_ECID_EXT] = "8021BR_ECID_EXT",
2968 [VCAP_KF_8021BR_E_TAGGED] = "8021BR_E_TAGGED",
2969 [VCAP_KF_8021BR_GRP] = "8021BR_GRP",
2970 [VCAP_KF_8021BR_IGR_ECID_BASE] = "8021BR_IGR_ECID_BASE",
2971 [VCAP_KF_8021BR_IGR_ECID_EXT] = "8021BR_IGR_ECID_EXT",
2972 [VCAP_KF_8021CB_R_TAGGED_IS] = "8021CB_R_TAGGED_IS",
2973 [VCAP_KF_8021Q_DEI0] = "8021Q_DEI0",
2974 [VCAP_KF_8021Q_DEI1] = "8021Q_DEI1",
2975 [VCAP_KF_8021Q_DEI2] = "8021Q_DEI2",
2976 [VCAP_KF_8021Q_DEI_CLS] = "8021Q_DEI_CLS",
2977 [VCAP_KF_8021Q_PCP0] = "8021Q_PCP0",
2978 [VCAP_KF_8021Q_PCP1] = "8021Q_PCP1",
2979 [VCAP_KF_8021Q_PCP2] = "8021Q_PCP2",
2980 [VCAP_KF_8021Q_PCP_CLS] = "8021Q_PCP_CLS",
2981 [VCAP_KF_8021Q_TPID] = "8021Q_TPID",
2982 [VCAP_KF_8021Q_TPID0] = "8021Q_TPID0",
2983 [VCAP_KF_8021Q_TPID1] = "8021Q_TPID1",
2984 [VCAP_KF_8021Q_TPID2] = "8021Q_TPID2",
2985 [VCAP_KF_8021Q_VID0] = "8021Q_VID0",
2986 [VCAP_KF_8021Q_VID1] = "8021Q_VID1",
2987 [VCAP_KF_8021Q_VID2] = "8021Q_VID2",
2988 [VCAP_KF_8021Q_VID_CLS] = "8021Q_VID_CLS",
2989 [VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS] = "8021Q_VLAN_DBL_TAGGED_IS",
2990 [VCAP_KF_8021Q_VLAN_TAGGED_IS] = "8021Q_VLAN_TAGGED_IS",
2991 [VCAP_KF_8021Q_VLAN_TAGS] = "8021Q_VLAN_TAGS",
2992 [VCAP_KF_ACL_GRP_ID] = "ACL_GRP_ID",
2993 [VCAP_KF_ARP_ADDR_SPACE_OK_IS] = "ARP_ADDR_SPACE_OK_IS",
2994 [VCAP_KF_ARP_LEN_OK_IS] = "ARP_LEN_OK_IS",
2995 [VCAP_KF_ARP_OPCODE] = "ARP_OPCODE",
2996 [VCAP_KF_ARP_OPCODE_UNKNOWN_IS] = "ARP_OPCODE_UNKNOWN_IS",
2997 [VCAP_KF_ARP_PROTO_SPACE_OK_IS] = "ARP_PROTO_SPACE_OK_IS",
2998 [VCAP_KF_ARP_SENDER_MATCH_IS] = "ARP_SENDER_MATCH_IS",
2999 [VCAP_KF_ARP_TGT_MATCH_IS] = "ARP_TGT_MATCH_IS",
3000 [VCAP_KF_COSID_CLS] = "COSID_CLS",
3001 [VCAP_KF_ES0_ISDX_KEY_ENA] = "ES0_ISDX_KEY_ENA",
3002 [VCAP_KF_ETYPE] = "ETYPE",
3003 [VCAP_KF_ETYPE_LEN_IS] = "ETYPE_LEN_IS",
3004 [VCAP_KF_HOST_MATCH] = "HOST_MATCH",
3005 [VCAP_KF_IF_EGR_PORT_MASK] = "IF_EGR_PORT_MASK",
3006 [VCAP_KF_IF_EGR_PORT_MASK_RNG] = "IF_EGR_PORT_MASK_RNG",
3007 [VCAP_KF_IF_EGR_PORT_NO] = "IF_EGR_PORT_NO",
3008 [VCAP_KF_IF_IGR_PORT] = "IF_IGR_PORT",
3009 [VCAP_KF_IF_IGR_PORT_MASK] = "IF_IGR_PORT_MASK",
3010 [VCAP_KF_IF_IGR_PORT_MASK_L3] = "IF_IGR_PORT_MASK_L3",
3011 [VCAP_KF_IF_IGR_PORT_MASK_RNG] = "IF_IGR_PORT_MASK_RNG",
3012 [VCAP_KF_IF_IGR_PORT_MASK_SEL] = "IF_IGR_PORT_MASK_SEL",
3013 [VCAP_KF_IF_IGR_PORT_SEL] = "IF_IGR_PORT_SEL",
3014 [VCAP_KF_IP4_IS] = "IP4_IS",
3015 [VCAP_KF_IP_MC_IS] = "IP_MC_IS",
3016 [VCAP_KF_IP_PAYLOAD_5TUPLE] = "IP_PAYLOAD_5TUPLE",
3017 [VCAP_KF_IP_PAYLOAD_S1_IP6] = "IP_PAYLOAD_S1_IP6",
3018 [VCAP_KF_IP_SNAP_IS] = "IP_SNAP_IS",
3019 [VCAP_KF_ISDX_CLS] = "ISDX_CLS",
3020 [VCAP_KF_ISDX_GT0_IS] = "ISDX_GT0_IS",
3021 [VCAP_KF_L2_BC_IS] = "L2_BC_IS",
3022 [VCAP_KF_L2_DMAC] = "L2_DMAC",
3023 [VCAP_KF_L2_FRM_TYPE] = "L2_FRM_TYPE",
3024 [VCAP_KF_L2_FWD_IS] = "L2_FWD_IS",
3025 [VCAP_KF_L2_LLC] = "L2_LLC",
3026 [VCAP_KF_L2_MAC] = "L2_MAC",
3027 [VCAP_KF_L2_MC_IS] = "L2_MC_IS",
3028 [VCAP_KF_L2_PAYLOAD0] = "L2_PAYLOAD0",
3029 [VCAP_KF_L2_PAYLOAD1] = "L2_PAYLOAD1",
3030 [VCAP_KF_L2_PAYLOAD2] = "L2_PAYLOAD2",
3031 [VCAP_KF_L2_PAYLOAD_ETYPE] = "L2_PAYLOAD_ETYPE",
3032 [VCAP_KF_L2_SMAC] = "L2_SMAC",
3033 [VCAP_KF_L2_SNAP] = "L2_SNAP",
3034 [VCAP_KF_L3_DIP_EQ_SIP_IS] = "L3_DIP_EQ_SIP_IS",
3035 [VCAP_KF_L3_DPL_CLS] = "L3_DPL_CLS",
3036 [VCAP_KF_L3_DSCP] = "L3_DSCP",
3037 [VCAP_KF_L3_DST_IS] = "L3_DST_IS",
3038 [VCAP_KF_L3_FRAGMENT] = "L3_FRAGMENT",
3039 [VCAP_KF_L3_FRAGMENT_TYPE] = "L3_FRAGMENT_TYPE",
3040 [VCAP_KF_L3_FRAG_INVLD_L4_LEN] = "L3_FRAG_INVLD_L4_LEN",
3041 [VCAP_KF_L3_FRAG_OFS_GT0] = "L3_FRAG_OFS_GT0",
3042 [VCAP_KF_L3_IP4_DIP] = "L3_IP4_DIP",
3043 [VCAP_KF_L3_IP4_SIP] = "L3_IP4_SIP",
3044 [VCAP_KF_L3_IP6_DIP] = "L3_IP6_DIP",
3045 [VCAP_KF_L3_IP6_DIP_MSB] = "L3_IP6_DIP_MSB",
3046 [VCAP_KF_L3_IP6_SIP] = "L3_IP6_SIP",
3047 [VCAP_KF_L3_IP6_SIP_MSB] = "L3_IP6_SIP_MSB",
3048 [VCAP_KF_L3_IP_PROTO] = "L3_IP_PROTO",
3049 [VCAP_KF_L3_OPTIONS_IS] = "L3_OPTIONS_IS",
3050 [VCAP_KF_L3_PAYLOAD] = "L3_PAYLOAD",
3051 [VCAP_KF_L3_RT_IS] = "L3_RT_IS",
3052 [VCAP_KF_L3_TOS] = "L3_TOS",
3053 [VCAP_KF_L3_TTL_GT0] = "L3_TTL_GT0",
3054 [VCAP_KF_L4_1588_DOM] = "L4_1588_DOM",
3055 [VCAP_KF_L4_1588_VER] = "L4_1588_VER",
3056 [VCAP_KF_L4_ACK] = "L4_ACK",
3057 [VCAP_KF_L4_DPORT] = "L4_DPORT",
3058 [VCAP_KF_L4_FIN] = "L4_FIN",
3059 [VCAP_KF_L4_PAYLOAD] = "L4_PAYLOAD",
3060 [VCAP_KF_L4_PSH] = "L4_PSH",
3061 [VCAP_KF_L4_RNG] = "L4_RNG",
3062 [VCAP_KF_L4_RST] = "L4_RST",
3063 [VCAP_KF_L4_SEQUENCE_EQ0_IS] = "L4_SEQUENCE_EQ0_IS",
3064 [VCAP_KF_L4_SPORT] = "L4_SPORT",
3065 [VCAP_KF_L4_SPORT_EQ_DPORT_IS] = "L4_SPORT_EQ_DPORT_IS",
3066 [VCAP_KF_L4_SYN] = "L4_SYN",
3067 [VCAP_KF_L4_URG] = "L4_URG",
3068 [VCAP_KF_LOOKUP_FIRST_IS] = "LOOKUP_FIRST_IS",
3069 [VCAP_KF_LOOKUP_GEN_IDX] = "LOOKUP_GEN_IDX",
3070 [VCAP_KF_LOOKUP_GEN_IDX_SEL] = "LOOKUP_GEN_IDX_SEL",
3071 [VCAP_KF_LOOKUP_INDEX] = "LOOKUP_INDEX",
3072 [VCAP_KF_LOOKUP_PAG] = "LOOKUP_PAG",
3073 [VCAP_KF_MIRROR_PROBE] = "MIRROR_PROBE",
3074 [VCAP_KF_OAM_CCM_CNTS_EQ0] = "OAM_CCM_CNTS_EQ0",
3075 [VCAP_KF_OAM_DETECTED] = "OAM_DETECTED",
3076 [VCAP_KF_OAM_FLAGS] = "OAM_FLAGS",
3077 [VCAP_KF_OAM_MEL_FLAGS] = "OAM_MEL_FLAGS",
3078 [VCAP_KF_OAM_MEPID] = "OAM_MEPID",
3079 [VCAP_KF_OAM_OPCODE] = "OAM_OPCODE",
3080 [VCAP_KF_OAM_VER] = "OAM_VER",
3081 [VCAP_KF_OAM_Y1731_IS] = "OAM_Y1731_IS",
3082 [VCAP_KF_PDU_TYPE] = "PDU_TYPE",
3083 [VCAP_KF_PROT_ACTIVE] = "PROT_ACTIVE",
3084 [VCAP_KF_RTP_ID] = "RTP_ID",
3085 [VCAP_KF_RT_FRMID] = "RT_FRMID",
3086 [VCAP_KF_RT_TYPE] = "RT_TYPE",
3087 [VCAP_KF_RT_VLAN_IDX] = "RT_VLAN_IDX",
3088 [VCAP_KF_TCP_IS] = "TCP_IS",
3089 [VCAP_KF_TCP_UDP_IS] = "TCP_UDP_IS",
3090 [VCAP_KF_TYPE] = "TYPE",
3093 /* Actionfield names */
3094 static const char * const vcap_actionfield_names[] = {
3095 [VCAP_AF_NO_VALUE] = "(None)",
3096 [VCAP_AF_ACL_ID] = "ACL_ID",
3097 [VCAP_AF_CLS_VID_SEL] = "CLS_VID_SEL",
3098 [VCAP_AF_CNT_ID] = "CNT_ID",
3099 [VCAP_AF_COPY_PORT_NUM] = "COPY_PORT_NUM",
3100 [VCAP_AF_COPY_QUEUE_NUM] = "COPY_QUEUE_NUM",
3101 [VCAP_AF_CPU_COPY_ENA] = "CPU_COPY_ENA",
3102 [VCAP_AF_CPU_QU] = "CPU_QU",
3103 [VCAP_AF_CPU_QUEUE_NUM] = "CPU_QUEUE_NUM",
3104 [VCAP_AF_CUSTOM_ACE_TYPE_ENA] = "CUSTOM_ACE_TYPE_ENA",
3105 [VCAP_AF_DEI_A_VAL] = "DEI_A_VAL",
3106 [VCAP_AF_DEI_B_VAL] = "DEI_B_VAL",
3107 [VCAP_AF_DEI_C_VAL] = "DEI_C_VAL",
3108 [VCAP_AF_DEI_ENA] = "DEI_ENA",
3109 [VCAP_AF_DEI_VAL] = "DEI_VAL",
3110 [VCAP_AF_DLR_SEL] = "DLR_SEL",
3111 [VCAP_AF_DP_ENA] = "DP_ENA",
3112 [VCAP_AF_DP_VAL] = "DP_VAL",
3113 [VCAP_AF_DSCP_ENA] = "DSCP_ENA",
3114 [VCAP_AF_DSCP_SEL] = "DSCP_SEL",
3115 [VCAP_AF_DSCP_VAL] = "DSCP_VAL",
3116 [VCAP_AF_ES2_REW_CMD] = "ES2_REW_CMD",
3117 [VCAP_AF_ESDX] = "ESDX",
3118 [VCAP_AF_FWD_KILL_ENA] = "FWD_KILL_ENA",
3119 [VCAP_AF_FWD_MODE] = "FWD_MODE",
3120 [VCAP_AF_FWD_SEL] = "FWD_SEL",
3121 [VCAP_AF_HIT_ME_ONCE] = "HIT_ME_ONCE",
3122 [VCAP_AF_HOST_MATCH] = "HOST_MATCH",
3123 [VCAP_AF_IGNORE_PIPELINE_CTRL] = "IGNORE_PIPELINE_CTRL",
3124 [VCAP_AF_INTR_ENA] = "INTR_ENA",
3125 [VCAP_AF_ISDX_ADD_REPLACE_SEL] = "ISDX_ADD_REPLACE_SEL",
3126 [VCAP_AF_ISDX_ADD_VAL] = "ISDX_ADD_VAL",
3127 [VCAP_AF_ISDX_ENA] = "ISDX_ENA",
3128 [VCAP_AF_ISDX_REPLACE_ENA] = "ISDX_REPLACE_ENA",
3129 [VCAP_AF_ISDX_VAL] = "ISDX_VAL",
3130 [VCAP_AF_LOOP_ENA] = "LOOP_ENA",
3131 [VCAP_AF_LRN_DIS] = "LRN_DIS",
3132 [VCAP_AF_MAP_IDX] = "MAP_IDX",
3133 [VCAP_AF_MAP_KEY] = "MAP_KEY",
3134 [VCAP_AF_MAP_LOOKUP_SEL] = "MAP_LOOKUP_SEL",
3135 [VCAP_AF_MASK_MODE] = "MASK_MODE",
3136 [VCAP_AF_MATCH_ID] = "MATCH_ID",
3137 [VCAP_AF_MATCH_ID_MASK] = "MATCH_ID_MASK",
3138 [VCAP_AF_MIRROR_ENA] = "MIRROR_ENA",
3139 [VCAP_AF_MIRROR_PROBE] = "MIRROR_PROBE",
3140 [VCAP_AF_MIRROR_PROBE_ID] = "MIRROR_PROBE_ID",
3141 [VCAP_AF_MRP_SEL] = "MRP_SEL",
3142 [VCAP_AF_NXT_IDX] = "NXT_IDX",
3143 [VCAP_AF_NXT_IDX_CTRL] = "NXT_IDX_CTRL",
3144 [VCAP_AF_OAM_SEL] = "OAM_SEL",
3145 [VCAP_AF_PAG_OVERRIDE_MASK] = "PAG_OVERRIDE_MASK",
3146 [VCAP_AF_PAG_VAL] = "PAG_VAL",
3147 [VCAP_AF_PCP_A_VAL] = "PCP_A_VAL",
3148 [VCAP_AF_PCP_B_VAL] = "PCP_B_VAL",
3149 [VCAP_AF_PCP_C_VAL] = "PCP_C_VAL",
3150 [VCAP_AF_PCP_ENA] = "PCP_ENA",
3151 [VCAP_AF_PCP_VAL] = "PCP_VAL",
3152 [VCAP_AF_PIPELINE_ACT] = "PIPELINE_ACT",
3153 [VCAP_AF_PIPELINE_FORCE_ENA] = "PIPELINE_FORCE_ENA",
3154 [VCAP_AF_PIPELINE_PT] = "PIPELINE_PT",
3155 [VCAP_AF_POLICE_ENA] = "POLICE_ENA",
3156 [VCAP_AF_POLICE_IDX] = "POLICE_IDX",
3157 [VCAP_AF_POLICE_REMARK] = "POLICE_REMARK",
3158 [VCAP_AF_POLICE_VCAP_ONLY] = "POLICE_VCAP_ONLY",
3159 [VCAP_AF_POP_VAL] = "POP_VAL",
3160 [VCAP_AF_PORT_MASK] = "PORT_MASK",
3161 [VCAP_AF_PUSH_CUSTOMER_TAG] = "PUSH_CUSTOMER_TAG",
3162 [VCAP_AF_PUSH_INNER_TAG] = "PUSH_INNER_TAG",
3163 [VCAP_AF_PUSH_OUTER_TAG] = "PUSH_OUTER_TAG",
3164 [VCAP_AF_QOS_ENA] = "QOS_ENA",
3165 [VCAP_AF_QOS_VAL] = "QOS_VAL",
3166 [VCAP_AF_REW_OP] = "REW_OP",
3167 [VCAP_AF_RT_DIS] = "RT_DIS",
3168 [VCAP_AF_SFID_ENA] = "SFID_ENA",
3169 [VCAP_AF_SFID_VAL] = "SFID_VAL",
3170 [VCAP_AF_SGID_ENA] = "SGID_ENA",
3171 [VCAP_AF_SGID_VAL] = "SGID_VAL",
3172 [VCAP_AF_SWAP_MACS_ENA] = "SWAP_MACS_ENA",
3173 [VCAP_AF_TAG_A_DEI_SEL] = "TAG_A_DEI_SEL",
3174 [VCAP_AF_TAG_A_PCP_SEL] = "TAG_A_PCP_SEL",
3175 [VCAP_AF_TAG_A_TPID_SEL] = "TAG_A_TPID_SEL",
3176 [VCAP_AF_TAG_A_VID_SEL] = "TAG_A_VID_SEL",
3177 [VCAP_AF_TAG_B_DEI_SEL] = "TAG_B_DEI_SEL",
3178 [VCAP_AF_TAG_B_PCP_SEL] = "TAG_B_PCP_SEL",
3179 [VCAP_AF_TAG_B_TPID_SEL] = "TAG_B_TPID_SEL",
3180 [VCAP_AF_TAG_B_VID_SEL] = "TAG_B_VID_SEL",
3181 [VCAP_AF_TAG_C_DEI_SEL] = "TAG_C_DEI_SEL",
3182 [VCAP_AF_TAG_C_PCP_SEL] = "TAG_C_PCP_SEL",
3183 [VCAP_AF_TAG_C_TPID_SEL] = "TAG_C_TPID_SEL",
3184 [VCAP_AF_TAG_C_VID_SEL] = "TAG_C_VID_SEL",
3185 [VCAP_AF_TYPE] = "TYPE",
3186 [VCAP_AF_UNTAG_VID_ENA] = "UNTAG_VID_ENA",
3187 [VCAP_AF_VID_A_VAL] = "VID_A_VAL",
3188 [VCAP_AF_VID_B_VAL] = "VID_B_VAL",
3189 [VCAP_AF_VID_C_VAL] = "VID_C_VAL",
3190 [VCAP_AF_VID_REPLACE_ENA] = "VID_REPLACE_ENA",
3191 [VCAP_AF_VID_VAL] = "VID_VAL",
3192 [VCAP_AF_VLAN_POP_CNT] = "VLAN_POP_CNT",
3193 [VCAP_AF_VLAN_POP_CNT_ENA] = "VLAN_POP_CNT_ENA",
3197 const struct vcap_info lan966x_vcaps[] = {
3206 .require_cnt_dis = 1,
3208 .keyfield_set = is1_keyfield_set,
3209 .keyfield_set_size = ARRAY_SIZE(is1_keyfield_set),
3210 .actionfield_set = is1_actionfield_set,
3211 .actionfield_set_size = ARRAY_SIZE(is1_actionfield_set),
3212 .keyfield_set_map = is1_keyfield_set_map,
3213 .keyfield_set_map_size = is1_keyfield_set_map_size,
3214 .actionfield_set_map = is1_actionfield_set_map,
3215 .actionfield_set_map_size = is1_actionfield_set_map_size,
3216 .keyfield_set_typegroups = is1_keyfield_set_typegroups,
3217 .actionfield_set_typegroups = is1_actionfield_set_typegroups,
3227 .require_cnt_dis = 1,
3229 .keyfield_set = is2_keyfield_set,
3230 .keyfield_set_size = ARRAY_SIZE(is2_keyfield_set),
3231 .actionfield_set = is2_actionfield_set,
3232 .actionfield_set_size = ARRAY_SIZE(is2_actionfield_set),
3233 .keyfield_set_map = is2_keyfield_set_map,
3234 .keyfield_set_map_size = is2_keyfield_set_map_size,
3235 .actionfield_set_map = is2_actionfield_set_map,
3236 .actionfield_set_map_size = is2_actionfield_set_map_size,
3237 .keyfield_set_typegroups = is2_keyfield_set_typegroups,
3238 .actionfield_set_typegroups = is2_actionfield_set_typegroups,
3248 .require_cnt_dis = 0,
3250 .keyfield_set = es0_keyfield_set,
3251 .keyfield_set_size = ARRAY_SIZE(es0_keyfield_set),
3252 .actionfield_set = es0_actionfield_set,
3253 .actionfield_set_size = ARRAY_SIZE(es0_actionfield_set),
3254 .keyfield_set_map = es0_keyfield_set_map,
3255 .keyfield_set_map_size = es0_keyfield_set_map_size,
3256 .actionfield_set_map = es0_actionfield_set_map,
3257 .actionfield_set_map_size = es0_actionfield_set_map_size,
3258 .keyfield_set_typegroups = es0_keyfield_set_typegroups,
3259 .actionfield_set_typegroups = es0_actionfield_set_typegroups,
3263 const struct vcap_statistics lan966x_vcap_stats = {
3266 .keyfield_set_names = vcap_keyfield_set_names,
3267 .actionfield_set_names = vcap_actionfield_set_names,
3268 .keyfield_names = vcap_keyfield_names,
3269 .actionfield_names = vcap_actionfield_names,