1 // SPDX-License-Identifier: GPL-2.0
3 * MIPI Camera Control Interface (CCI) register access helpers.
8 #include <linux/bitfield.h>
9 #include <linux/delay.h>
10 #include <linux/dev_printk.h>
11 #include <linux/module.h>
12 #include <linux/regmap.h>
13 #include <linux/types.h>
15 #include <linux/unaligned.h>
17 #include <media/v4l2-cci.h>
19 int cci_read(struct regmap *map, u32 reg, u64 *val, int *err)
27 * TODO: Fix smatch. Assign *val to 0 here in order to avoid
28 * failing a smatch check on caller when the caller proceeds to
29 * read *val without initialising it on caller's side. *val is set
30 * to a valid value whenever this function returns 0 but smatch
31 * can't figure that out currently.
38 little_endian = reg & CCI_REG_LE;
39 len = CCI_REG_WIDTH_BYTES(reg);
40 reg = CCI_REG_ADDR(reg);
42 ret = regmap_bulk_read(map, reg, buf, len);
44 dev_err(regmap_get_device(map), "Error reading reg 0x%04x: %d\n",
55 *val = get_unaligned_le16(buf);
57 *val = get_unaligned_be16(buf);
61 *val = get_unaligned_le24(buf);
63 *val = get_unaligned_be24(buf);
67 *val = get_unaligned_le32(buf);
69 *val = get_unaligned_be32(buf);
73 *val = get_unaligned_le64(buf);
75 *val = get_unaligned_be64(buf);
78 dev_err(regmap_get_device(map), "Error invalid reg-width %u for reg 0x%04x\n",
90 EXPORT_SYMBOL_GPL(cci_read);
92 int cci_write(struct regmap *map, u32 reg, u64 val, int *err)
102 little_endian = reg & CCI_REG_LE;
103 len = CCI_REG_WIDTH_BYTES(reg);
104 reg = CCI_REG_ADDR(reg);
112 put_unaligned_le16(val, buf);
114 put_unaligned_be16(val, buf);
118 put_unaligned_le24(val, buf);
120 put_unaligned_be24(val, buf);
124 put_unaligned_le32(val, buf);
126 put_unaligned_be32(val, buf);
130 put_unaligned_le64(val, buf);
132 put_unaligned_be64(val, buf);
135 dev_err(regmap_get_device(map), "Error invalid reg-width %u for reg 0x%04x\n",
141 ret = regmap_bulk_write(map, reg, buf, len);
143 dev_err(regmap_get_device(map), "Error writing reg 0x%04x: %d\n",
152 EXPORT_SYMBOL_GPL(cci_write);
154 int cci_update_bits(struct regmap *map, u32 reg, u64 mask, u64 val, int *err)
159 ret = cci_read(map, reg, &readval, err);
163 val = (readval & ~mask) | (val & mask);
165 return cci_write(map, reg, val, err);
167 EXPORT_SYMBOL_GPL(cci_update_bits);
169 int cci_multi_reg_write(struct regmap *map, const struct cci_reg_sequence *regs,
170 unsigned int num_regs, int *err)
175 for (i = 0; i < num_regs; i++) {
176 ret = cci_write(map, regs[i].reg, regs[i].val, err);
183 EXPORT_SYMBOL_GPL(cci_multi_reg_write);
185 #if IS_ENABLED(CONFIG_V4L2_CCI_I2C)
186 struct regmap *devm_cci_regmap_init_i2c(struct i2c_client *client,
189 struct regmap_config config = {
190 .reg_bits = reg_addr_bits,
192 .reg_format_endian = REGMAP_ENDIAN_BIG,
193 .disable_locking = true,
196 return devm_regmap_init_i2c(client, &config);
198 EXPORT_SYMBOL_GPL(devm_cci_regmap_init_i2c);
201 MODULE_LICENSE("GPL");
203 MODULE_DESCRIPTION("MIPI Camera Control Interface (CCI) support");