1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STM32 Digital Camera Memory Interface
5 * Copyright (C) STMicroelectronics SA 2017
8 * for STMicroelectronics.
10 * This driver is based on atmel_isi.c
14 #include <linux/clk.h>
15 #include <linux/completion.h>
16 #include <linux/delay.h>
17 #include <linux/dmaengine.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
23 #include <linux/of_graph.h>
24 #include <linux/pinctrl/consumer.h>
25 #include <linux/platform_device.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/reset.h>
28 #include <linux/videodev2.h>
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-dev.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-ioctl.h>
37 #include <media/v4l2-rect.h>
38 #include <media/videobuf2-dma-contig.h>
40 #define DRV_NAME "stm32-dcmi"
42 /* Registers offset for DCMI */
43 #define DCMI_CR 0x00 /* Control Register */
44 #define DCMI_SR 0x04 /* Status Register */
45 #define DCMI_RIS 0x08 /* Raw Interrupt Status register */
46 #define DCMI_IER 0x0C /* Interrupt Enable Register */
47 #define DCMI_MIS 0x10 /* Masked Interrupt Status register */
48 #define DCMI_ICR 0x14 /* Interrupt Clear Register */
49 #define DCMI_ESCR 0x18 /* Embedded Synchronization Code Register */
50 #define DCMI_ESUR 0x1C /* Embedded Synchronization Unmask Register */
51 #define DCMI_CWSTRT 0x20 /* Crop Window STaRT */
52 #define DCMI_CWSIZE 0x24 /* Crop Window SIZE */
53 #define DCMI_DR 0x28 /* Data Register */
54 #define DCMI_IDR 0x2C /* IDentifier Register */
56 /* Bits definition for control register (DCMI_CR) */
57 #define CR_CAPTURE BIT(0)
59 #define CR_CROP BIT(2)
60 #define CR_JPEG BIT(3)
62 #define CR_PCKPOL BIT(5)
63 #define CR_HSPOL BIT(6)
64 #define CR_VSPOL BIT(7)
65 #define CR_FCRC_0 BIT(8)
66 #define CR_FCRC_1 BIT(9)
67 #define CR_EDM_0 BIT(10)
68 #define CR_EDM_1 BIT(11)
69 #define CR_ENABLE BIT(14)
71 /* Bits definition for status register (DCMI_SR) */
72 #define SR_HSYNC BIT(0)
73 #define SR_VSYNC BIT(1)
77 * Bits definition for interrupt registers
78 * (DCMI_RIS, DCMI_IER, DCMI_MIS, DCMI_ICR)
80 #define IT_FRAME BIT(0)
83 #define IT_VSYNC BIT(3)
84 #define IT_LINE BIT(4)
93 #define MAX_WIDTH 2592U
94 #define MIN_HEIGHT 16U
95 #define MAX_HEIGHT 2592U
97 #define TIMEOUT_MS 1000
99 #define OVERRUN_ERROR_THRESHOLD 3
107 struct dcmi_framesize {
113 struct vb2_v4l2_buffer vb;
117 struct list_head list;
121 /* Protects the access of variables shared within the interrupt */
125 struct resource *res;
126 struct reset_control *rstc;
128 struct list_head buffers;
129 struct dcmi_buf *active;
132 struct v4l2_device v4l2_dev;
133 struct video_device *vdev;
134 struct v4l2_async_notifier notifier;
135 struct v4l2_subdev *source;
136 struct v4l2_subdev *s_subdev;
137 struct v4l2_format fmt;
138 struct v4l2_rect crop;
141 const struct dcmi_format **sd_formats;
142 unsigned int num_of_sd_formats;
143 const struct dcmi_format *sd_format;
144 struct dcmi_framesize *sd_framesizes;
145 unsigned int num_of_sd_framesizes;
146 struct dcmi_framesize sd_framesize;
147 struct v4l2_rect sd_bounds;
149 /* Protect this data structure */
151 struct vb2_queue queue;
153 struct v4l2_mbus_config_parallel bus;
154 enum v4l2_mbus_type bus_type;
155 struct completion complete;
158 struct dma_chan *dma_chan;
159 dma_cookie_t dma_cookie;
166 /* Ensure DMA operations atomicity */
167 struct mutex dma_lock;
169 struct media_device mdev;
170 struct media_pad vid_cap_pad;
171 struct media_pipeline pipeline;
174 static inline struct stm32_dcmi *notifier_to_dcmi(struct v4l2_async_notifier *n)
176 return container_of(n, struct stm32_dcmi, notifier);
179 static inline u32 reg_read(void __iomem *base, u32 reg)
181 return readl_relaxed(base + reg);
184 static inline void reg_write(void __iomem *base, u32 reg, u32 val)
186 writel_relaxed(val, base + reg);
189 static inline void reg_set(void __iomem *base, u32 reg, u32 mask)
191 reg_write(base, reg, reg_read(base, reg) | mask);
194 static inline void reg_clear(void __iomem *base, u32 reg, u32 mask)
196 reg_write(base, reg, reg_read(base, reg) & ~mask);
199 static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf);
201 static void dcmi_buffer_done(struct stm32_dcmi *dcmi,
202 struct dcmi_buf *buf,
206 struct vb2_v4l2_buffer *vbuf;
211 list_del_init(&buf->list);
215 vbuf->sequence = dcmi->sequence++;
216 vbuf->field = V4L2_FIELD_NONE;
217 vbuf->vb2_buf.timestamp = ktime_get_ns();
218 vb2_set_plane_payload(&vbuf->vb2_buf, 0, bytesused);
219 vb2_buffer_done(&vbuf->vb2_buf,
220 err ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
221 dev_dbg(dcmi->dev, "buffer[%d] done seq=%d, bytesused=%zu\n",
222 vbuf->vb2_buf.index, vbuf->sequence, bytesused);
224 dcmi->buffers_count++;
228 static int dcmi_restart_capture(struct stm32_dcmi *dcmi)
230 struct dcmi_buf *buf;
232 spin_lock_irq(&dcmi->irqlock);
234 if (dcmi->state != RUNNING) {
235 spin_unlock_irq(&dcmi->irqlock);
239 /* Restart a new DMA transfer with next buffer */
240 if (list_empty(&dcmi->buffers)) {
241 dev_dbg(dcmi->dev, "Capture restart is deferred to next buffer queueing\n");
242 dcmi->state = WAIT_FOR_BUFFER;
243 spin_unlock_irq(&dcmi->irqlock);
246 buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
249 spin_unlock_irq(&dcmi->irqlock);
251 return dcmi_start_capture(dcmi, buf);
254 static void dcmi_dma_callback(void *param)
256 struct stm32_dcmi *dcmi = (struct stm32_dcmi *)param;
257 struct dma_tx_state state;
258 enum dma_status status;
259 struct dcmi_buf *buf = dcmi->active;
261 spin_lock_irq(&dcmi->irqlock);
263 /* Check DMA status */
264 status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
267 case DMA_IN_PROGRESS:
268 dev_dbg(dcmi->dev, "%s: Received DMA_IN_PROGRESS\n", __func__);
271 dev_err(dcmi->dev, "%s: Received DMA_PAUSED\n", __func__);
274 dev_err(dcmi->dev, "%s: Received DMA_ERROR\n", __func__);
276 /* Return buffer to V4L2 in error state */
277 dcmi_buffer_done(dcmi, buf, 0, -EIO);
280 dev_dbg(dcmi->dev, "%s: Received DMA_COMPLETE\n", __func__);
282 /* Return buffer to V4L2 */
283 dcmi_buffer_done(dcmi, buf, buf->size, 0);
285 spin_unlock_irq(&dcmi->irqlock);
287 /* Restart capture */
288 if (dcmi_restart_capture(dcmi))
289 dev_err(dcmi->dev, "%s: Cannot restart capture on DMA complete\n",
293 dev_err(dcmi->dev, "%s: Received unknown status\n", __func__);
297 spin_unlock_irq(&dcmi->irqlock);
300 static int dcmi_start_dma(struct stm32_dcmi *dcmi,
301 struct dcmi_buf *buf)
303 struct dma_async_tx_descriptor *desc = NULL;
304 struct dma_slave_config config;
307 memset(&config, 0, sizeof(config));
309 config.src_addr = (dma_addr_t)dcmi->res->start + DCMI_DR;
310 config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
311 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
312 config.dst_maxburst = 4;
314 /* Configure DMA channel */
315 ret = dmaengine_slave_config(dcmi->dma_chan, &config);
317 dev_err(dcmi->dev, "%s: DMA channel config failed (%d)\n",
323 * Avoid call of dmaengine_terminate_sync() between
324 * dmaengine_prep_slave_single() and dmaengine_submit()
325 * by locking the whole DMA submission sequence
327 mutex_lock(&dcmi->dma_lock);
329 /* Prepare a DMA transaction */
330 desc = dmaengine_prep_slave_sg(dcmi->dma_chan, buf->sgt.sgl, buf->sgt.nents,
334 dev_err(dcmi->dev, "%s: DMA dmaengine_prep_slave_sg failed\n", __func__);
335 mutex_unlock(&dcmi->dma_lock);
339 /* Set completion callback routine for notification */
340 desc->callback = dcmi_dma_callback;
341 desc->callback_param = dcmi;
343 /* Push current DMA transaction in the pending queue */
344 dcmi->dma_cookie = dmaengine_submit(desc);
345 if (dma_submit_error(dcmi->dma_cookie)) {
346 dev_err(dcmi->dev, "%s: DMA submission failed\n", __func__);
347 mutex_unlock(&dcmi->dma_lock);
351 mutex_unlock(&dcmi->dma_lock);
353 dma_async_issue_pending(dcmi->dma_chan);
358 static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf)
365 ret = dcmi_start_dma(dcmi, buf);
367 dcmi->errors_count++;
372 reg_set(dcmi->regs, DCMI_CR, CR_CAPTURE);
377 static void dcmi_set_crop(struct stm32_dcmi *dcmi)
381 /* Crop resolution */
382 size = ((dcmi->crop.height - 1) << 16) |
383 ((dcmi->crop.width << 1) - 1);
384 reg_write(dcmi->regs, DCMI_CWSIZE, size);
386 /* Crop start point */
387 start = ((dcmi->crop.top) << 16) |
388 ((dcmi->crop.left << 1));
389 reg_write(dcmi->regs, DCMI_CWSTRT, start);
391 dev_dbg(dcmi->dev, "Cropping to %ux%u@%u:%u\n",
392 dcmi->crop.width, dcmi->crop.height,
393 dcmi->crop.left, dcmi->crop.top);
396 reg_set(dcmi->regs, DCMI_CR, CR_CROP);
399 static void dcmi_process_jpeg(struct stm32_dcmi *dcmi)
401 struct dma_tx_state state;
402 enum dma_status status;
403 struct dcmi_buf *buf = dcmi->active;
409 * Because of variable JPEG buffer size sent by sensor,
410 * DMA transfer never completes due to transfer size never reached.
411 * In order to ensure that all the JPEG data are transferred
412 * in active buffer memory, DMA is drained.
413 * Then DMA tx status gives the amount of data transferred
414 * to memory, which is then returned to V4L2 through the active
419 dmaengine_synchronize(dcmi->dma_chan);
421 /* Get DMA residue to get JPEG size */
422 status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
423 if (status != DMA_ERROR && state.residue < buf->size) {
424 /* Return JPEG buffer to V4L2 with received JPEG buffer size */
425 dcmi_buffer_done(dcmi, buf, buf->size - state.residue, 0);
427 dcmi->errors_count++;
428 dev_err(dcmi->dev, "%s: Cannot get JPEG size from DMA\n",
430 /* Return JPEG buffer to V4L2 in ERROR state */
431 dcmi_buffer_done(dcmi, buf, 0, -EIO);
434 /* Abort DMA operation */
435 dmaengine_terminate_sync(dcmi->dma_chan);
437 /* Restart capture */
438 if (dcmi_restart_capture(dcmi))
439 dev_err(dcmi->dev, "%s: Cannot restart capture on JPEG received\n",
443 static irqreturn_t dcmi_irq_thread(int irq, void *arg)
445 struct stm32_dcmi *dcmi = arg;
447 spin_lock_irq(&dcmi->irqlock);
449 if (dcmi->misr & IT_OVR) {
450 dcmi->overrun_count++;
451 if (dcmi->overrun_count > OVERRUN_ERROR_THRESHOLD)
452 dcmi->errors_count++;
454 if (dcmi->misr & IT_ERR)
455 dcmi->errors_count++;
457 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG &&
458 dcmi->misr & IT_FRAME) {
460 spin_unlock_irq(&dcmi->irqlock);
461 dcmi_process_jpeg(dcmi);
465 spin_unlock_irq(&dcmi->irqlock);
469 static irqreturn_t dcmi_irq_callback(int irq, void *arg)
471 struct stm32_dcmi *dcmi = arg;
474 spin_lock_irqsave(&dcmi->irqlock, flags);
476 dcmi->misr = reg_read(dcmi->regs, DCMI_MIS);
478 /* Clear interrupt */
479 reg_set(dcmi->regs, DCMI_ICR, IT_FRAME | IT_OVR | IT_ERR);
481 spin_unlock_irqrestore(&dcmi->irqlock, flags);
483 return IRQ_WAKE_THREAD;
486 static int dcmi_queue_setup(struct vb2_queue *vq,
487 unsigned int *nbuffers,
488 unsigned int *nplanes,
489 unsigned int sizes[],
490 struct device *alloc_devs[])
492 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
495 size = dcmi->fmt.fmt.pix.sizeimage;
497 /* Make sure the image size is large enough */
499 return sizes[0] < size ? -EINVAL : 0;
504 dev_dbg(dcmi->dev, "Setup queue, count=%d, size=%d\n",
510 static int dcmi_buf_init(struct vb2_buffer *vb)
512 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
513 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
515 INIT_LIST_HEAD(&buf->list);
520 static int dcmi_buf_prepare(struct vb2_buffer *vb)
522 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue);
523 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
524 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
526 unsigned int num_sgs = 1;
528 struct scatterlist *sg;
531 size = dcmi->fmt.fmt.pix.sizeimage;
533 if (vb2_plane_size(vb, 0) < size) {
534 dev_err(dcmi->dev, "%s data will not fit into plane (%lu < %lu)\n",
535 __func__, vb2_plane_size(vb, 0), size);
539 vb2_set_plane_payload(vb, 0, size);
541 if (!buf->prepared) {
542 /* Get memory addresses */
543 buf->size = vb2_plane_size(&buf->vb.vb2_buf, 0);
544 if (buf->size > dcmi->dma_max_burst)
545 num_sgs = DIV_ROUND_UP(buf->size, dcmi->dma_max_burst);
547 ret = sg_alloc_table(&buf->sgt, num_sgs, GFP_ATOMIC);
549 dev_err(dcmi->dev, "sg table alloc failed\n");
553 dma_buf = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
555 dev_dbg(dcmi->dev, "buffer[%d] phy=%pad size=%zu\n",
556 vb->index, &dma_buf, buf->size);
558 for_each_sg(buf->sgt.sgl, sg, num_sgs, i) {
559 size_t bytes = min_t(size_t, size, dcmi->dma_max_burst);
561 sg_dma_address(sg) = dma_buf;
562 sg_dma_len(sg) = bytes;
567 buf->prepared = true;
569 vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
575 static void dcmi_buf_queue(struct vb2_buffer *vb)
577 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue);
578 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
579 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
581 spin_lock_irq(&dcmi->irqlock);
583 /* Enqueue to video buffers list */
584 list_add_tail(&buf->list, &dcmi->buffers);
586 if (dcmi->state == WAIT_FOR_BUFFER) {
587 dcmi->state = RUNNING;
590 dev_dbg(dcmi->dev, "Starting capture on buffer[%d] queued\n",
591 buf->vb.vb2_buf.index);
593 spin_unlock_irq(&dcmi->irqlock);
594 if (dcmi_start_capture(dcmi, buf))
595 dev_err(dcmi->dev, "%s: Cannot restart capture on overflow or error\n",
600 spin_unlock_irq(&dcmi->irqlock);
603 static struct media_entity *dcmi_find_source(struct stm32_dcmi *dcmi)
605 struct media_entity *entity = &dcmi->vdev->entity;
606 struct media_pad *pad;
608 /* Walk searching for entity having no sink */
610 pad = &entity->pads[0];
611 if (!(pad->flags & MEDIA_PAD_FL_SINK))
614 pad = media_pad_remote_pad_first(pad);
615 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
618 entity = pad->entity;
624 static int dcmi_pipeline_s_fmt(struct stm32_dcmi *dcmi,
625 struct v4l2_subdev_format *format)
627 struct media_entity *entity = &dcmi->source->entity;
628 struct v4l2_subdev *subdev;
629 struct media_pad *sink_pad = NULL;
630 struct media_pad *src_pad = NULL;
631 struct media_pad *pad = NULL;
632 struct v4l2_subdev_format fmt = *format;
637 * Starting from sensor subdevice, walk within
638 * pipeline and set format on each subdevice
643 /* Search if current entity has a source pad */
644 for (i = 0; i < entity->num_pads; i++) {
645 pad = &entity->pads[i];
646 if (pad->flags & MEDIA_PAD_FL_SOURCE) {
655 subdev = media_entity_to_v4l2_subdev(entity);
657 /* Propagate format on sink pad if any, otherwise source pad */
661 dev_dbg(dcmi->dev, "\"%s\":%d pad format set to 0x%x %ux%u\n",
662 subdev->name, pad->index, format->format.code,
663 format->format.width, format->format.height);
665 fmt.pad = pad->index;
666 ret = v4l2_subdev_call(subdev, pad, set_fmt, NULL, &fmt);
668 dev_err(dcmi->dev, "%s: Failed to set format 0x%x %ux%u on \"%s\":%d pad (%d)\n",
669 __func__, format->format.code,
670 format->format.width, format->format.height,
671 subdev->name, pad->index, ret);
675 if (fmt.format.code != format->format.code ||
676 fmt.format.width != format->format.width ||
677 fmt.format.height != format->format.height) {
678 dev_dbg(dcmi->dev, "\"%s\":%d pad format has been changed to 0x%x %ux%u\n",
679 subdev->name, pad->index, fmt.format.code,
680 fmt.format.width, fmt.format.height);
683 /* Walk to next entity */
684 sink_pad = media_pad_remote_pad_first(src_pad);
685 if (!sink_pad || !is_media_entity_v4l2_subdev(sink_pad->entity))
688 entity = sink_pad->entity;
695 static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
697 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
698 struct dcmi_buf *buf, *node;
702 ret = pm_runtime_resume_and_get(dcmi->dev);
704 dev_err(dcmi->dev, "%s: Failed to start streaming, cannot get sync (%d)\n",
709 ret = video_device_pipeline_start(dcmi->vdev, &dcmi->pipeline);
711 dev_err(dcmi->dev, "%s: Failed to start streaming, media pipeline start error (%d)\n",
716 ret = v4l2_subdev_call(dcmi->s_subdev, video, s_stream, 1);
718 dev_err(dcmi->dev, "%s: Failed to start source subdev, error (%d)\n",
720 goto err_media_pipeline_stop;
723 spin_lock_irq(&dcmi->irqlock);
726 switch (dcmi->bus.bus_width) {
728 val |= CR_EDM_0 | CR_EDM_1;
737 /* Set bus width to 8 bits by default */
741 /* Set vertical synchronization polarity */
742 if (dcmi->bus.flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
745 /* Set horizontal synchronization polarity */
746 if (dcmi->bus.flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
749 /* Set pixel clock polarity */
750 if (dcmi->bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
754 * BT656 embedded synchronisation bus mode.
756 * Default SAV/EAV mode is supported here with default codes
757 * SAV=0xff000080 & EAV=0xff00009d.
758 * With DCMI this means LSC=SAV=0x80 & LEC=EAV=0x9d.
760 if (dcmi->bus_type == V4L2_MBUS_BT656) {
763 /* Unmask all codes */
764 reg_write(dcmi->regs, DCMI_ESUR, 0xffffffff);/* FEC:LEC:LSC:FSC */
766 /* Trig on LSC=0x80 & LEC=0x9d codes, ignore FSC and FEC */
767 reg_write(dcmi->regs, DCMI_ESCR, 0xff9d80ff);/* FEC:LEC:LSC:FSC */
770 reg_write(dcmi->regs, DCMI_CR, val);
776 /* Enable jpeg capture */
777 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
778 reg_set(dcmi->regs, DCMI_CR, CR_CM);/* Snapshot mode */
781 reg_set(dcmi->regs, DCMI_CR, CR_ENABLE);
784 dcmi->errors_count = 0;
785 dcmi->overrun_count = 0;
786 dcmi->buffers_count = 0;
789 * Start transfer if at least one buffer has been queued,
790 * otherwise transfer is deferred at buffer queueing
792 if (list_empty(&dcmi->buffers)) {
793 dev_dbg(dcmi->dev, "Start streaming is deferred to next buffer queueing\n");
794 dcmi->state = WAIT_FOR_BUFFER;
795 spin_unlock_irq(&dcmi->irqlock);
799 buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
802 dcmi->state = RUNNING;
804 dev_dbg(dcmi->dev, "Start streaming, starting capture\n");
806 spin_unlock_irq(&dcmi->irqlock);
807 ret = dcmi_start_capture(dcmi, buf);
809 dev_err(dcmi->dev, "%s: Start streaming failed, cannot start capture\n",
811 goto err_pipeline_stop;
814 /* Enable interruptions */
815 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
816 reg_set(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
818 reg_set(dcmi->regs, DCMI_IER, IT_OVR | IT_ERR);
823 v4l2_subdev_call(dcmi->s_subdev, video, s_stream, 0);
825 err_media_pipeline_stop:
826 video_device_pipeline_stop(dcmi->vdev);
829 pm_runtime_put(dcmi->dev);
831 spin_lock_irq(&dcmi->irqlock);
833 * Return all buffers to vb2 in QUEUED state.
834 * This will give ownership back to userspace
836 list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
837 list_del_init(&buf->list);
838 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
841 spin_unlock_irq(&dcmi->irqlock);
846 static void dcmi_stop_streaming(struct vb2_queue *vq)
848 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
849 struct dcmi_buf *buf, *node;
852 ret = v4l2_subdev_call(dcmi->s_subdev, video, s_stream, 0);
854 dev_err(dcmi->dev, "%s: Failed to stop source subdev, error (%d)\n",
857 video_device_pipeline_stop(dcmi->vdev);
859 spin_lock_irq(&dcmi->irqlock);
861 /* Disable interruptions */
862 reg_clear(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
865 reg_clear(dcmi->regs, DCMI_CR, CR_ENABLE);
867 /* Return all queued buffers to vb2 in ERROR state */
868 list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
869 list_del_init(&buf->list);
870 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
874 dcmi->state = STOPPED;
876 spin_unlock_irq(&dcmi->irqlock);
878 /* Stop all pending DMA operations */
879 mutex_lock(&dcmi->dma_lock);
880 dmaengine_terminate_sync(dcmi->dma_chan);
881 mutex_unlock(&dcmi->dma_lock);
883 pm_runtime_put(dcmi->dev);
885 if (dcmi->errors_count)
886 dev_warn(dcmi->dev, "Some errors found while streaming: errors=%d (overrun=%d), buffers=%d\n",
887 dcmi->errors_count, dcmi->overrun_count,
888 dcmi->buffers_count);
889 dev_dbg(dcmi->dev, "Stop streaming, errors=%d (overrun=%d), buffers=%d\n",
890 dcmi->errors_count, dcmi->overrun_count,
891 dcmi->buffers_count);
894 static const struct vb2_ops dcmi_video_qops = {
895 .queue_setup = dcmi_queue_setup,
896 .buf_init = dcmi_buf_init,
897 .buf_prepare = dcmi_buf_prepare,
898 .buf_queue = dcmi_buf_queue,
899 .start_streaming = dcmi_start_streaming,
900 .stop_streaming = dcmi_stop_streaming,
903 static int dcmi_g_fmt_vid_cap(struct file *file, void *priv,
904 struct v4l2_format *fmt)
906 struct stm32_dcmi *dcmi = video_drvdata(file);
913 static const struct dcmi_format *find_format_by_fourcc(struct stm32_dcmi *dcmi,
916 unsigned int num_formats = dcmi->num_of_sd_formats;
917 const struct dcmi_format *fmt;
920 for (i = 0; i < num_formats; i++) {
921 fmt = dcmi->sd_formats[i];
922 if (fmt->fourcc == fourcc)
929 static void __find_outer_frame_size(struct stm32_dcmi *dcmi,
930 struct v4l2_pix_format *pix,
931 struct dcmi_framesize *framesize)
933 struct dcmi_framesize *match = NULL;
935 unsigned int min_err = UINT_MAX;
937 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
938 struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
939 int w_err = (fsize->width - pix->width);
940 int h_err = (fsize->height - pix->height);
941 int err = w_err + h_err;
943 if (w_err >= 0 && h_err >= 0 && err < min_err) {
949 match = &dcmi->sd_framesizes[0];
954 static int dcmi_try_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f,
955 const struct dcmi_format **sd_format,
956 struct dcmi_framesize *sd_framesize)
958 const struct dcmi_format *sd_fmt;
959 struct dcmi_framesize sd_fsize;
960 struct v4l2_pix_format *pix = &f->fmt.pix;
961 struct v4l2_subdev_format format = {
962 .which = V4L2_SUBDEV_FORMAT_TRY,
967 sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
969 if (!dcmi->num_of_sd_formats)
972 sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
973 pix->pixelformat = sd_fmt->fourcc;
976 /* Limit to hardware capabilities */
977 pix->width = clamp(pix->width, MIN_WIDTH, MAX_WIDTH);
978 pix->height = clamp(pix->height, MIN_HEIGHT, MAX_HEIGHT);
980 /* No crop if JPEG is requested */
981 do_crop = dcmi->do_crop && (pix->pixelformat != V4L2_PIX_FMT_JPEG);
983 if (do_crop && dcmi->num_of_sd_framesizes) {
984 struct dcmi_framesize outer_sd_fsize;
986 * If crop is requested and sensor have discrete frame sizes,
987 * select the frame size that is just larger than request
989 __find_outer_frame_size(dcmi, pix, &outer_sd_fsize);
990 pix->width = outer_sd_fsize.width;
991 pix->height = outer_sd_fsize.height;
994 v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
995 ret = v4l2_subdev_call_state_try(dcmi->source, pad, set_fmt, &format);
999 /* Update pix regarding to what sensor can do */
1000 v4l2_fill_pix_format(pix, &format.format);
1002 /* Save resolution that sensor can actually do */
1003 sd_fsize.width = pix->width;
1004 sd_fsize.height = pix->height;
1007 struct v4l2_rect c = dcmi->crop;
1008 struct v4l2_rect max_rect;
1011 * Adjust crop by making the intersection between
1012 * format resolution request and crop request
1016 max_rect.width = pix->width;
1017 max_rect.height = pix->height;
1018 v4l2_rect_map_inside(&c, &max_rect);
1019 c.top = clamp_t(s32, c.top, 0, pix->height - c.height);
1020 c.left = clamp_t(s32, c.left, 0, pix->width - c.width);
1023 /* Adjust format resolution request to crop */
1024 pix->width = dcmi->crop.width;
1025 pix->height = dcmi->crop.height;
1028 pix->field = V4L2_FIELD_NONE;
1029 pix->bytesperline = pix->width * sd_fmt->bpp;
1030 pix->sizeimage = pix->bytesperline * pix->height;
1033 *sd_format = sd_fmt;
1035 *sd_framesize = sd_fsize;
1040 static int dcmi_set_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f)
1042 struct v4l2_subdev_format format = {
1043 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1045 const struct dcmi_format *sd_format;
1046 struct dcmi_framesize sd_framesize;
1047 struct v4l2_mbus_framefmt *mf = &format.format;
1048 struct v4l2_pix_format *pix = &f->fmt.pix;
1052 * Try format, fmt.width/height could have been changed
1053 * to match sensor capability or crop request
1054 * sd_format & sd_framesize will contain what subdev
1055 * can do for this request.
1057 ret = dcmi_try_fmt(dcmi, f, &sd_format, &sd_framesize);
1061 /* Disable crop if JPEG is requested or BT656 bus is selected */
1062 if (pix->pixelformat == V4L2_PIX_FMT_JPEG &&
1063 dcmi->bus_type != V4L2_MBUS_BT656)
1064 dcmi->do_crop = false;
1066 /* pix to mbus format */
1067 v4l2_fill_mbus_format(mf, pix,
1068 sd_format->mbus_code);
1069 mf->width = sd_framesize.width;
1070 mf->height = sd_framesize.height;
1072 ret = dcmi_pipeline_s_fmt(dcmi, &format);
1076 dev_dbg(dcmi->dev, "Sensor format set to 0x%x %ux%u\n",
1077 mf->code, mf->width, mf->height);
1078 dev_dbg(dcmi->dev, "Buffer format set to %4.4s %ux%u\n",
1079 (char *)&pix->pixelformat,
1080 pix->width, pix->height);
1083 dcmi->sd_format = sd_format;
1084 dcmi->sd_framesize = sd_framesize;
1089 static int dcmi_s_fmt_vid_cap(struct file *file, void *priv,
1090 struct v4l2_format *f)
1092 struct stm32_dcmi *dcmi = video_drvdata(file);
1094 if (vb2_is_streaming(&dcmi->queue))
1097 return dcmi_set_fmt(dcmi, f);
1100 static int dcmi_try_fmt_vid_cap(struct file *file, void *priv,
1101 struct v4l2_format *f)
1103 struct stm32_dcmi *dcmi = video_drvdata(file);
1105 return dcmi_try_fmt(dcmi, f, NULL, NULL);
1108 static int dcmi_enum_fmt_vid_cap(struct file *file, void *priv,
1109 struct v4l2_fmtdesc *f)
1111 struct stm32_dcmi *dcmi = video_drvdata(file);
1113 if (f->index >= dcmi->num_of_sd_formats)
1116 f->pixelformat = dcmi->sd_formats[f->index]->fourcc;
1120 static int dcmi_get_sensor_format(struct stm32_dcmi *dcmi,
1121 struct v4l2_pix_format *pix)
1123 struct v4l2_subdev_format fmt = {
1124 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1128 ret = v4l2_subdev_call(dcmi->source, pad, get_fmt, NULL, &fmt);
1132 v4l2_fill_pix_format(pix, &fmt.format);
1137 static int dcmi_set_sensor_format(struct stm32_dcmi *dcmi,
1138 struct v4l2_pix_format *pix)
1140 const struct dcmi_format *sd_fmt;
1141 struct v4l2_subdev_format format = {
1142 .which = V4L2_SUBDEV_FORMAT_TRY,
1146 sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
1148 if (!dcmi->num_of_sd_formats)
1151 sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
1152 pix->pixelformat = sd_fmt->fourcc;
1155 v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
1156 ret = v4l2_subdev_call_state_try(dcmi->source, pad, set_fmt, &format);
1163 static int dcmi_get_sensor_bounds(struct stm32_dcmi *dcmi,
1164 struct v4l2_rect *r)
1166 struct v4l2_subdev_selection bounds = {
1167 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1168 .target = V4L2_SEL_TGT_CROP_BOUNDS,
1170 unsigned int max_width, max_height, max_pixsize;
1171 struct v4l2_pix_format pix;
1176 * Get sensor bounds first
1178 ret = v4l2_subdev_call(dcmi->source, pad, get_selection,
1182 if (ret != -ENOIOCTLCMD)
1186 * If selection is not implemented,
1187 * fallback by enumerating sensor frame sizes
1188 * and take the largest one
1193 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1194 struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
1195 unsigned int pixsize = fsize->width * fsize->height;
1197 if (pixsize > max_pixsize) {
1198 max_pixsize = pixsize;
1199 max_width = fsize->width;
1200 max_height = fsize->height;
1203 if (max_pixsize > 0) {
1206 r->width = max_width;
1207 r->height = max_height;
1212 * If frame sizes enumeration is not implemented,
1213 * fallback by getting current sensor frame size
1215 ret = dcmi_get_sensor_format(dcmi, &pix);
1221 r->width = pix.width;
1222 r->height = pix.height;
1227 static int dcmi_g_selection(struct file *file, void *fh,
1228 struct v4l2_selection *s)
1230 struct stm32_dcmi *dcmi = video_drvdata(file);
1232 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1235 switch (s->target) {
1236 case V4L2_SEL_TGT_CROP_DEFAULT:
1237 case V4L2_SEL_TGT_CROP_BOUNDS:
1238 s->r = dcmi->sd_bounds;
1240 case V4L2_SEL_TGT_CROP:
1241 if (dcmi->do_crop) {
1246 s->r.width = dcmi->fmt.fmt.pix.width;
1247 s->r.height = dcmi->fmt.fmt.pix.height;
1257 static int dcmi_s_selection(struct file *file, void *priv,
1258 struct v4l2_selection *s)
1260 struct stm32_dcmi *dcmi = video_drvdata(file);
1261 struct v4l2_rect r = s->r;
1262 struct v4l2_rect max_rect;
1263 struct v4l2_pix_format pix;
1265 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1266 s->target != V4L2_SEL_TGT_CROP)
1269 /* Reset sensor resolution to max resolution */
1270 pix.pixelformat = dcmi->fmt.fmt.pix.pixelformat;
1271 pix.width = dcmi->sd_bounds.width;
1272 pix.height = dcmi->sd_bounds.height;
1273 dcmi_set_sensor_format(dcmi, &pix);
1276 * Make the intersection between
1282 max_rect.width = pix.width;
1283 max_rect.height = pix.height;
1284 v4l2_rect_map_inside(&r, &max_rect);
1285 r.top = clamp_t(s32, r.top, 0, pix.height - r.height);
1286 r.left = clamp_t(s32, r.left, 0, pix.width - r.width);
1288 if (!(r.top == dcmi->sd_bounds.top &&
1289 r.left == dcmi->sd_bounds.left &&
1290 r.width == dcmi->sd_bounds.width &&
1291 r.height == dcmi->sd_bounds.height)) {
1292 /* Crop if request is different than sensor resolution */
1293 dcmi->do_crop = true;
1295 dev_dbg(dcmi->dev, "s_selection: crop %ux%u@(%u,%u) from %ux%u\n",
1296 r.width, r.height, r.left, r.top,
1297 pix.width, pix.height);
1300 dcmi->do_crop = false;
1301 dev_dbg(dcmi->dev, "s_selection: crop is disabled\n");
1308 static int dcmi_querycap(struct file *file, void *priv,
1309 struct v4l2_capability *cap)
1311 strscpy(cap->driver, DRV_NAME, sizeof(cap->driver));
1312 strscpy(cap->card, "STM32 Camera Memory Interface",
1314 strscpy(cap->bus_info, "platform:dcmi", sizeof(cap->bus_info));
1318 static int dcmi_enum_input(struct file *file, void *priv,
1319 struct v4l2_input *i)
1324 i->type = V4L2_INPUT_TYPE_CAMERA;
1325 strscpy(i->name, "Camera", sizeof(i->name));
1329 static int dcmi_g_input(struct file *file, void *priv, unsigned int *i)
1335 static int dcmi_s_input(struct file *file, void *priv, unsigned int i)
1342 static int dcmi_enum_framesizes(struct file *file, void *fh,
1343 struct v4l2_frmsizeenum *fsize)
1345 struct stm32_dcmi *dcmi = video_drvdata(file);
1346 const struct dcmi_format *sd_fmt;
1347 struct v4l2_subdev_frame_size_enum fse = {
1348 .index = fsize->index,
1349 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1353 sd_fmt = find_format_by_fourcc(dcmi, fsize->pixel_format);
1357 fse.code = sd_fmt->mbus_code;
1359 ret = v4l2_subdev_call(dcmi->source, pad, enum_frame_size,
1364 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1365 fsize->discrete.width = fse.max_width;
1366 fsize->discrete.height = fse.max_height;
1371 static int dcmi_g_parm(struct file *file, void *priv,
1372 struct v4l2_streamparm *p)
1374 struct stm32_dcmi *dcmi = video_drvdata(file);
1376 return v4l2_g_parm_cap(video_devdata(file), dcmi->source, p);
1379 static int dcmi_s_parm(struct file *file, void *priv,
1380 struct v4l2_streamparm *p)
1382 struct stm32_dcmi *dcmi = video_drvdata(file);
1384 return v4l2_s_parm_cap(video_devdata(file), dcmi->source, p);
1387 static int dcmi_enum_frameintervals(struct file *file, void *fh,
1388 struct v4l2_frmivalenum *fival)
1390 struct stm32_dcmi *dcmi = video_drvdata(file);
1391 const struct dcmi_format *sd_fmt;
1392 struct v4l2_subdev_frame_interval_enum fie = {
1393 .index = fival->index,
1394 .width = fival->width,
1395 .height = fival->height,
1396 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1400 sd_fmt = find_format_by_fourcc(dcmi, fival->pixel_format);
1404 fie.code = sd_fmt->mbus_code;
1406 ret = v4l2_subdev_call(dcmi->source, pad,
1407 enum_frame_interval, NULL, &fie);
1411 fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
1412 fival->discrete = fie.interval;
1417 static const struct of_device_id stm32_dcmi_of_match[] = {
1418 { .compatible = "st,stm32-dcmi"},
1421 MODULE_DEVICE_TABLE(of, stm32_dcmi_of_match);
1423 static int dcmi_open(struct file *file)
1425 struct stm32_dcmi *dcmi = video_drvdata(file);
1426 struct v4l2_subdev *sd = dcmi->source;
1429 if (mutex_lock_interruptible(&dcmi->lock))
1430 return -ERESTARTSYS;
1432 ret = v4l2_fh_open(file);
1436 if (!v4l2_fh_is_singular_file(file))
1439 ret = v4l2_subdev_call(sd, core, s_power, 1);
1440 if (ret < 0 && ret != -ENOIOCTLCMD)
1443 ret = dcmi_set_fmt(dcmi, &dcmi->fmt);
1445 v4l2_subdev_call(sd, core, s_power, 0);
1448 v4l2_fh_release(file);
1450 mutex_unlock(&dcmi->lock);
1454 static int dcmi_release(struct file *file)
1456 struct stm32_dcmi *dcmi = video_drvdata(file);
1457 struct v4l2_subdev *sd = dcmi->source;
1461 mutex_lock(&dcmi->lock);
1463 fh_singular = v4l2_fh_is_singular_file(file);
1465 ret = _vb2_fop_release(file, NULL);
1468 v4l2_subdev_call(sd, core, s_power, 0);
1470 mutex_unlock(&dcmi->lock);
1475 static const struct v4l2_ioctl_ops dcmi_ioctl_ops = {
1476 .vidioc_querycap = dcmi_querycap,
1478 .vidioc_try_fmt_vid_cap = dcmi_try_fmt_vid_cap,
1479 .vidioc_g_fmt_vid_cap = dcmi_g_fmt_vid_cap,
1480 .vidioc_s_fmt_vid_cap = dcmi_s_fmt_vid_cap,
1481 .vidioc_enum_fmt_vid_cap = dcmi_enum_fmt_vid_cap,
1482 .vidioc_g_selection = dcmi_g_selection,
1483 .vidioc_s_selection = dcmi_s_selection,
1485 .vidioc_enum_input = dcmi_enum_input,
1486 .vidioc_g_input = dcmi_g_input,
1487 .vidioc_s_input = dcmi_s_input,
1489 .vidioc_g_parm = dcmi_g_parm,
1490 .vidioc_s_parm = dcmi_s_parm,
1492 .vidioc_enum_framesizes = dcmi_enum_framesizes,
1493 .vidioc_enum_frameintervals = dcmi_enum_frameintervals,
1495 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1496 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1497 .vidioc_querybuf = vb2_ioctl_querybuf,
1498 .vidioc_qbuf = vb2_ioctl_qbuf,
1499 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1500 .vidioc_expbuf = vb2_ioctl_expbuf,
1501 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1502 .vidioc_streamon = vb2_ioctl_streamon,
1503 .vidioc_streamoff = vb2_ioctl_streamoff,
1505 .vidioc_log_status = v4l2_ctrl_log_status,
1506 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1507 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1510 static const struct v4l2_file_operations dcmi_fops = {
1511 .owner = THIS_MODULE,
1512 .unlocked_ioctl = video_ioctl2,
1514 .release = dcmi_release,
1515 .poll = vb2_fop_poll,
1516 .mmap = vb2_fop_mmap,
1518 .get_unmapped_area = vb2_fop_get_unmapped_area,
1520 .read = vb2_fop_read,
1523 static int dcmi_set_default_fmt(struct stm32_dcmi *dcmi)
1525 struct v4l2_format f = {
1526 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
1529 .height = CIF_HEIGHT,
1530 .field = V4L2_FIELD_NONE,
1531 .pixelformat = dcmi->sd_formats[0]->fourcc,
1536 ret = dcmi_try_fmt(dcmi, &f, NULL, NULL);
1539 dcmi->sd_format = dcmi->sd_formats[0];
1544 static const struct dcmi_format dcmi_formats[] = {
1546 .fourcc = V4L2_PIX_FMT_RGB565,
1547 .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE,
1550 .fourcc = V4L2_PIX_FMT_RGB565,
1551 .mbus_code = MEDIA_BUS_FMT_RGB565_1X16,
1554 .fourcc = V4L2_PIX_FMT_YUYV,
1555 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
1558 .fourcc = V4L2_PIX_FMT_YUYV,
1559 .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16,
1562 .fourcc = V4L2_PIX_FMT_UYVY,
1563 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
1566 .fourcc = V4L2_PIX_FMT_UYVY,
1567 .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16,
1570 .fourcc = V4L2_PIX_FMT_JPEG,
1571 .mbus_code = MEDIA_BUS_FMT_JPEG_1X8,
1574 .fourcc = V4L2_PIX_FMT_SBGGR8,
1575 .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
1578 .fourcc = V4L2_PIX_FMT_SGBRG8,
1579 .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
1582 .fourcc = V4L2_PIX_FMT_SGRBG8,
1583 .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
1586 .fourcc = V4L2_PIX_FMT_SRGGB8,
1587 .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
1590 .fourcc = V4L2_PIX_FMT_SBGGR10,
1591 .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10,
1594 .fourcc = V4L2_PIX_FMT_SGBRG10,
1595 .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10,
1598 .fourcc = V4L2_PIX_FMT_SGRBG10,
1599 .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
1602 .fourcc = V4L2_PIX_FMT_SRGGB10,
1603 .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,
1606 .fourcc = V4L2_PIX_FMT_SBGGR12,
1607 .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12,
1610 .fourcc = V4L2_PIX_FMT_SGBRG12,
1611 .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12,
1614 .fourcc = V4L2_PIX_FMT_SGRBG12,
1615 .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
1618 .fourcc = V4L2_PIX_FMT_SRGGB12,
1619 .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12,
1622 .fourcc = V4L2_PIX_FMT_SBGGR14,
1623 .mbus_code = MEDIA_BUS_FMT_SBGGR14_1X14,
1626 .fourcc = V4L2_PIX_FMT_SGBRG14,
1627 .mbus_code = MEDIA_BUS_FMT_SGBRG14_1X14,
1630 .fourcc = V4L2_PIX_FMT_SGRBG14,
1631 .mbus_code = MEDIA_BUS_FMT_SGRBG14_1X14,
1634 .fourcc = V4L2_PIX_FMT_SRGGB14,
1635 .mbus_code = MEDIA_BUS_FMT_SRGGB14_1X14,
1640 static int dcmi_formats_init(struct stm32_dcmi *dcmi)
1642 const struct dcmi_format *sd_fmts[ARRAY_SIZE(dcmi_formats)];
1643 unsigned int num_fmts = 0, i, j;
1644 struct v4l2_subdev *subdev = dcmi->source;
1645 struct v4l2_subdev_mbus_code_enum mbus_code = {
1646 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1649 while (!v4l2_subdev_call(subdev, pad, enum_mbus_code,
1650 NULL, &mbus_code)) {
1651 for (i = 0; i < ARRAY_SIZE(dcmi_formats); i++) {
1652 if (dcmi_formats[i].mbus_code != mbus_code.code)
1655 /* Exclude JPEG if BT656 bus is selected */
1656 if (dcmi_formats[i].fourcc == V4L2_PIX_FMT_JPEG &&
1657 dcmi->bus_type == V4L2_MBUS_BT656)
1660 /* Code supported, have we got this fourcc yet? */
1661 for (j = 0; j < num_fmts; j++)
1662 if (sd_fmts[j]->fourcc ==
1663 dcmi_formats[i].fourcc) {
1664 /* Already available */
1665 dev_dbg(dcmi->dev, "Skipping fourcc/code: %4.4s/0x%x\n",
1666 (char *)&sd_fmts[j]->fourcc,
1670 if (j == num_fmts) {
1672 sd_fmts[num_fmts++] = dcmi_formats + i;
1673 dev_dbg(dcmi->dev, "Supported fourcc/code: %4.4s/0x%x\n",
1674 (char *)&sd_fmts[num_fmts - 1]->fourcc,
1675 sd_fmts[num_fmts - 1]->mbus_code);
1684 dcmi->num_of_sd_formats = num_fmts;
1685 dcmi->sd_formats = devm_kcalloc(dcmi->dev,
1686 num_fmts, sizeof(struct dcmi_format *),
1688 if (!dcmi->sd_formats) {
1689 dev_err(dcmi->dev, "Could not allocate memory\n");
1693 memcpy(dcmi->sd_formats, sd_fmts,
1694 num_fmts * sizeof(struct dcmi_format *));
1695 dcmi->sd_format = dcmi->sd_formats[0];
1700 static int dcmi_framesizes_init(struct stm32_dcmi *dcmi)
1702 unsigned int num_fsize = 0;
1703 struct v4l2_subdev *subdev = dcmi->source;
1704 struct v4l2_subdev_frame_size_enum fse = {
1705 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1706 .code = dcmi->sd_format->mbus_code,
1711 /* Allocate discrete framesizes array */
1712 while (!v4l2_subdev_call(subdev, pad, enum_frame_size,
1716 num_fsize = fse.index;
1720 dcmi->num_of_sd_framesizes = num_fsize;
1721 dcmi->sd_framesizes = devm_kcalloc(dcmi->dev, num_fsize,
1722 sizeof(struct dcmi_framesize),
1724 if (!dcmi->sd_framesizes) {
1725 dev_err(dcmi->dev, "Could not allocate memory\n");
1729 /* Fill array with sensor supported framesizes */
1730 dev_dbg(dcmi->dev, "Sensor supports %u frame sizes:\n", num_fsize);
1731 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1733 ret = v4l2_subdev_call(subdev, pad, enum_frame_size,
1737 dcmi->sd_framesizes[fse.index].width = fse.max_width;
1738 dcmi->sd_framesizes[fse.index].height = fse.max_height;
1739 dev_dbg(dcmi->dev, "%ux%u\n", fse.max_width, fse.max_height);
1745 static int dcmi_graph_notify_complete(struct v4l2_async_notifier *notifier)
1747 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1751 * Now that the graph is complete,
1752 * we search for the source subdevice
1753 * in order to expose it through V4L2 interface
1755 dcmi->source = media_entity_to_v4l2_subdev(dcmi_find_source(dcmi));
1756 if (!dcmi->source) {
1757 dev_err(dcmi->dev, "Source subdevice not found\n");
1761 dcmi->vdev->ctrl_handler = dcmi->source->ctrl_handler;
1763 ret = dcmi_formats_init(dcmi);
1765 dev_err(dcmi->dev, "No supported mediabus format found\n");
1769 ret = dcmi_framesizes_init(dcmi);
1771 dev_err(dcmi->dev, "Could not initialize framesizes\n");
1775 ret = dcmi_get_sensor_bounds(dcmi, &dcmi->sd_bounds);
1777 dev_err(dcmi->dev, "Could not get sensor bounds\n");
1781 ret = dcmi_set_default_fmt(dcmi);
1783 dev_err(dcmi->dev, "Could not set default format\n");
1787 ret = devm_request_threaded_irq(dcmi->dev, dcmi->irq, dcmi_irq_callback,
1788 dcmi_irq_thread, IRQF_ONESHOT,
1789 dev_name(dcmi->dev), dcmi);
1791 dev_err(dcmi->dev, "Unable to request irq %d\n", dcmi->irq);
1798 static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
1799 struct v4l2_subdev *sd,
1800 struct v4l2_async_connection *asd)
1802 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1804 dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev));
1806 /* Checks internally if vdev has been init or not */
1807 video_unregister_device(dcmi->vdev);
1810 static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
1811 struct v4l2_subdev *subdev,
1812 struct v4l2_async_connection *asd)
1814 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1818 dev_dbg(dcmi->dev, "Subdev \"%s\" bound\n", subdev->name);
1821 * Link this sub-device to DCMI, it could be
1822 * a parallel camera sensor or a bridge
1824 src_pad = media_entity_get_fwnode_pad(&subdev->entity,
1826 MEDIA_PAD_FL_SOURCE);
1828 ret = media_create_pad_link(&subdev->entity, src_pad,
1829 &dcmi->vdev->entity, 0,
1830 MEDIA_LNK_FL_IMMUTABLE |
1831 MEDIA_LNK_FL_ENABLED);
1833 dev_err(dcmi->dev, "Failed to create media pad link with subdev \"%s\"\n",
1836 dev_dbg(dcmi->dev, "DCMI is now linked to \"%s\"\n",
1839 dcmi->s_subdev = subdev;
1844 static const struct v4l2_async_notifier_operations dcmi_graph_notify_ops = {
1845 .bound = dcmi_graph_notify_bound,
1846 .unbind = dcmi_graph_notify_unbind,
1847 .complete = dcmi_graph_notify_complete,
1850 static int dcmi_graph_init(struct stm32_dcmi *dcmi)
1852 struct v4l2_async_connection *asd;
1853 struct device_node *ep;
1856 ep = of_graph_get_endpoint_by_regs(dcmi->dev->of_node, 0, -1);
1858 dev_err(dcmi->dev, "Failed to get next endpoint\n");
1862 v4l2_async_nf_init(&dcmi->notifier, &dcmi->v4l2_dev);
1864 asd = v4l2_async_nf_add_fwnode_remote(&dcmi->notifier,
1865 of_fwnode_handle(ep),
1866 struct v4l2_async_connection);
1871 dev_err(dcmi->dev, "Failed to add subdev notifier\n");
1872 return PTR_ERR(asd);
1875 dcmi->notifier.ops = &dcmi_graph_notify_ops;
1877 ret = v4l2_async_nf_register(&dcmi->notifier);
1879 dev_err(dcmi->dev, "Failed to register notifier\n");
1880 v4l2_async_nf_cleanup(&dcmi->notifier);
1887 static int dcmi_probe(struct platform_device *pdev)
1889 struct device_node *np = pdev->dev.of_node;
1890 struct v4l2_fwnode_endpoint ep = { .bus_type = 0 };
1891 struct stm32_dcmi *dcmi;
1892 struct vb2_queue *q;
1893 struct dma_chan *chan;
1894 struct dma_slave_caps caps;
1898 dcmi = devm_kzalloc(&pdev->dev, sizeof(struct stm32_dcmi), GFP_KERNEL);
1902 dcmi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
1903 if (IS_ERR(dcmi->rstc))
1904 return dev_err_probe(&pdev->dev, PTR_ERR(dcmi->rstc),
1905 "Could not get reset control\n");
1907 /* Get bus characteristics from devicetree */
1908 np = of_graph_get_endpoint_by_regs(np, 0, -1);
1910 dev_err(&pdev->dev, "Could not find the endpoint\n");
1914 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep);
1917 dev_err(&pdev->dev, "Could not parse the endpoint\n");
1921 if (ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1922 dev_err(&pdev->dev, "CSI bus not supported\n");
1926 if (ep.bus_type == V4L2_MBUS_BT656 &&
1927 ep.bus.parallel.bus_width != 8) {
1928 dev_err(&pdev->dev, "BT656 bus conflicts with %u bits bus width (8 bits required)\n",
1929 ep.bus.parallel.bus_width);
1933 dcmi->bus.flags = ep.bus.parallel.flags;
1934 dcmi->bus.bus_width = ep.bus.parallel.bus_width;
1935 dcmi->bus.data_shift = ep.bus.parallel.data_shift;
1936 dcmi->bus_type = ep.bus_type;
1938 dcmi->irq = platform_get_irq(pdev, 0);
1942 dcmi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &dcmi->res);
1943 if (IS_ERR(dcmi->regs))
1944 return PTR_ERR(dcmi->regs);
1946 mclk = devm_clk_get(&pdev->dev, "mclk");
1948 return dev_err_probe(&pdev->dev, PTR_ERR(mclk),
1949 "Unable to get mclk\n");
1951 chan = dma_request_chan(&pdev->dev, "tx");
1953 return dev_err_probe(&pdev->dev, PTR_ERR(chan),
1954 "Failed to request DMA channel\n");
1956 dcmi->dma_max_burst = UINT_MAX;
1957 ret = dma_get_slave_caps(chan, &caps);
1958 if (!ret && caps.max_sg_burst)
1959 dcmi->dma_max_burst = caps.max_sg_burst * DMA_SLAVE_BUSWIDTH_4_BYTES;
1961 spin_lock_init(&dcmi->irqlock);
1962 mutex_init(&dcmi->lock);
1963 mutex_init(&dcmi->dma_lock);
1964 init_completion(&dcmi->complete);
1965 INIT_LIST_HEAD(&dcmi->buffers);
1967 dcmi->dev = &pdev->dev;
1969 dcmi->state = STOPPED;
1970 dcmi->dma_chan = chan;
1974 dcmi->v4l2_dev.mdev = &dcmi->mdev;
1976 /* Initialize media device */
1977 strscpy(dcmi->mdev.model, DRV_NAME, sizeof(dcmi->mdev.model));
1978 dcmi->mdev.dev = &pdev->dev;
1979 media_device_init(&dcmi->mdev);
1981 /* Initialize the top-level structure */
1982 ret = v4l2_device_register(&pdev->dev, &dcmi->v4l2_dev);
1984 goto err_media_device_cleanup;
1986 dcmi->vdev = video_device_alloc();
1989 goto err_device_unregister;
1993 dcmi->vdev->fops = &dcmi_fops;
1994 dcmi->vdev->v4l2_dev = &dcmi->v4l2_dev;
1995 dcmi->vdev->queue = &dcmi->queue;
1996 strscpy(dcmi->vdev->name, KBUILD_MODNAME, sizeof(dcmi->vdev->name));
1997 dcmi->vdev->release = video_device_release;
1998 dcmi->vdev->ioctl_ops = &dcmi_ioctl_ops;
1999 dcmi->vdev->lock = &dcmi->lock;
2000 dcmi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
2002 video_set_drvdata(dcmi->vdev, dcmi);
2004 /* Media entity pads */
2005 dcmi->vid_cap_pad.flags = MEDIA_PAD_FL_SINK;
2006 ret = media_entity_pads_init(&dcmi->vdev->entity,
2007 1, &dcmi->vid_cap_pad);
2009 dev_err(dcmi->dev, "Failed to init media entity pad\n");
2010 goto err_device_release;
2012 dcmi->vdev->entity.flags |= MEDIA_ENT_FL_DEFAULT;
2014 ret = video_register_device(dcmi->vdev, VFL_TYPE_VIDEO, -1);
2016 dev_err(dcmi->dev, "Failed to register video device\n");
2017 goto err_media_entity_cleanup;
2020 dev_dbg(dcmi->dev, "Device registered as %s\n",
2021 video_device_node_name(dcmi->vdev));
2024 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2025 q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
2026 q->lock = &dcmi->lock;
2028 q->buf_struct_size = sizeof(struct dcmi_buf);
2029 q->ops = &dcmi_video_qops;
2030 q->mem_ops = &vb2_dma_contig_memops;
2031 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2032 q->min_queued_buffers = 2;
2033 q->allow_cache_hints = 1;
2034 q->dev = &pdev->dev;
2036 ret = vb2_queue_init(q);
2038 dev_err(&pdev->dev, "Failed to initialize vb2 queue\n");
2039 goto err_media_entity_cleanup;
2042 ret = dcmi_graph_init(dcmi);
2044 goto err_media_entity_cleanup;
2047 ret = reset_control_assert(dcmi->rstc);
2049 dev_err(&pdev->dev, "Failed to assert the reset line\n");
2053 usleep_range(3000, 5000);
2055 ret = reset_control_deassert(dcmi->rstc);
2057 dev_err(&pdev->dev, "Failed to deassert the reset line\n");
2061 dev_info(&pdev->dev, "Probe done\n");
2063 platform_set_drvdata(pdev, dcmi);
2065 pm_runtime_enable(&pdev->dev);
2070 v4l2_async_nf_cleanup(&dcmi->notifier);
2071 err_media_entity_cleanup:
2072 media_entity_cleanup(&dcmi->vdev->entity);
2074 video_device_release(dcmi->vdev);
2075 err_device_unregister:
2076 v4l2_device_unregister(&dcmi->v4l2_dev);
2077 err_media_device_cleanup:
2078 media_device_cleanup(&dcmi->mdev);
2079 dma_release_channel(dcmi->dma_chan);
2084 static void dcmi_remove(struct platform_device *pdev)
2086 struct stm32_dcmi *dcmi = platform_get_drvdata(pdev);
2088 pm_runtime_disable(&pdev->dev);
2090 v4l2_async_nf_unregister(&dcmi->notifier);
2091 v4l2_async_nf_cleanup(&dcmi->notifier);
2092 media_entity_cleanup(&dcmi->vdev->entity);
2093 v4l2_device_unregister(&dcmi->v4l2_dev);
2094 media_device_cleanup(&dcmi->mdev);
2096 dma_release_channel(dcmi->dma_chan);
2099 static __maybe_unused int dcmi_runtime_suspend(struct device *dev)
2101 struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
2103 clk_disable_unprepare(dcmi->mclk);
2108 static __maybe_unused int dcmi_runtime_resume(struct device *dev)
2110 struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
2113 ret = clk_prepare_enable(dcmi->mclk);
2115 dev_err(dev, "%s: Failed to prepare_enable clock\n", __func__);
2120 static __maybe_unused int dcmi_suspend(struct device *dev)
2123 pm_runtime_force_suspend(dev);
2125 /* change pinctrl state */
2126 pinctrl_pm_select_sleep_state(dev);
2131 static __maybe_unused int dcmi_resume(struct device *dev)
2133 /* restore pinctl default state */
2134 pinctrl_pm_select_default_state(dev);
2137 pm_runtime_force_resume(dev);
2142 static const struct dev_pm_ops dcmi_pm_ops = {
2143 SET_SYSTEM_SLEEP_PM_OPS(dcmi_suspend, dcmi_resume)
2144 SET_RUNTIME_PM_OPS(dcmi_runtime_suspend,
2145 dcmi_runtime_resume, NULL)
2148 static struct platform_driver stm32_dcmi_driver = {
2149 .probe = dcmi_probe,
2150 .remove = dcmi_remove,
2153 .of_match_table = of_match_ptr(stm32_dcmi_of_match),
2158 module_platform_driver(stm32_dcmi_driver);
2162 MODULE_DESCRIPTION("STMicroelectronics STM32 Digital Camera Memory Interface driver");
2163 MODULE_LICENSE("GPL");