1 // SPDX-License-Identifier: GPL-2.0
3 * V4L2 Driver for Renesas Capture Engine Unit (CEU) interface
6 * Based on soc-camera driver "soc_camera/sh_mobile_ceu_camera.c"
7 * Copyright (C) 2008 Magnus Damm
9 * Based on V4L2 Driver for PXA camera host - "pxa_camera.c",
10 * Copyright (C) 2006, Sascha Hauer, Pengutronix
14 #include <linux/delay.h>
15 #include <linux/device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/err.h>
18 #include <linux/errno.h>
19 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
23 #include <linux/module.h>
25 #include <linux/of_graph.h>
26 #include <linux/platform_device.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/slab.h>
29 #include <linux/time.h>
30 #include <linux/videodev2.h>
32 #include <media/v4l2-async.h>
33 #include <media/v4l2-common.h>
34 #include <media/v4l2-ctrls.h>
35 #include <media/v4l2-dev.h>
36 #include <media/v4l2-device.h>
37 #include <media/v4l2-event.h>
38 #include <media/v4l2-fwnode.h>
39 #include <media/v4l2-image-sizes.h>
40 #include <media/v4l2-ioctl.h>
41 #include <media/v4l2-mediabus.h>
42 #include <media/videobuf2-dma-contig.h>
44 #include <media/drv-intf/renesas-ceu.h>
46 #define DRIVER_NAME "renesas-ceu"
48 /* CEU registers offsets and masks. */
49 #define CEU_CAPSR 0x00 /* Capture start register */
50 #define CEU_CAPCR 0x04 /* Capture control register */
51 #define CEU_CAMCR 0x08 /* Capture interface control register */
52 #define CEU_CAMOR 0x10 /* Capture interface offset register */
53 #define CEU_CAPWR 0x14 /* Capture interface width register */
54 #define CEU_CAIFR 0x18 /* Capture interface input format register */
55 #define CEU_CRCNTR 0x28 /* CEU register control register */
56 #define CEU_CRCMPR 0x2c /* CEU register forcible control register */
57 #define CEU_CFLCR 0x30 /* Capture filter control register */
58 #define CEU_CFSZR 0x34 /* Capture filter size clip register */
59 #define CEU_CDWDR 0x38 /* Capture destination width register */
60 #define CEU_CDAYR 0x3c /* Capture data address Y register */
61 #define CEU_CDACR 0x40 /* Capture data address C register */
62 #define CEU_CFWCR 0x5c /* Firewall operation control register */
63 #define CEU_CDOCR 0x64 /* Capture data output control register */
64 #define CEU_CEIER 0x70 /* Capture event interrupt enable register */
65 #define CEU_CETCR 0x74 /* Capture event flag clear register */
66 #define CEU_CSTSR 0x7c /* Capture status register */
67 #define CEU_CSRTR 0x80 /* Capture software reset register */
69 /* Data synchronous fetch mode. */
70 #define CEU_CAMCR_JPEG BIT(4)
72 /* Input components ordering: CEU_CAMCR.DTARY field. */
73 #define CEU_CAMCR_DTARY_8_UYVY (0x00 << 8)
74 #define CEU_CAMCR_DTARY_8_VYUY (0x01 << 8)
75 #define CEU_CAMCR_DTARY_8_YUYV (0x02 << 8)
76 #define CEU_CAMCR_DTARY_8_YVYU (0x03 << 8)
77 /* TODO: input components ordering for 16 bits input. */
79 /* Bus transfer MTU. */
80 #define CEU_CAPCR_BUS_WIDTH256 (0x3 << 20)
82 /* Bus width configuration. */
83 #define CEU_CAMCR_DTIF_16BITS BIT(12)
85 /* No downsampling to planar YUV420 in image fetch mode. */
86 #define CEU_CDOCR_NO_DOWSAMPLE BIT(4)
88 /* Swap all input data in 8-bit, 16-bits and 32-bits units (Figure 46.45). */
89 #define CEU_CDOCR_SWAP_ENDIANNESS (7)
91 /* Capture reset and enable bits. */
92 #define CEU_CAPSR_CPKIL BIT(16)
93 #define CEU_CAPSR_CE BIT(0)
95 /* CEU operating flag bit. */
96 #define CEU_CAPCR_CTNCP BIT(16)
97 #define CEU_CSTRST_CPTON BIT(0)
99 /* Platform specific IRQ source flags. */
100 #define CEU_CETCR_ALL_IRQS_RZ 0x397f313
101 #define CEU_CETCR_ALL_IRQS_SH4 0x3d7f313
103 /* Prohibited register access interrupt bit. */
104 #define CEU_CETCR_IGRW BIT(4)
105 /* One-frame capture end interrupt. */
106 #define CEU_CEIER_CPE BIT(0)
108 #define CEU_CEIER_VBP BIT(20)
109 #define CEU_CEIER_MASK (CEU_CEIER_CPE | CEU_CEIER_VBP)
111 #define CEU_MAX_WIDTH 2560
112 #define CEU_MAX_HEIGHT 1920
113 #define CEU_MAX_BPL 8188
114 #define CEU_W_MAX(w) ((w) < CEU_MAX_WIDTH ? (w) : CEU_MAX_WIDTH)
115 #define CEU_H_MAX(h) ((h) < CEU_MAX_HEIGHT ? (h) : CEU_MAX_HEIGHT)
118 * ceu_bus_fmt - describe a 8-bits yuyv format the sensor can produce
120 * @mbus_code: bus format code
121 * @fmt_order: CEU_CAMCR.DTARY ordering of input components (Y, Cb, Cr)
122 * @fmt_order_swap: swapped CEU_CAMCR.DTARY ordering of input components
124 * @swapped: does Cr appear before Cb?
125 * @bps: number of bits sent over bus for each sample
126 * @bpp: number of bits per pixels unit
128 struct ceu_mbus_fmt {
138 * ceu_buffer - Link vb2 buffer to the list of available buffers.
141 struct vb2_v4l2_buffer vb;
142 struct list_head queue;
145 static inline struct ceu_buffer *vb2_to_ceu(struct vb2_v4l2_buffer *vbuf)
147 return container_of(vbuf, struct ceu_buffer, vb);
151 * ceu_subdev - Wraps v4l2 sub-device and provides async subdevice.
154 struct v4l2_async_connection asd;
155 struct v4l2_subdev *v4l2_sd;
157 /* per-subdevice mbus configuration options */
158 unsigned int mbus_flags;
159 struct ceu_mbus_fmt mbus_fmt;
162 static struct ceu_subdev *to_ceu_subdev(struct v4l2_async_connection *asd)
164 return container_of(asd, struct ceu_subdev, asd);
168 * ceu_device - CEU device instance
172 struct video_device vdev;
173 struct v4l2_device v4l2_dev;
175 /* subdevices descriptors */
176 struct ceu_subdev **subdevs;
177 /* the subdevice currently in use */
178 struct ceu_subdev *sd;
179 unsigned int sd_index;
182 /* platform specific mask with all IRQ sources flagged */
185 /* currently configured field and pixel format */
186 enum v4l2_field field;
187 struct v4l2_pix_format_mplane v4l2_pix;
189 /* async subdev notification helpers */
190 struct v4l2_async_notifier notifier;
192 /* vb2 queue, capture buffer list and active buffer pointer */
193 struct vb2_queue vb2_vq;
194 struct list_head capture;
195 struct vb2_v4l2_buffer *active;
196 unsigned int sequence;
198 /* mlock - lock access to interface reset and vb2 queue */
201 /* lock - lock access to capture buffer queue and active buffer */
204 /* base - CEU memory base address */
208 static inline struct ceu_device *v4l2_to_ceu(struct v4l2_device *v4l2_dev)
210 return container_of(v4l2_dev, struct ceu_device, v4l2_dev);
213 /* --- CEU memory output formats --- */
216 * ceu_fmt - describe a memory output format supported by CEU interface.
218 * @fourcc: memory layout fourcc format code
219 * @bpp: number of bits for each pixel stored in memory
227 * ceu_format_list - List of supported memory output formats
229 * If sensor provides any YUYV bus format, all the following planar memory
230 * formats are available thanks to CEU re-ordering and sub-sampling
233 static const struct ceu_fmt ceu_fmt_list[] = {
235 .fourcc = V4L2_PIX_FMT_NV16,
239 .fourcc = V4L2_PIX_FMT_NV61,
243 .fourcc = V4L2_PIX_FMT_NV12,
247 .fourcc = V4L2_PIX_FMT_NV21,
251 .fourcc = V4L2_PIX_FMT_YUYV,
255 .fourcc = V4L2_PIX_FMT_UYVY,
259 .fourcc = V4L2_PIX_FMT_YVYU,
263 .fourcc = V4L2_PIX_FMT_VYUY,
268 static const struct ceu_fmt *get_ceu_fmt_from_fourcc(unsigned int fourcc)
270 const struct ceu_fmt *fmt = &ceu_fmt_list[0];
273 for (i = 0; i < ARRAY_SIZE(ceu_fmt_list); i++, fmt++)
274 if (fmt->fourcc == fourcc)
280 static bool ceu_fmt_mplane(struct v4l2_pix_format_mplane *pix)
282 switch (pix->pixelformat) {
283 case V4L2_PIX_FMT_YUYV:
284 case V4L2_PIX_FMT_UYVY:
285 case V4L2_PIX_FMT_YVYU:
286 case V4L2_PIX_FMT_VYUY:
288 case V4L2_PIX_FMT_NV16:
289 case V4L2_PIX_FMT_NV61:
290 case V4L2_PIX_FMT_NV12:
291 case V4L2_PIX_FMT_NV21:
298 /* --- CEU HW operations --- */
300 static void ceu_write(struct ceu_device *priv, unsigned int reg_offs, u32 data)
302 iowrite32(data, priv->base + reg_offs);
305 static u32 ceu_read(struct ceu_device *priv, unsigned int reg_offs)
307 return ioread32(priv->base + reg_offs);
311 * ceu_soft_reset() - Software reset the CEU interface.
312 * @ceu_device: CEU device.
314 * Returns 0 for success, -EIO for error.
316 static int ceu_soft_reset(struct ceu_device *ceudev)
320 ceu_write(ceudev, CEU_CAPSR, CEU_CAPSR_CPKIL);
322 for (i = 0; i < 100; i++) {
323 if (!(ceu_read(ceudev, CEU_CSTSR) & CEU_CSTRST_CPTON))
329 dev_err(ceudev->dev, "soft reset time out\n");
333 for (i = 0; i < 100; i++) {
334 if (!(ceu_read(ceudev, CEU_CAPSR) & CEU_CAPSR_CPKIL))
339 /* If we get here, CEU has not reset properly. */
343 /* --- CEU Capture Operations --- */
346 * ceu_hw_config() - Configure CEU interface registers.
348 static int ceu_hw_config(struct ceu_device *ceudev)
350 u32 camcr, cdocr, cfzsr, cdwdr, capwr;
351 struct v4l2_pix_format_mplane *pix = &ceudev->v4l2_pix;
352 struct ceu_subdev *ceu_sd = ceudev->sd;
353 struct ceu_mbus_fmt *mbus_fmt = &ceu_sd->mbus_fmt;
354 unsigned int mbus_flags = ceu_sd->mbus_flags;
356 /* Start configuring CEU registers */
357 ceu_write(ceudev, CEU_CAIFR, 0);
358 ceu_write(ceudev, CEU_CFWCR, 0);
359 ceu_write(ceudev, CEU_CRCNTR, 0);
360 ceu_write(ceudev, CEU_CRCMPR, 0);
362 /* Set the frame capture period for both image capture and data sync. */
363 capwr = (pix->height << 16) | pix->width * mbus_fmt->bpp / 8;
366 * Swap input data endianness by default.
367 * In data fetch mode bytes are received in chunks of 8 bytes.
368 * D0, D1, D2, D3, D4, D5, D6, D7 (D0 received first)
369 * The data is however by default written to memory in reverse order:
370 * D7, D6, D5, D4, D3, D2, D1, D0 (D7 written to lowest byte)
372 * Use CEU_CDOCR[2:0] to swap data ordering.
374 cdocr = CEU_CDOCR_SWAP_ENDIANNESS;
377 * Configure CAMCR and CDOCR:
378 * match input components ordering with memory output format and
379 * handle downsampling to YUV420.
381 * If the memory output planar format is 'swapped' (Cr before Cb) and
382 * input format is not, use the swapped version of CAMCR.DTARY.
384 * If the memory output planar format is not 'swapped' (Cb before Cr)
385 * and input format is, use the swapped version of CAMCR.DTARY.
387 * CEU by default downsample to planar YUV420 (CDCOR[4] = 0).
388 * If output is planar YUV422 set CDOCR[4] = 1
390 * No downsample for data fetch sync mode.
392 switch (pix->pixelformat) {
393 /* Data fetch sync mode */
394 case V4L2_PIX_FMT_YUYV:
395 case V4L2_PIX_FMT_YVYU:
396 case V4L2_PIX_FMT_UYVY:
397 case V4L2_PIX_FMT_VYUY:
398 camcr = CEU_CAMCR_JPEG;
399 cdocr |= CEU_CDOCR_NO_DOWSAMPLE;
400 cfzsr = (pix->height << 16) | pix->width;
401 cdwdr = pix->plane_fmt[0].bytesperline;
404 /* Non-swapped planar image capture mode. */
405 case V4L2_PIX_FMT_NV16:
406 cdocr |= CEU_CDOCR_NO_DOWSAMPLE;
408 case V4L2_PIX_FMT_NV12:
409 if (mbus_fmt->swapped)
410 camcr = mbus_fmt->fmt_order_swap;
412 camcr = mbus_fmt->fmt_order;
414 cfzsr = (pix->height << 16) | pix->width;
418 /* Swapped planar image capture mode. */
419 case V4L2_PIX_FMT_NV61:
420 cdocr |= CEU_CDOCR_NO_DOWSAMPLE;
422 case V4L2_PIX_FMT_NV21:
423 if (mbus_fmt->swapped)
424 camcr = mbus_fmt->fmt_order;
426 camcr = mbus_fmt->fmt_order_swap;
428 cfzsr = (pix->height << 16) | pix->width;
436 camcr |= mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW ? 1 << 1 : 0;
437 camcr |= mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW ? 1 << 0 : 0;
439 /* TODO: handle 16 bit bus width with DTIF bit in CAMCR */
440 ceu_write(ceudev, CEU_CAMCR, camcr);
441 ceu_write(ceudev, CEU_CDOCR, cdocr);
442 ceu_write(ceudev, CEU_CAPCR, CEU_CAPCR_BUS_WIDTH256);
445 * TODO: make CAMOR offsets configurable.
446 * CAMOR wants to know the number of blanks between a VS/HS signal
447 * and valid data. This value should actually come from the sensor...
449 ceu_write(ceudev, CEU_CAMOR, 0);
451 /* TODO: 16 bit bus width require re-calculation of cdwdr and cfzsr */
452 ceu_write(ceudev, CEU_CAPWR, capwr);
453 ceu_write(ceudev, CEU_CFSZR, cfzsr);
454 ceu_write(ceudev, CEU_CDWDR, cdwdr);
460 * ceu_capture() - Trigger start of a capture sequence.
462 * Program the CEU DMA registers with addresses where to transfer image data.
464 static int ceu_capture(struct ceu_device *ceudev)
466 struct v4l2_pix_format_mplane *pix = &ceudev->v4l2_pix;
467 dma_addr_t phys_addr_top;
470 vb2_dma_contig_plane_dma_addr(&ceudev->active->vb2_buf, 0);
471 ceu_write(ceudev, CEU_CDAYR, phys_addr_top);
473 /* Ignore CbCr plane for non multi-planar image formats. */
474 if (ceu_fmt_mplane(pix)) {
476 vb2_dma_contig_plane_dma_addr(&ceudev->active->vb2_buf,
478 ceu_write(ceudev, CEU_CDACR, phys_addr_top);
482 * Trigger new capture start: once for each frame, as we work in
483 * one-frame capture mode.
485 ceu_write(ceudev, CEU_CAPSR, CEU_CAPSR_CE);
490 static irqreturn_t ceu_irq(int irq, void *data)
492 struct ceu_device *ceudev = data;
493 struct vb2_v4l2_buffer *vbuf;
494 struct ceu_buffer *buf;
497 /* Clean interrupt status. */
498 status = ceu_read(ceudev, CEU_CETCR);
499 ceu_write(ceudev, CEU_CETCR, ~ceudev->irq_mask);
501 /* Unexpected interrupt. */
502 if (!(status & CEU_CEIER_MASK))
505 spin_lock(&ceudev->lock);
507 /* Stale interrupt from a released buffer, ignore it. */
508 vbuf = ceudev->active;
510 spin_unlock(&ceudev->lock);
515 * When a VBP interrupt occurs, no capture end interrupt will occur
516 * and the image of that frame is not captured correctly.
518 if (status & CEU_CEIER_VBP) {
519 dev_err(ceudev->dev, "VBP interrupt: abort capture\n");
523 /* Prepare to return the 'previous' buffer. */
524 vbuf->vb2_buf.timestamp = ktime_get_ns();
525 vbuf->sequence = ceudev->sequence++;
526 vbuf->field = ceudev->field;
528 /* Prepare a new 'active' buffer and trigger a new capture. */
529 if (!list_empty(&ceudev->capture)) {
530 buf = list_first_entry(&ceudev->capture, struct ceu_buffer,
532 list_del(&buf->queue);
533 ceudev->active = &buf->vb;
538 /* Return the 'previous' buffer. */
539 vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_DONE);
541 spin_unlock(&ceudev->lock);
546 /* Return the 'previous' buffer and all queued ones. */
547 vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_ERROR);
549 list_for_each_entry(buf, &ceudev->capture, queue)
550 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
552 spin_unlock(&ceudev->lock);
557 /* --- CEU Videobuf2 operations --- */
559 static void ceu_update_plane_sizes(struct v4l2_plane_pix_format *plane,
560 unsigned int bpl, unsigned int szimage)
562 memset(plane, 0, sizeof(*plane));
564 plane->sizeimage = szimage;
565 if (plane->bytesperline < bpl || plane->bytesperline > CEU_MAX_BPL)
566 plane->bytesperline = bpl;
570 * ceu_calc_plane_sizes() - Fill per-plane 'struct v4l2_plane_pix_format'
571 * information according to the currently configured
573 * @ceu_device: CEU device.
574 * @ceu_fmt: Active image format.
575 * @pix: Pixel format information (store line width and image sizes)
577 static void ceu_calc_plane_sizes(struct ceu_device *ceudev,
578 const struct ceu_fmt *ceu_fmt,
579 struct v4l2_pix_format_mplane *pix)
581 unsigned int bpl, szimage;
583 switch (pix->pixelformat) {
584 case V4L2_PIX_FMT_YUYV:
585 case V4L2_PIX_FMT_UYVY:
586 case V4L2_PIX_FMT_YVYU:
587 case V4L2_PIX_FMT_VYUY:
589 bpl = pix->width * ceu_fmt->bpp / 8;
590 szimage = pix->height * bpl;
591 ceu_update_plane_sizes(&pix->plane_fmt[0], bpl, szimage);
594 case V4L2_PIX_FMT_NV12:
595 case V4L2_PIX_FMT_NV21:
598 szimage = pix->height * pix->width;
599 ceu_update_plane_sizes(&pix->plane_fmt[0], bpl, szimage);
600 ceu_update_plane_sizes(&pix->plane_fmt[1], bpl, szimage / 2);
603 case V4L2_PIX_FMT_NV16:
604 case V4L2_PIX_FMT_NV61:
608 szimage = pix->height * pix->width;
609 ceu_update_plane_sizes(&pix->plane_fmt[0], bpl, szimage);
610 ceu_update_plane_sizes(&pix->plane_fmt[1], bpl, szimage);
616 * ceu_vb2_setup() - is called to check whether the driver can accept the
617 * requested number of buffers and to fill in plane sizes
618 * for the current frame format, if required.
620 static int ceu_vb2_setup(struct vb2_queue *vq, unsigned int *count,
621 unsigned int *num_planes, unsigned int sizes[],
622 struct device *alloc_devs[])
624 struct ceu_device *ceudev = vb2_get_drv_priv(vq);
625 struct v4l2_pix_format_mplane *pix = &ceudev->v4l2_pix;
628 /* num_planes is set: just check plane sizes. */
630 for (i = 0; i < pix->num_planes; i++)
631 if (sizes[i] < pix->plane_fmt[i].sizeimage)
637 /* num_planes not set: called from REQBUFS, just set plane sizes. */
638 *num_planes = pix->num_planes;
639 for (i = 0; i < pix->num_planes; i++)
640 sizes[i] = pix->plane_fmt[i].sizeimage;
645 static void ceu_vb2_queue(struct vb2_buffer *vb)
647 struct ceu_device *ceudev = vb2_get_drv_priv(vb->vb2_queue);
648 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
649 struct ceu_buffer *buf = vb2_to_ceu(vbuf);
650 unsigned long irqflags;
652 spin_lock_irqsave(&ceudev->lock, irqflags);
653 list_add_tail(&buf->queue, &ceudev->capture);
654 spin_unlock_irqrestore(&ceudev->lock, irqflags);
657 static int ceu_vb2_prepare(struct vb2_buffer *vb)
659 struct ceu_device *ceudev = vb2_get_drv_priv(vb->vb2_queue);
660 struct v4l2_pix_format_mplane *pix = &ceudev->v4l2_pix;
663 for (i = 0; i < pix->num_planes; i++) {
664 if (vb2_plane_size(vb, i) < pix->plane_fmt[i].sizeimage) {
666 "Plane size too small (%lu < %u)\n",
667 vb2_plane_size(vb, i),
668 pix->plane_fmt[i].sizeimage);
672 vb2_set_plane_payload(vb, i, pix->plane_fmt[i].sizeimage);
678 static int ceu_start_streaming(struct vb2_queue *vq, unsigned int count)
680 struct ceu_device *ceudev = vb2_get_drv_priv(vq);
681 struct v4l2_subdev *v4l2_sd = ceudev->sd->v4l2_sd;
682 struct ceu_buffer *buf;
683 unsigned long irqflags;
686 /* Program the CEU interface according to the CEU image format. */
687 ret = ceu_hw_config(ceudev);
689 goto error_return_bufs;
691 ret = v4l2_subdev_call(v4l2_sd, video, s_stream, 1);
692 if (ret && ret != -ENOIOCTLCMD) {
694 "Subdevice failed to start streaming: %d\n", ret);
695 goto error_return_bufs;
698 spin_lock_irqsave(&ceudev->lock, irqflags);
699 ceudev->sequence = 0;
701 /* Grab the first available buffer and trigger the first capture. */
702 buf = list_first_entry(&ceudev->capture, struct ceu_buffer,
705 list_del(&buf->queue);
706 ceudev->active = &buf->vb;
708 /* Clean and program interrupts for first capture. */
709 ceu_write(ceudev, CEU_CETCR, ~ceudev->irq_mask);
710 ceu_write(ceudev, CEU_CEIER, CEU_CEIER_MASK);
714 spin_unlock_irqrestore(&ceudev->lock, irqflags);
719 spin_lock_irqsave(&ceudev->lock, irqflags);
720 list_for_each_entry(buf, &ceudev->capture, queue)
721 vb2_buffer_done(&ceudev->active->vb2_buf,
722 VB2_BUF_STATE_QUEUED);
723 ceudev->active = NULL;
724 spin_unlock_irqrestore(&ceudev->lock, irqflags);
729 static void ceu_stop_streaming(struct vb2_queue *vq)
731 struct ceu_device *ceudev = vb2_get_drv_priv(vq);
732 struct v4l2_subdev *v4l2_sd = ceudev->sd->v4l2_sd;
733 struct ceu_buffer *buf;
734 unsigned long irqflags;
736 /* Clean and disable interrupt sources. */
737 ceu_write(ceudev, CEU_CETCR,
738 ceu_read(ceudev, CEU_CETCR) & ceudev->irq_mask);
739 ceu_write(ceudev, CEU_CEIER, CEU_CEIER_MASK);
741 v4l2_subdev_call(v4l2_sd, video, s_stream, 0);
743 spin_lock_irqsave(&ceudev->lock, irqflags);
744 if (ceudev->active) {
745 vb2_buffer_done(&ceudev->active->vb2_buf,
746 VB2_BUF_STATE_ERROR);
747 ceudev->active = NULL;
750 /* Release all queued buffers. */
751 list_for_each_entry(buf, &ceudev->capture, queue)
752 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
753 INIT_LIST_HEAD(&ceudev->capture);
755 spin_unlock_irqrestore(&ceudev->lock, irqflags);
757 ceu_soft_reset(ceudev);
760 static const struct vb2_ops ceu_vb2_ops = {
761 .queue_setup = ceu_vb2_setup,
762 .buf_queue = ceu_vb2_queue,
763 .buf_prepare = ceu_vb2_prepare,
764 .start_streaming = ceu_start_streaming,
765 .stop_streaming = ceu_stop_streaming,
768 /* --- CEU image formats handling --- */
771 * __ceu_try_fmt() - test format on CEU and sensor
772 * @ceudev: The CEU device.
773 * @v4l2_fmt: format to test.
774 * @sd_mbus_code: the media bus code accepted by the subdevice; output param.
776 * Returns 0 for success, < 0 for errors.
778 static int __ceu_try_fmt(struct ceu_device *ceudev, struct v4l2_format *v4l2_fmt,
781 struct ceu_subdev *ceu_sd = ceudev->sd;
782 struct v4l2_pix_format_mplane *pix = &v4l2_fmt->fmt.pix_mp;
783 struct v4l2_subdev *v4l2_sd = ceu_sd->v4l2_sd;
784 struct v4l2_subdev_pad_config pad_cfg;
785 struct v4l2_subdev_state pad_state = {
788 const struct ceu_fmt *ceu_fmt;
794 * Set format on sensor sub device: bus format used to produce memory
795 * format is selected depending on YUV component ordering or
796 * at initialization time.
798 struct v4l2_subdev_format sd_format = {
799 .which = V4L2_SUBDEV_FORMAT_TRY,
802 mbus_code_old = ceu_sd->mbus_fmt.mbus_code;
804 switch (pix->pixelformat) {
805 case V4L2_PIX_FMT_YUYV:
806 mbus_code = MEDIA_BUS_FMT_YUYV8_2X8;
808 case V4L2_PIX_FMT_UYVY:
809 mbus_code = MEDIA_BUS_FMT_UYVY8_2X8;
811 case V4L2_PIX_FMT_YVYU:
812 mbus_code = MEDIA_BUS_FMT_YVYU8_2X8;
814 case V4L2_PIX_FMT_VYUY:
815 mbus_code = MEDIA_BUS_FMT_VYUY8_2X8;
817 case V4L2_PIX_FMT_NV16:
818 case V4L2_PIX_FMT_NV61:
819 case V4L2_PIX_FMT_NV12:
820 case V4L2_PIX_FMT_NV21:
821 mbus_code = ceu_sd->mbus_fmt.mbus_code;
825 pix->pixelformat = V4L2_PIX_FMT_NV16;
826 mbus_code = ceu_sd->mbus_fmt.mbus_code;
830 ceu_fmt = get_ceu_fmt_from_fourcc(pix->pixelformat);
832 /* CFSZR requires height and width to be 4-pixel aligned. */
833 v4l_bound_align_image(&pix->width, 2, CEU_MAX_WIDTH, 4,
834 &pix->height, 4, CEU_MAX_HEIGHT, 4, 0);
836 v4l2_fill_mbus_format_mplane(&sd_format.format, pix);
839 * Try with the mbus_code matching YUYV components ordering first,
840 * if that one fails, fallback to default selected at initialization
843 sd_format.format.code = mbus_code;
844 ret = v4l2_subdev_call(v4l2_sd, pad, set_fmt, &pad_state, &sd_format);
846 if (ret == -EINVAL) {
848 sd_format.format.code = mbus_code_old;
849 ret = v4l2_subdev_call(v4l2_sd, pad, set_fmt,
850 &pad_state, &sd_format);
857 /* Apply size returned by sensor as the CEU can't scale. */
858 v4l2_fill_pix_format_mplane(pix, &sd_format.format);
860 /* Calculate per-plane sizes based on image format. */
861 ceu_calc_plane_sizes(ceudev, ceu_fmt, pix);
863 /* Report to caller the configured mbus format. */
864 *sd_mbus_code = sd_format.format.code;
870 * ceu_try_fmt() - Wrapper for __ceu_try_fmt; discard configured mbus_fmt
872 static int ceu_try_fmt(struct ceu_device *ceudev, struct v4l2_format *v4l2_fmt)
876 return __ceu_try_fmt(ceudev, v4l2_fmt, &mbus_code);
880 * ceu_set_fmt() - Apply the supplied format to both sensor and CEU
882 static int ceu_set_fmt(struct ceu_device *ceudev, struct v4l2_format *v4l2_fmt)
884 struct ceu_subdev *ceu_sd = ceudev->sd;
885 struct v4l2_subdev *v4l2_sd = ceu_sd->v4l2_sd;
890 * Set format on sensor sub device: bus format used to produce memory
891 * format is selected at initialization time.
893 struct v4l2_subdev_format format = {
894 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
897 ret = __ceu_try_fmt(ceudev, v4l2_fmt, &mbus_code);
901 format.format.code = mbus_code;
902 v4l2_fill_mbus_format_mplane(&format.format, &v4l2_fmt->fmt.pix_mp);
903 ret = v4l2_subdev_call(v4l2_sd, pad, set_fmt, NULL, &format);
907 ceudev->v4l2_pix = v4l2_fmt->fmt.pix_mp;
908 ceudev->field = V4L2_FIELD_NONE;
914 * ceu_set_default_fmt() - Apply default NV16 memory output format with VGA
917 static int ceu_set_default_fmt(struct ceu_device *ceudev)
921 struct v4l2_format v4l2_fmt = {
922 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
925 .height = VGA_HEIGHT,
926 .field = V4L2_FIELD_NONE,
927 .pixelformat = V4L2_PIX_FMT_NV16,
931 .sizeimage = VGA_WIDTH * VGA_HEIGHT * 2,
932 .bytesperline = VGA_WIDTH * 2,
935 .sizeimage = VGA_WIDTH * VGA_HEIGHT * 2,
936 .bytesperline = VGA_WIDTH * 2,
942 ret = ceu_try_fmt(ceudev, &v4l2_fmt);
946 ceudev->v4l2_pix = v4l2_fmt.fmt.pix_mp;
947 ceudev->field = V4L2_FIELD_NONE;
953 * ceu_init_mbus_fmt() - Query sensor for supported formats and initialize
954 * CEU media bus format used to produce memory formats.
956 * Find out if sensor can produce a permutation of 8-bits YUYV bus format.
957 * From a single 8-bits YUYV bus format the CEU can produce several memory
959 * - NV[12|21|16|61] through image fetch mode;
960 * - YUYV422 if sensor provides YUYV422
962 * TODO: Other YUYV422 permutations through data fetch sync mode and DTARY
963 * TODO: Binary data (eg. JPEG) and raw formats through data fetch sync mode
965 static int ceu_init_mbus_fmt(struct ceu_device *ceudev)
967 struct ceu_subdev *ceu_sd = ceudev->sd;
968 struct ceu_mbus_fmt *mbus_fmt = &ceu_sd->mbus_fmt;
969 struct v4l2_subdev *v4l2_sd = ceu_sd->v4l2_sd;
970 bool yuyv_bus_fmt = false;
972 struct v4l2_subdev_mbus_code_enum sd_mbus_fmt = {
973 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
977 /* Find out if sensor can produce any permutation of 8-bits YUYV422. */
978 while (!yuyv_bus_fmt &&
979 !v4l2_subdev_call(v4l2_sd, pad, enum_mbus_code,
980 NULL, &sd_mbus_fmt)) {
981 switch (sd_mbus_fmt.code) {
982 case MEDIA_BUS_FMT_YUYV8_2X8:
983 case MEDIA_BUS_FMT_YVYU8_2X8:
984 case MEDIA_BUS_FMT_UYVY8_2X8:
985 case MEDIA_BUS_FMT_VYUY8_2X8:
990 * Only support 8-bits YUYV bus formats at the moment;
992 * TODO: add support for binary formats (data sync
1005 * Save the first encountered YUYV format as "mbus_fmt" and use it
1006 * to output all planar YUV422 and YUV420 (NV*) formats to memory as
1007 * well as for data synch fetch mode (YUYV - YVYU etc. ).
1009 mbus_fmt->mbus_code = sd_mbus_fmt.code;
1012 /* Annotate the selected bus format components ordering. */
1013 switch (sd_mbus_fmt.code) {
1014 case MEDIA_BUS_FMT_YUYV8_2X8:
1015 mbus_fmt->fmt_order = CEU_CAMCR_DTARY_8_YUYV;
1016 mbus_fmt->fmt_order_swap = CEU_CAMCR_DTARY_8_YVYU;
1017 mbus_fmt->swapped = false;
1021 case MEDIA_BUS_FMT_YVYU8_2X8:
1022 mbus_fmt->fmt_order = CEU_CAMCR_DTARY_8_YVYU;
1023 mbus_fmt->fmt_order_swap = CEU_CAMCR_DTARY_8_YUYV;
1024 mbus_fmt->swapped = true;
1028 case MEDIA_BUS_FMT_UYVY8_2X8:
1029 mbus_fmt->fmt_order = CEU_CAMCR_DTARY_8_UYVY;
1030 mbus_fmt->fmt_order_swap = CEU_CAMCR_DTARY_8_VYUY;
1031 mbus_fmt->swapped = false;
1035 case MEDIA_BUS_FMT_VYUY8_2X8:
1036 mbus_fmt->fmt_order = CEU_CAMCR_DTARY_8_VYUY;
1037 mbus_fmt->fmt_order_swap = CEU_CAMCR_DTARY_8_UYVY;
1038 mbus_fmt->swapped = true;
1046 /* --- Runtime PM Handlers --- */
1049 * ceu_runtime_resume() - soft-reset the interface and turn sensor power on.
1051 static int __maybe_unused ceu_runtime_resume(struct device *dev)
1053 struct ceu_device *ceudev = dev_get_drvdata(dev);
1054 struct v4l2_subdev *v4l2_sd = ceudev->sd->v4l2_sd;
1056 v4l2_subdev_call(v4l2_sd, core, s_power, 1);
1058 ceu_soft_reset(ceudev);
1064 * ceu_runtime_suspend() - disable capture and interrupts and soft-reset.
1065 * Turn sensor power off.
1067 static int __maybe_unused ceu_runtime_suspend(struct device *dev)
1069 struct ceu_device *ceudev = dev_get_drvdata(dev);
1070 struct v4l2_subdev *v4l2_sd = ceudev->sd->v4l2_sd;
1072 v4l2_subdev_call(v4l2_sd, core, s_power, 0);
1074 ceu_write(ceudev, CEU_CEIER, 0);
1075 ceu_soft_reset(ceudev);
1080 /* --- File Operations --- */
1082 static int ceu_open(struct file *file)
1084 struct ceu_device *ceudev = video_drvdata(file);
1087 ret = v4l2_fh_open(file);
1091 mutex_lock(&ceudev->mlock);
1092 /* Causes soft-reset and sensor power on on first open */
1093 ret = pm_runtime_resume_and_get(ceudev->dev);
1094 mutex_unlock(&ceudev->mlock);
1099 static int ceu_release(struct file *file)
1101 struct ceu_device *ceudev = video_drvdata(file);
1103 vb2_fop_release(file);
1105 mutex_lock(&ceudev->mlock);
1106 /* Causes soft-reset and sensor power down on last close */
1107 pm_runtime_put(ceudev->dev);
1108 mutex_unlock(&ceudev->mlock);
1113 static const struct v4l2_file_operations ceu_fops = {
1114 .owner = THIS_MODULE,
1116 .release = ceu_release,
1117 .unlocked_ioctl = video_ioctl2,
1118 .mmap = vb2_fop_mmap,
1119 .poll = vb2_fop_poll,
1122 /* --- Video Device IOCTLs --- */
1124 static int ceu_querycap(struct file *file, void *priv,
1125 struct v4l2_capability *cap)
1127 struct ceu_device *ceudev = video_drvdata(file);
1129 strscpy(cap->card, "Renesas CEU", sizeof(cap->card));
1130 strscpy(cap->driver, DRIVER_NAME, sizeof(cap->driver));
1131 snprintf(cap->bus_info, sizeof(cap->bus_info),
1132 "platform:renesas-ceu-%s", dev_name(ceudev->dev));
1137 static int ceu_enum_fmt_vid_cap(struct file *file, void *priv,
1138 struct v4l2_fmtdesc *f)
1140 const struct ceu_fmt *fmt;
1142 if (f->index >= ARRAY_SIZE(ceu_fmt_list))
1145 fmt = &ceu_fmt_list[f->index];
1146 f->pixelformat = fmt->fourcc;
1151 static int ceu_try_fmt_vid_cap(struct file *file, void *priv,
1152 struct v4l2_format *f)
1154 struct ceu_device *ceudev = video_drvdata(file);
1156 return ceu_try_fmt(ceudev, f);
1159 static int ceu_s_fmt_vid_cap(struct file *file, void *priv,
1160 struct v4l2_format *f)
1162 struct ceu_device *ceudev = video_drvdata(file);
1164 if (vb2_is_streaming(&ceudev->vb2_vq))
1167 return ceu_set_fmt(ceudev, f);
1170 static int ceu_g_fmt_vid_cap(struct file *file, void *priv,
1171 struct v4l2_format *f)
1173 struct ceu_device *ceudev = video_drvdata(file);
1175 f->fmt.pix_mp = ceudev->v4l2_pix;
1180 static int ceu_enum_input(struct file *file, void *priv,
1181 struct v4l2_input *inp)
1183 struct ceu_device *ceudev = video_drvdata(file);
1185 if (inp->index >= ceudev->num_sd)
1188 inp->type = V4L2_INPUT_TYPE_CAMERA;
1190 snprintf(inp->name, sizeof(inp->name), "Camera %u", inp->index);
1195 static int ceu_g_input(struct file *file, void *priv, unsigned int *i)
1197 struct ceu_device *ceudev = video_drvdata(file);
1199 *i = ceudev->sd_index;
1204 static int ceu_s_input(struct file *file, void *priv, unsigned int i)
1206 struct ceu_device *ceudev = video_drvdata(file);
1207 struct ceu_subdev *ceu_sd_old;
1210 if (i >= ceudev->num_sd)
1213 if (vb2_is_streaming(&ceudev->vb2_vq))
1216 if (i == ceudev->sd_index)
1219 ceu_sd_old = ceudev->sd;
1220 ceudev->sd = ceudev->subdevs[i];
1223 * Make sure we can generate output image formats and apply
1226 ret = ceu_init_mbus_fmt(ceudev);
1228 ceudev->sd = ceu_sd_old;
1232 ret = ceu_set_default_fmt(ceudev);
1234 ceudev->sd = ceu_sd_old;
1238 /* Now that we're sure we can use the sensor, power off the old one. */
1239 v4l2_subdev_call(ceu_sd_old->v4l2_sd, core, s_power, 0);
1240 v4l2_subdev_call(ceudev->sd->v4l2_sd, core, s_power, 1);
1242 ceudev->sd_index = i;
1247 static int ceu_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a)
1249 struct ceu_device *ceudev = video_drvdata(file);
1251 return v4l2_g_parm_cap(video_devdata(file), ceudev->sd->v4l2_sd, a);
1254 static int ceu_s_parm(struct file *file, void *fh, struct v4l2_streamparm *a)
1256 struct ceu_device *ceudev = video_drvdata(file);
1258 return v4l2_s_parm_cap(video_devdata(file), ceudev->sd->v4l2_sd, a);
1261 static int ceu_enum_framesizes(struct file *file, void *fh,
1262 struct v4l2_frmsizeenum *fsize)
1264 struct ceu_device *ceudev = video_drvdata(file);
1265 struct ceu_subdev *ceu_sd = ceudev->sd;
1266 const struct ceu_fmt *ceu_fmt;
1267 struct v4l2_subdev *v4l2_sd = ceu_sd->v4l2_sd;
1270 struct v4l2_subdev_frame_size_enum fse = {
1271 .code = ceu_sd->mbus_fmt.mbus_code,
1272 .index = fsize->index,
1273 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1276 /* Just check if user supplied pixel format is supported. */
1277 ceu_fmt = get_ceu_fmt_from_fourcc(fsize->pixel_format);
1281 ret = v4l2_subdev_call(v4l2_sd, pad, enum_frame_size,
1286 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1287 fsize->discrete.width = CEU_W_MAX(fse.max_width);
1288 fsize->discrete.height = CEU_H_MAX(fse.max_height);
1293 static int ceu_enum_frameintervals(struct file *file, void *fh,
1294 struct v4l2_frmivalenum *fival)
1296 struct ceu_device *ceudev = video_drvdata(file);
1297 struct ceu_subdev *ceu_sd = ceudev->sd;
1298 const struct ceu_fmt *ceu_fmt;
1299 struct v4l2_subdev *v4l2_sd = ceu_sd->v4l2_sd;
1302 struct v4l2_subdev_frame_interval_enum fie = {
1303 .code = ceu_sd->mbus_fmt.mbus_code,
1304 .index = fival->index,
1305 .width = fival->width,
1306 .height = fival->height,
1307 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1310 /* Just check if user supplied pixel format is supported. */
1311 ceu_fmt = get_ceu_fmt_from_fourcc(fival->pixel_format);
1315 ret = v4l2_subdev_call(v4l2_sd, pad, enum_frame_interval, NULL,
1320 fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
1321 fival->discrete = fie.interval;
1326 static const struct v4l2_ioctl_ops ceu_ioctl_ops = {
1327 .vidioc_querycap = ceu_querycap,
1329 .vidioc_enum_fmt_vid_cap = ceu_enum_fmt_vid_cap,
1330 .vidioc_try_fmt_vid_cap_mplane = ceu_try_fmt_vid_cap,
1331 .vidioc_s_fmt_vid_cap_mplane = ceu_s_fmt_vid_cap,
1332 .vidioc_g_fmt_vid_cap_mplane = ceu_g_fmt_vid_cap,
1334 .vidioc_enum_input = ceu_enum_input,
1335 .vidioc_g_input = ceu_g_input,
1336 .vidioc_s_input = ceu_s_input,
1338 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1339 .vidioc_querybuf = vb2_ioctl_querybuf,
1340 .vidioc_qbuf = vb2_ioctl_qbuf,
1341 .vidioc_expbuf = vb2_ioctl_expbuf,
1342 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1343 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1344 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1345 .vidioc_streamon = vb2_ioctl_streamon,
1346 .vidioc_streamoff = vb2_ioctl_streamoff,
1348 .vidioc_g_parm = ceu_g_parm,
1349 .vidioc_s_parm = ceu_s_parm,
1350 .vidioc_enum_framesizes = ceu_enum_framesizes,
1351 .vidioc_enum_frameintervals = ceu_enum_frameintervals,
1353 .vidioc_log_status = v4l2_ctrl_log_status,
1354 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1355 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1359 * ceu_vdev_release() - release CEU video device memory when last reference
1360 * to this driver is closed
1362 static void ceu_vdev_release(struct video_device *vdev)
1364 struct ceu_device *ceudev = video_get_drvdata(vdev);
1369 static int ceu_notify_bound(struct v4l2_async_notifier *notifier,
1370 struct v4l2_subdev *v4l2_sd,
1371 struct v4l2_async_connection *asd)
1373 struct v4l2_device *v4l2_dev = notifier->v4l2_dev;
1374 struct ceu_device *ceudev = v4l2_to_ceu(v4l2_dev);
1375 struct ceu_subdev *ceu_sd = to_ceu_subdev(asd);
1377 ceu_sd->v4l2_sd = v4l2_sd;
1383 static int ceu_notify_complete(struct v4l2_async_notifier *notifier)
1385 struct v4l2_device *v4l2_dev = notifier->v4l2_dev;
1386 struct ceu_device *ceudev = v4l2_to_ceu(v4l2_dev);
1387 struct video_device *vdev = &ceudev->vdev;
1388 struct vb2_queue *q = &ceudev->vb2_vq;
1389 struct v4l2_subdev *v4l2_sd;
1392 /* Initialize vb2 queue. */
1393 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1394 q->io_modes = VB2_MMAP | VB2_DMABUF;
1395 q->drv_priv = ceudev;
1396 q->ops = &ceu_vb2_ops;
1397 q->mem_ops = &vb2_dma_contig_memops;
1398 q->buf_struct_size = sizeof(struct ceu_buffer);
1399 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1400 q->min_queued_buffers = 2;
1401 q->lock = &ceudev->mlock;
1402 q->dev = ceudev->v4l2_dev.dev;
1404 ret = vb2_queue_init(q);
1409 * Make sure at least one sensor is primary and use it to initialize
1413 ceudev->sd = ceudev->subdevs[0];
1414 ceudev->sd_index = 0;
1417 v4l2_sd = ceudev->sd->v4l2_sd;
1419 ret = ceu_init_mbus_fmt(ceudev);
1423 ret = ceu_set_default_fmt(ceudev);
1427 /* Register the video device. */
1428 strscpy(vdev->name, DRIVER_NAME, sizeof(vdev->name));
1429 vdev->v4l2_dev = v4l2_dev;
1430 vdev->lock = &ceudev->mlock;
1431 vdev->queue = &ceudev->vb2_vq;
1432 vdev->ctrl_handler = v4l2_sd->ctrl_handler;
1433 vdev->fops = &ceu_fops;
1434 vdev->ioctl_ops = &ceu_ioctl_ops;
1435 vdev->release = ceu_vdev_release;
1436 vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE |
1438 video_set_drvdata(vdev, ceudev);
1440 ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1);
1442 v4l2_err(vdev->v4l2_dev,
1443 "video_register_device failed: %d\n", ret);
1450 static const struct v4l2_async_notifier_operations ceu_notify_ops = {
1451 .bound = ceu_notify_bound,
1452 .complete = ceu_notify_complete,
1456 * ceu_init_async_subdevs() - Initialize CEU subdevices and async_subdevs in
1457 * ceu device. Both DT and platform data parsing use
1460 * Returns 0 for success, -ENOMEM for failure.
1462 static int ceu_init_async_subdevs(struct ceu_device *ceudev, unsigned int n_sd)
1464 /* Reserve memory for 'n_sd' ceu_subdev descriptors. */
1465 ceudev->subdevs = devm_kcalloc(ceudev->dev, n_sd,
1466 sizeof(*ceudev->subdevs), GFP_KERNEL);
1467 if (!ceudev->subdevs)
1471 ceudev->sd_index = 0;
1478 * ceu_parse_platform_data() - Initialize async_subdevices using platform
1479 * device provided data.
1481 static int ceu_parse_platform_data(struct ceu_device *ceudev,
1482 const struct ceu_platform_data *pdata)
1484 const struct ceu_async_subdev *async_sd;
1485 struct ceu_subdev *ceu_sd;
1489 if (pdata->num_subdevs == 0)
1492 ret = ceu_init_async_subdevs(ceudev, pdata->num_subdevs);
1496 for (i = 0; i < pdata->num_subdevs; i++) {
1498 /* Setup the ceu subdevice and the async subdevice. */
1499 async_sd = &pdata->subdevs[i];
1500 ceu_sd = v4l2_async_nf_add_i2c(&ceudev->notifier,
1501 async_sd->i2c_adapter_id,
1502 async_sd->i2c_address,
1504 if (IS_ERR(ceu_sd)) {
1505 v4l2_async_nf_cleanup(&ceudev->notifier);
1506 return PTR_ERR(ceu_sd);
1508 ceu_sd->mbus_flags = async_sd->flags;
1509 ceudev->subdevs[i] = ceu_sd;
1512 return pdata->num_subdevs;
1516 * ceu_parse_dt() - Initialize async_subdevs parsing device tree graph.
1518 static int ceu_parse_dt(struct ceu_device *ceudev)
1520 struct device_node *of = ceudev->dev->of_node;
1521 struct device_node *ep;
1522 struct ceu_subdev *ceu_sd;
1527 num_ep = of_graph_get_endpoint_count(of);
1531 ret = ceu_init_async_subdevs(ceudev, num_ep);
1535 for (i = 0; i < num_ep; i++) {
1536 struct v4l2_fwnode_endpoint fw_ep = {
1537 .bus_type = V4L2_MBUS_PARALLEL,
1540 .flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
1541 V4L2_MBUS_VSYNC_ACTIVE_HIGH,
1547 ep = of_graph_get_endpoint_by_regs(of, 0, i);
1549 dev_err(ceudev->dev,
1550 "No subdevice connected on endpoint %u.\n", i);
1555 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &fw_ep);
1557 dev_err(ceudev->dev,
1558 "Unable to parse endpoint #%u: %d.\n", i, ret);
1562 /* Setup the ceu subdevice and the async subdevice. */
1563 ceu_sd = v4l2_async_nf_add_fwnode_remote(&ceudev->notifier,
1564 of_fwnode_handle(ep),
1566 if (IS_ERR(ceu_sd)) {
1567 ret = PTR_ERR(ceu_sd);
1570 ceu_sd->mbus_flags = fw_ep.bus.parallel.flags;
1571 ceudev->subdevs[i] = ceu_sd;
1579 v4l2_async_nf_cleanup(&ceudev->notifier);
1585 * struct ceu_data - Platform specific CEU data
1586 * @irq_mask: CETCR mask with all interrupt sources enabled. The mask differs
1587 * between SH4 and RZ platforms.
1593 static const struct ceu_data ceu_data_sh4 = {
1594 .irq_mask = CEU_CETCR_ALL_IRQS_SH4,
1597 #if IS_ENABLED(CONFIG_OF)
1598 static const struct ceu_data ceu_data_rz = {
1599 .irq_mask = CEU_CETCR_ALL_IRQS_RZ,
1602 static const struct of_device_id ceu_of_match[] = {
1603 { .compatible = "renesas,r7s72100-ceu", .data = &ceu_data_rz },
1604 { .compatible = "renesas,r8a7740-ceu", .data = &ceu_data_rz },
1607 MODULE_DEVICE_TABLE(of, ceu_of_match);
1610 static int ceu_probe(struct platform_device *pdev)
1612 struct device *dev = &pdev->dev;
1613 const struct ceu_data *ceu_data;
1614 struct ceu_device *ceudev;
1619 ceudev = kzalloc(sizeof(*ceudev), GFP_KERNEL);
1623 platform_set_drvdata(pdev, ceudev);
1626 INIT_LIST_HEAD(&ceudev->capture);
1627 spin_lock_init(&ceudev->lock);
1628 mutex_init(&ceudev->mlock);
1630 ceudev->base = devm_platform_ioremap_resource(pdev, 0);
1631 if (IS_ERR(ceudev->base)) {
1632 ret = PTR_ERR(ceudev->base);
1633 goto error_free_ceudev;
1636 ret = platform_get_irq(pdev, 0);
1638 goto error_free_ceudev;
1641 ret = devm_request_irq(dev, irq, ceu_irq,
1642 0, dev_name(dev), ceudev);
1644 dev_err(&pdev->dev, "Unable to request CEU interrupt.\n");
1645 goto error_free_ceudev;
1648 pm_runtime_enable(dev);
1650 ret = v4l2_device_register(dev, &ceudev->v4l2_dev);
1652 goto error_pm_disable;
1654 v4l2_async_nf_init(&ceudev->notifier, &ceudev->v4l2_dev);
1656 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
1657 ceu_data = of_device_get_match_data(dev);
1658 num_subdevs = ceu_parse_dt(ceudev);
1659 } else if (dev->platform_data) {
1660 /* Assume SH4 if booting with platform data. */
1661 ceu_data = &ceu_data_sh4;
1662 num_subdevs = ceu_parse_platform_data(ceudev,
1663 dev->platform_data);
1665 num_subdevs = -EINVAL;
1668 if (num_subdevs < 0) {
1670 goto error_v4l2_unregister;
1672 ceudev->irq_mask = ceu_data->irq_mask;
1674 ceudev->notifier.v4l2_dev = &ceudev->v4l2_dev;
1675 ceudev->notifier.ops = &ceu_notify_ops;
1676 ret = v4l2_async_nf_register(&ceudev->notifier);
1680 dev_info(dev, "Renesas Capture Engine Unit %s\n", dev_name(dev));
1685 v4l2_async_nf_cleanup(&ceudev->notifier);
1686 error_v4l2_unregister:
1687 v4l2_device_unregister(&ceudev->v4l2_dev);
1689 pm_runtime_disable(dev);
1696 static void ceu_remove(struct platform_device *pdev)
1698 struct ceu_device *ceudev = platform_get_drvdata(pdev);
1700 pm_runtime_disable(ceudev->dev);
1702 v4l2_async_nf_unregister(&ceudev->notifier);
1704 v4l2_async_nf_cleanup(&ceudev->notifier);
1706 v4l2_device_unregister(&ceudev->v4l2_dev);
1708 video_unregister_device(&ceudev->vdev);
1711 static const struct dev_pm_ops ceu_pm_ops = {
1712 SET_RUNTIME_PM_OPS(ceu_runtime_suspend,
1717 static struct platform_driver ceu_driver = {
1719 .name = DRIVER_NAME,
1721 .of_match_table = of_match_ptr(ceu_of_match),
1724 .remove = ceu_remove,
1727 module_platform_driver(ceu_driver);
1729 MODULE_DESCRIPTION("Renesas CEU camera driver");
1731 MODULE_LICENSE("GPL v2");