1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the Techwell TW9900 multi-standard video decoder.
5 * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd.
10 #include <linux/bitfield.h>
11 #include <linux/clk.h>
12 #include <linux/delay.h>
13 #include <linux/device.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/module.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/regulator/consumer.h>
19 #include <media/media-entity.h>
20 #include <media/v4l2-async.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-subdev.h>
25 #define TW9900_REG_CHIP_ID 0x00
26 #define TW9900_REG_CHIP_STATUS 0x01
27 #define TW9900_REG_CHIP_STATUS_VDLOSS BIT(7)
28 #define TW9900_REG_CHIP_STATUS_HLOCK BIT(6)
29 #define TW9900_REG_OUT_FMT_CTL 0x03
30 #define TW9900_REG_OUT_FMT_CTL_STANDBY 0xA7
31 #define TW9900_REG_OUT_FMT_CTL_STREAMING 0xA0
32 #define TW9900_REG_CKHY_HSDLY 0x04
33 #define TW9900_REG_OUT_CTRL_I 0x05
34 #define TW9900_REG_ANALOG_CTL 0x06
35 #define TW9900_REG_CROP_HI 0x07
36 #define TW9900_REG_VDELAY_LO 0x08
37 #define TW9900_REG_VACTIVE_LO 0x09
38 #define TW9900_REG_HACTIVE_LO 0x0B
39 #define TW9900_REG_CNTRL1 0x0C
40 #define TW9900_REG_BRIGHT_CTL 0x10
41 #define TW9900_REG_CONTRAST_CTL 0x11
42 #define TW9900_REG_VBI_CNTL 0x19
43 #define TW9900_REG_ANAL_CTL_II 0x1A
44 #define TW9900_REG_OUT_CTRL_II 0x1B
45 #define TW9900_REG_STD 0x1C
46 #define TW9900_REG_STD_AUTO_PROGRESS BIT(7)
47 #define TW9900_STDNOW_MASK GENMASK(6, 4)
48 #define TW9900_REG_STDR 0x1D
49 #define TW9900_REG_MISSCNT 0x26
50 #define TW9900_REG_MISC_CTL_II 0x2F
51 #define TW9900_REG_VVBI 0x55
53 #define TW9900_CHIP_ID 0x00
54 #define TW9900_STD_NTSC_M 0
55 #define TW9900_STD_PAL_BDGHI 1
56 #define TW9900_STD_AUTO 7
58 #define TW9900_VIDEO_POLL_TRIES 20
69 const struct regval *reg_list;
74 struct i2c_client *client;
75 struct gpio_desc *reset_gpio;
76 struct regulator *regulator;
78 struct v4l2_subdev subdev;
79 struct v4l2_ctrl_handler hdl;
82 /* Serialize access to hardware and global state. */
86 const struct tw9900_mode *cur_mode;
89 #define to_tw9900(sd) container_of(sd, struct tw9900, subdev)
91 static const struct regval tw9900_init_regs[] = {
92 { TW9900_REG_MISC_CTL_II, 0xE6 },
93 { TW9900_REG_MISSCNT, 0x24 },
94 { TW9900_REG_OUT_FMT_CTL, 0xA7 },
95 { TW9900_REG_ANAL_CTL_II, 0x0A },
96 { TW9900_REG_VDELAY_LO, 0x19 },
97 { TW9900_REG_STD, 0x00 },
98 { TW9900_REG_VACTIVE_LO, 0xF0 },
99 { TW9900_REG_STD, 0x07 },
100 { TW9900_REG_CKHY_HSDLY, 0x00 },
101 { TW9900_REG_ANALOG_CTL, 0x80 },
102 { TW9900_REG_CNTRL1, 0xDC },
103 { TW9900_REG_OUT_CTRL_I, 0x98 },
106 static const struct regval tw9900_pal_regs[] = {
107 { TW9900_REG_STD, 0x01 },
110 static const struct regval tw9900_ntsc_regs[] = {
111 { TW9900_REG_OUT_FMT_CTL, 0xA4 },
112 { TW9900_REG_VDELAY_LO, 0x12 },
113 { TW9900_REG_VACTIVE_LO, 0xF0 },
114 { TW9900_REG_CROP_HI, 0x02 },
115 { TW9900_REG_HACTIVE_LO, 0xD0 },
116 { TW9900_REG_VBI_CNTL, 0x01 },
117 { TW9900_REG_STD, 0x00 },
120 static const struct tw9900_mode supported_modes[] = {
124 .std = V4L2_STD_NTSC,
125 .reg_list = tw9900_ntsc_regs,
126 .n_regs = ARRAY_SIZE(tw9900_ntsc_regs),
132 .reg_list = tw9900_pal_regs,
133 .n_regs = ARRAY_SIZE(tw9900_pal_regs),
137 static int tw9900_write_reg(struct i2c_client *client, u8 reg, u8 val)
141 ret = i2c_smbus_write_byte_data(client, reg, val);
143 dev_err(&client->dev, "write reg error: %d\n", ret);
148 static int tw9900_write_array(struct i2c_client *client,
149 const struct regval *regs, int n_regs)
153 for (i = 0; i < n_regs; i++) {
154 ret = tw9900_write_reg(client, regs[i].addr, regs[i].val);
162 static int tw9900_read_reg(struct i2c_client *client, u8 reg)
166 ret = i2c_smbus_read_byte_data(client, reg);
168 dev_err(&client->dev, "read reg error: %d\n", ret);
173 static void tw9900_fill_fmt(const struct tw9900_mode *mode,
174 struct v4l2_mbus_framefmt *fmt)
176 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
177 fmt->width = mode->width;
178 fmt->height = mode->height;
179 fmt->field = V4L2_FIELD_NONE;
180 fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
181 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
182 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SMPTE170M);
183 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SMPTE170M);
186 static int tw9900_get_fmt(struct v4l2_subdev *sd,
187 struct v4l2_subdev_state *sd_state,
188 struct v4l2_subdev_format *fmt)
190 struct tw9900 *tw9900 = to_tw9900(sd);
191 struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
193 mutex_lock(&tw9900->mutex);
194 tw9900_fill_fmt(tw9900->cur_mode, mbus_fmt);
195 mutex_unlock(&tw9900->mutex);
200 static int tw9900_set_fmt(struct v4l2_subdev *sd,
201 struct v4l2_subdev_state *sd_state,
202 struct v4l2_subdev_format *fmt)
204 struct tw9900 *tw9900 = to_tw9900(sd);
205 struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
207 mutex_lock(&tw9900->mutex);
209 if (tw9900->streaming) {
210 mutex_unlock(&tw9900->mutex);
214 tw9900_fill_fmt(tw9900->cur_mode, mbus_fmt);
216 mutex_unlock(&tw9900->mutex);
221 static int tw9900_enum_mbus_code(struct v4l2_subdev *sd,
222 struct v4l2_subdev_state *sd_state,
223 struct v4l2_subdev_mbus_code_enum *code)
228 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
233 static int tw9900_s_ctrl(struct v4l2_ctrl *ctrl)
235 struct tw9900 *tw9900 = container_of(ctrl->handler, struct tw9900, hdl);
238 if (pm_runtime_suspended(&tw9900->client->dev))
241 /* v4l2_ctrl_lock() locks tw9900->mutex. */
243 case V4L2_CID_BRIGHTNESS:
244 ret = tw9900_write_reg(tw9900->client, TW9900_REG_BRIGHT_CTL,
247 case V4L2_CID_CONTRAST:
248 ret = tw9900_write_reg(tw9900->client, TW9900_REG_CONTRAST_CTL,
259 static int tw9900_s_stream(struct v4l2_subdev *sd, int on)
261 struct tw9900 *tw9900 = to_tw9900(sd);
262 struct i2c_client *client = tw9900->client;
265 mutex_lock(&tw9900->mutex);
267 if (tw9900->streaming == on) {
268 mutex_unlock(&tw9900->mutex);
272 mutex_unlock(&tw9900->mutex);
275 ret = pm_runtime_resume_and_get(&client->dev);
279 mutex_lock(&tw9900->mutex);
281 ret = __v4l2_ctrl_handler_setup(sd->ctrl_handler);
285 ret = tw9900_write_array(tw9900->client,
286 tw9900->cur_mode->reg_list,
287 tw9900->cur_mode->n_regs);
291 ret = tw9900_write_reg(client, TW9900_REG_OUT_FMT_CTL,
292 TW9900_REG_OUT_FMT_CTL_STREAMING);
296 tw9900->streaming = on;
298 mutex_unlock(&tw9900->mutex);
301 mutex_lock(&tw9900->mutex);
303 ret = tw9900_write_reg(client, TW9900_REG_OUT_FMT_CTL,
304 TW9900_REG_OUT_FMT_CTL_STANDBY);
308 tw9900->streaming = on;
310 mutex_unlock(&tw9900->mutex);
312 pm_runtime_put(&client->dev);
318 mutex_unlock(&tw9900->mutex);
319 pm_runtime_put(&client->dev);
324 static int tw9900_subscribe_event(struct v4l2_subdev *sd,
326 struct v4l2_event_subscription *sub)
329 case V4L2_EVENT_SOURCE_CHANGE:
330 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
331 case V4L2_EVENT_CTRL:
332 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
338 static int tw9900_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
340 struct tw9900 *tw9900 = to_tw9900(sd);
341 const struct tw9900_mode *mode = NULL;
344 if (!(std & (V4L2_STD_NTSC | V4L2_STD_PAL)))
347 for (i = 0; i < ARRAY_SIZE(supported_modes); i++)
348 if (supported_modes[i].std & std)
349 mode = &supported_modes[i];
353 mutex_lock(&tw9900->mutex);
354 tw9900->cur_mode = mode;
355 mutex_unlock(&tw9900->mutex);
360 static int tw9900_get_stream_std(struct tw9900 *tw9900,
365 lockdep_assert_held(&tw9900->mutex);
367 ret = tw9900_read_reg(tw9900->client, TW9900_REG_STD);
369 *std = V4L2_STD_UNKNOWN;
373 cur_std = FIELD_GET(TW9900_STDNOW_MASK, ret);
375 case TW9900_STD_NTSC_M:
376 *std = V4L2_STD_NTSC;
378 case TW9900_STD_PAL_BDGHI:
381 case TW9900_STD_AUTO:
382 *std = V4L2_STD_UNKNOWN;
385 *std = V4L2_STD_UNKNOWN;
392 static int tw9900_g_std(struct v4l2_subdev *sd, v4l2_std_id *std)
394 struct tw9900 *tw9900 = to_tw9900(sd);
396 mutex_lock(&tw9900->mutex);
397 *std = tw9900->cur_mode->std;
398 mutex_unlock(&tw9900->mutex);
403 static int tw9900_start_autodetect(struct tw9900 *tw9900)
407 lockdep_assert_held(&tw9900->mutex);
409 ret = tw9900_write_reg(tw9900->client, TW9900_REG_STDR,
410 BIT(TW9900_STD_NTSC_M) |
411 BIT(TW9900_STD_PAL_BDGHI));
415 ret = tw9900_write_reg(tw9900->client, TW9900_REG_STD,
420 ret = tw9900_write_reg(tw9900->client, TW9900_REG_STDR,
421 BIT(TW9900_STD_NTSC_M) |
422 BIT(TW9900_STD_PAL_BDGHI) |
423 BIT(TW9900_STD_AUTO));
428 * Autodetect takes a while to start, and during the starting sequence
429 * the autodetection status is reported as done.
436 static int tw9900_detect_done(struct tw9900 *tw9900, bool *done)
440 lockdep_assert_held(&tw9900->mutex);
442 ret = tw9900_read_reg(tw9900->client, TW9900_REG_STD);
446 *done = !(ret & TW9900_REG_STD_AUTO_PROGRESS);
451 static int tw9900_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
453 struct tw9900 *tw9900 = to_tw9900(sd);
457 mutex_lock(&tw9900->mutex);
459 if (tw9900->streaming) {
460 mutex_unlock(&tw9900->mutex);
464 mutex_unlock(&tw9900->mutex);
466 ret = pm_runtime_resume_and_get(&tw9900->client->dev);
470 mutex_lock(&tw9900->mutex);
472 ret = tw9900_start_autodetect(tw9900);
476 for (i = 0; i < TW9900_VIDEO_POLL_TRIES; i++) {
477 ret = tw9900_detect_done(tw9900, &done);
492 ret = tw9900_get_stream_std(tw9900, std);
495 mutex_unlock(&tw9900->mutex);
496 pm_runtime_put(&tw9900->client->dev);
501 static int tw9900_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *std)
503 *std = V4L2_STD_NTSC | V4L2_STD_PAL;
508 static int tw9900_g_input_status(struct v4l2_subdev *sd, u32 *status)
510 struct tw9900 *tw9900 = to_tw9900(sd);
513 mutex_lock(&tw9900->mutex);
515 if (tw9900->streaming) {
516 mutex_unlock(&tw9900->mutex);
520 mutex_unlock(&tw9900->mutex);
522 *status = V4L2_IN_ST_NO_SIGNAL;
524 ret = pm_runtime_resume_and_get(&tw9900->client->dev);
528 mutex_lock(&tw9900->mutex);
529 ret = tw9900_read_reg(tw9900->client, TW9900_REG_CHIP_STATUS);
530 mutex_unlock(&tw9900->mutex);
532 pm_runtime_put(&tw9900->client->dev);
537 *status = ret & TW9900_REG_CHIP_STATUS_HLOCK ? 0 : V4L2_IN_ST_NO_SIGNAL;
542 static const struct v4l2_subdev_core_ops tw9900_core_ops = {
543 .subscribe_event = tw9900_subscribe_event,
544 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
547 static const struct v4l2_subdev_video_ops tw9900_video_ops = {
548 .s_std = tw9900_s_std,
549 .g_std = tw9900_g_std,
550 .querystd = tw9900_querystd,
551 .g_tvnorms = tw9900_g_tvnorms,
552 .g_input_status = tw9900_g_input_status,
553 .s_stream = tw9900_s_stream,
556 static const struct v4l2_subdev_pad_ops tw9900_pad_ops = {
557 .enum_mbus_code = tw9900_enum_mbus_code,
558 .get_fmt = tw9900_get_fmt,
559 .set_fmt = tw9900_set_fmt,
562 static const struct v4l2_subdev_ops tw9900_subdev_ops = {
563 .core = &tw9900_core_ops,
564 .video = &tw9900_video_ops,
565 .pad = &tw9900_pad_ops,
568 static const struct v4l2_ctrl_ops tw9900_ctrl_ops = {
569 .s_ctrl = tw9900_s_ctrl,
572 static int tw9900_check_id(struct tw9900 *tw9900,
573 struct i2c_client *client)
575 struct device *dev = &tw9900->client->dev;
578 ret = pm_runtime_resume_and_get(&tw9900->client->dev);
582 mutex_lock(&tw9900->mutex);
583 ret = tw9900_read_reg(client, TW9900_CHIP_ID);
584 mutex_unlock(&tw9900->mutex);
586 pm_runtime_put(&tw9900->client->dev);
591 if (ret != TW9900_CHIP_ID) {
592 dev_err(dev, "Unexpected decoder id %#x\n", ret);
599 static int tw9900_runtime_resume(struct device *dev)
601 struct i2c_client *client = to_i2c_client(dev);
602 struct v4l2_subdev *sd = i2c_get_clientdata(client);
603 struct tw9900 *tw9900 = to_tw9900(sd);
606 mutex_lock(&tw9900->mutex);
608 if (tw9900->reset_gpio)
609 gpiod_set_value_cansleep(tw9900->reset_gpio, 1);
611 ret = regulator_enable(tw9900->regulator);
613 mutex_unlock(&tw9900->mutex);
617 usleep_range(50000, 52000);
619 if (tw9900->reset_gpio)
620 gpiod_set_value_cansleep(tw9900->reset_gpio, 0);
622 usleep_range(1000, 2000);
624 ret = tw9900_write_array(tw9900->client, tw9900_init_regs,
625 ARRAY_SIZE(tw9900_init_regs));
627 mutex_unlock(&tw9900->mutex);
629 /* This sleep is needed for the Horizontal Sync PLL to lock. */
635 static int tw9900_runtime_suspend(struct device *dev)
637 struct i2c_client *client = to_i2c_client(dev);
638 struct v4l2_subdev *sd = i2c_get_clientdata(client);
639 struct tw9900 *tw9900 = to_tw9900(sd);
641 mutex_lock(&tw9900->mutex);
643 if (tw9900->reset_gpio)
644 gpiod_set_value_cansleep(tw9900->reset_gpio, 1);
646 regulator_disable(tw9900->regulator);
648 mutex_unlock(&tw9900->mutex);
653 static int tw9900_probe(struct i2c_client *client)
655 struct device *dev = &client->dev;
656 struct v4l2_ctrl_handler *hdl;
657 struct tw9900 *tw9900;
660 tw9900 = devm_kzalloc(dev, sizeof(*tw9900), GFP_KERNEL);
664 tw9900->client = client;
665 tw9900->cur_mode = &supported_modes[0];
667 tw9900->reset_gpio = devm_gpiod_get_optional(dev, "reset",
669 if (IS_ERR(tw9900->reset_gpio))
670 return dev_err_probe(dev, PTR_ERR(tw9900->reset_gpio),
671 "Failed to get reset gpio\n");
673 tw9900->regulator = devm_regulator_get(&tw9900->client->dev, "vdd");
674 if (IS_ERR(tw9900->regulator))
675 return dev_err_probe(dev, PTR_ERR(tw9900->regulator),
676 "Failed to get power regulator\n");
678 v4l2_i2c_subdev_init(&tw9900->subdev, client, &tw9900_subdev_ops);
679 tw9900->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
680 V4L2_SUBDEV_FL_HAS_EVENTS;
682 mutex_init(&tw9900->mutex);
686 ret = v4l2_ctrl_handler_init(hdl, 2);
688 goto err_destory_mutex;
690 hdl->lock = &tw9900->mutex;
692 v4l2_ctrl_new_std(hdl, &tw9900_ctrl_ops, V4L2_CID_BRIGHTNESS,
694 v4l2_ctrl_new_std(hdl, &tw9900_ctrl_ops, V4L2_CID_CONTRAST,
697 tw9900->subdev.ctrl_handler = hdl;
700 goto err_free_handler;
703 tw9900->pad.flags = MEDIA_PAD_FL_SOURCE;
704 tw9900->subdev.entity.function = MEDIA_ENT_F_DV_DECODER;
706 ret = media_entity_pads_init(&tw9900->subdev.entity, 1, &tw9900->pad);
708 goto err_free_handler;
710 pm_runtime_set_suspended(dev);
711 pm_runtime_enable(dev);
713 ret = tw9900_check_id(tw9900, client);
717 ret = v4l2_async_register_subdev(&tw9900->subdev);
719 dev_err(dev, "v4l2 async register subdev failed\n");
726 pm_runtime_disable(dev);
727 media_entity_cleanup(&tw9900->subdev.entity);
729 v4l2_ctrl_handler_free(hdl);
731 mutex_destroy(&tw9900->mutex);
736 static void tw9900_remove(struct i2c_client *client)
738 struct v4l2_subdev *sd = i2c_get_clientdata(client);
739 struct tw9900 *tw9900 = to_tw9900(sd);
741 v4l2_async_unregister_subdev(sd);
742 media_entity_cleanup(&sd->entity);
743 v4l2_ctrl_handler_free(sd->ctrl_handler);
745 pm_runtime_disable(&client->dev);
747 mutex_destroy(&tw9900->mutex);
750 static const struct dev_pm_ops tw9900_pm_ops = {
751 .runtime_suspend = tw9900_runtime_suspend,
752 .runtime_resume = tw9900_runtime_resume,
755 static const struct i2c_device_id tw9900_id[] = {
759 MODULE_DEVICE_TABLE(i2c, tw9900_id);
761 static const struct of_device_id tw9900_of_match[] = {
762 { .compatible = "techwell,tw9900" },
765 MODULE_DEVICE_TABLE(of, tw9900_of_match);
767 static struct i2c_driver tw9900_i2c_driver = {
770 .pm = &tw9900_pm_ops,
771 .of_match_table = tw9900_of_match,
773 .probe = tw9900_probe,
774 .remove = tw9900_remove,
775 .id_table = tw9900_id,
778 module_i2c_driver(tw9900_i2c_driver);
780 MODULE_DESCRIPTION("tw9900 decoder driver");
781 MODULE_LICENSE("GPL");