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[J-linux.git] / drivers / input / misc / iqs626a.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Azoteq IQS626A Capacitive Touch Controller
4  *
5  * Copyright (C) 2020 Jeff LaBundy <[email protected]>
6  *
7  * This driver registers up to 2 input devices: one representing capacitive or
8  * inductive keys as well as Hall-effect switches, and one for a trackpad that
9  * can express various gestures.
10  */
11
12 #include <linux/bits.h>
13 #include <linux/completion.h>
14 #include <linux/delay.h>
15 #include <linux/device.h>
16 #include <linux/err.h>
17 #include <linux/i2c.h>
18 #include <linux/input.h>
19 #include <linux/input/touchscreen.h>
20 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/mod_devicetable.h>
23 #include <linux/module.h>
24 #include <linux/property.h>
25 #include <linux/regmap.h>
26 #include <linux/slab.h>
27
28 #define IQS626_VER_INFO                         0x00
29 #define IQS626_VER_INFO_PROD_NUM                0x51
30
31 #define IQS626_SYS_FLAGS                        0x02
32 #define IQS626_SYS_FLAGS_SHOW_RESET             BIT(15)
33 #define IQS626_SYS_FLAGS_IN_ATI                 BIT(12)
34 #define IQS626_SYS_FLAGS_PWR_MODE_MASK          GENMASK(9, 8)
35 #define IQS626_SYS_FLAGS_PWR_MODE_SHIFT         8
36
37 #define IQS626_HALL_OUTPUT                      0x23
38
39 #define IQS626_SYS_SETTINGS                     0x80
40 #define IQS626_SYS_SETTINGS_CLK_DIV             BIT(15)
41 #define IQS626_SYS_SETTINGS_ULP_AUTO            BIT(14)
42 #define IQS626_SYS_SETTINGS_DIS_AUTO            BIT(13)
43 #define IQS626_SYS_SETTINGS_PWR_MODE_MASK       GENMASK(12, 11)
44 #define IQS626_SYS_SETTINGS_PWR_MODE_SHIFT      11
45 #define IQS626_SYS_SETTINGS_PWR_MODE_MAX        3
46 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MASK     GENMASK(10, 8)
47 #define IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT    8
48 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MAX      7
49 #define IQS626_SYS_SETTINGS_EVENT_MODE          BIT(5)
50 #define IQS626_SYS_SETTINGS_EVENT_MODE_LP       BIT(4)
51 #define IQS626_SYS_SETTINGS_REDO_ATI            BIT(2)
52 #define IQS626_SYS_SETTINGS_ACK_RESET           BIT(0)
53
54 #define IQS626_MISC_A_ATI_BAND_DISABLE          BIT(7)
55 #define IQS626_MISC_A_TPx_LTA_UPDATE_MASK       GENMASK(6, 4)
56 #define IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT      4
57 #define IQS626_MISC_A_TPx_LTA_UPDATE_MAX        7
58 #define IQS626_MISC_A_ATI_LP_ONLY               BIT(3)
59 #define IQS626_MISC_A_GPIO3_SELECT_MASK         GENMASK(2, 0)
60 #define IQS626_MISC_A_GPIO3_SELECT_MAX          7
61
62 #define IQS626_EVENT_MASK_SYS                   BIT(6)
63 #define IQS626_EVENT_MASK_GESTURE               BIT(3)
64 #define IQS626_EVENT_MASK_DEEP                  BIT(2)
65 #define IQS626_EVENT_MASK_TOUCH                 BIT(1)
66 #define IQS626_EVENT_MASK_PROX                  BIT(0)
67
68 #define IQS626_RATE_NP_MS_MAX                   255
69 #define IQS626_RATE_LP_MS_MAX                   255
70 #define IQS626_RATE_ULP_MS_MAX                  4080
71 #define IQS626_TIMEOUT_PWR_MS_MAX               130560
72 #define IQS626_TIMEOUT_LTA_MS_MAX               130560
73
74 #define IQS626_MISC_B_RESEED_UI_SEL_MASK        GENMASK(7, 6)
75 #define IQS626_MISC_B_RESEED_UI_SEL_SHIFT       6
76 #define IQS626_MISC_B_RESEED_UI_SEL_MAX         3
77 #define IQS626_MISC_B_THRESH_EXTEND             BIT(5)
78 #define IQS626_MISC_B_TRACKING_UI_ENABLE        BIT(4)
79 #define IQS626_MISC_B_TPx_SWIPE                 BIT(3)
80 #define IQS626_MISC_B_RESEED_OFFSET             BIT(2)
81 #define IQS626_MISC_B_FILT_STR_TPx              GENMASK(1, 0)
82
83 #define IQS626_THRESH_SWIPE_MAX                 255
84 #define IQS626_TIMEOUT_TAP_MS_MAX               4080
85 #define IQS626_TIMEOUT_SWIPE_MS_MAX             4080
86
87 #define IQS626_CHx_ENG_0_MEAS_CAP_SIZE          BIT(7)
88 #define IQS626_CHx_ENG_0_RX_TERM_VSS            BIT(5)
89 #define IQS626_CHx_ENG_0_LINEARIZE              BIT(4)
90 #define IQS626_CHx_ENG_0_DUAL_DIR               BIT(3)
91 #define IQS626_CHx_ENG_0_FILT_DISABLE           BIT(2)
92 #define IQS626_CHx_ENG_0_ATI_MODE_MASK          GENMASK(1, 0)
93 #define IQS626_CHx_ENG_0_ATI_MODE_MAX           3
94
95 #define IQS626_CHx_ENG_1_CCT_HIGH_1             BIT(7)
96 #define IQS626_CHx_ENG_1_CCT_HIGH_0             BIT(6)
97 #define IQS626_CHx_ENG_1_PROJ_BIAS_MASK         GENMASK(5, 4)
98 #define IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT        4
99 #define IQS626_CHx_ENG_1_PROJ_BIAS_MAX          3
100 #define IQS626_CHx_ENG_1_CCT_ENABLE             BIT(3)
101 #define IQS626_CHx_ENG_1_SENSE_FREQ_MASK        GENMASK(2, 1)
102 #define IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT       1
103 #define IQS626_CHx_ENG_1_SENSE_FREQ_MAX         3
104 #define IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN       BIT(0)
105
106 #define IQS626_CHx_ENG_2_LOCAL_CAP_MASK         GENMASK(7, 6)
107 #define IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT        6
108 #define IQS626_CHx_ENG_2_LOCAL_CAP_MAX          3
109 #define IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE       BIT(5)
110 #define IQS626_CHx_ENG_2_SENSE_MODE_MASK        GENMASK(3, 0)
111 #define IQS626_CHx_ENG_2_SENSE_MODE_MAX         15
112
113 #define IQS626_CHx_ENG_3_TX_FREQ_MASK           GENMASK(5, 4)
114 #define IQS626_CHx_ENG_3_TX_FREQ_SHIFT          4
115 #define IQS626_CHx_ENG_3_TX_FREQ_MAX            3
116 #define IQS626_CHx_ENG_3_INV_LOGIC              BIT(0)
117
118 #define IQS626_CHx_ENG_4_RX_TERM_VREG           BIT(6)
119 #define IQS626_CHx_ENG_4_CCT_LOW_1              BIT(5)
120 #define IQS626_CHx_ENG_4_CCT_LOW_0              BIT(4)
121 #define IQS626_CHx_ENG_4_COMP_DISABLE           BIT(1)
122 #define IQS626_CHx_ENG_4_STATIC_ENABLE          BIT(0)
123
124 #define IQS626_TPx_ATI_BASE_MIN                 45
125 #define IQS626_TPx_ATI_BASE_MAX                 300
126 #define IQS626_CHx_ATI_BASE_MASK                GENMASK(7, 6)
127 #define IQS626_CHx_ATI_BASE_75                  0x00
128 #define IQS626_CHx_ATI_BASE_100                 0x40
129 #define IQS626_CHx_ATI_BASE_150                 0x80
130 #define IQS626_CHx_ATI_BASE_200                 0xC0
131 #define IQS626_CHx_ATI_TARGET_MASK              GENMASK(5, 0)
132 #define IQS626_CHx_ATI_TARGET_MAX               2016
133
134 #define IQS626_CHx_THRESH_MAX                   255
135 #define IQS626_CHx_HYST_DEEP_MASK               GENMASK(7, 4)
136 #define IQS626_CHx_HYST_DEEP_SHIFT              4
137 #define IQS626_CHx_HYST_TOUCH_MASK              GENMASK(3, 0)
138 #define IQS626_CHx_HYST_MAX                     15
139
140 #define IQS626_FILT_STR_NP_TPx_MASK             GENMASK(7, 6)
141 #define IQS626_FILT_STR_NP_TPx_SHIFT            6
142 #define IQS626_FILT_STR_LP_TPx_MASK             GENMASK(5, 4)
143 #define IQS626_FILT_STR_LP_TPx_SHIFT            4
144
145 #define IQS626_FILT_STR_NP_CNT_MASK             GENMASK(7, 6)
146 #define IQS626_FILT_STR_NP_CNT_SHIFT            6
147 #define IQS626_FILT_STR_LP_CNT_MASK             GENMASK(5, 4)
148 #define IQS626_FILT_STR_LP_CNT_SHIFT            4
149 #define IQS626_FILT_STR_NP_LTA_MASK             GENMASK(3, 2)
150 #define IQS626_FILT_STR_NP_LTA_SHIFT            2
151 #define IQS626_FILT_STR_LP_LTA_MASK             GENMASK(1, 0)
152 #define IQS626_FILT_STR_MAX                     3
153
154 #define IQS626_ULP_PROJ_ENABLE                  BIT(4)
155 #define IQS626_GEN_WEIGHT_MAX                   255
156
157 #define IQS626_MAX_REG                          0xFF
158
159 #define IQS626_NUM_CH_TP_3                      9
160 #define IQS626_NUM_CH_TP_2                      6
161 #define IQS626_NUM_CH_GEN                       3
162 #define IQS626_NUM_CRx_TX                       8
163
164 #define IQS626_PWR_MODE_POLL_SLEEP_US           50000
165 #define IQS626_PWR_MODE_POLL_TIMEOUT_US         500000
166
167 #define iqs626_irq_wait()                       usleep_range(350, 400)
168
169 enum iqs626_ch_id {
170         IQS626_CH_ULP_0,
171         IQS626_CH_TP_2,
172         IQS626_CH_TP_3,
173         IQS626_CH_GEN_0,
174         IQS626_CH_GEN_1,
175         IQS626_CH_GEN_2,
176         IQS626_CH_HALL,
177 };
178
179 enum iqs626_rx_inactive {
180         IQS626_RX_INACTIVE_VSS,
181         IQS626_RX_INACTIVE_FLOAT,
182         IQS626_RX_INACTIVE_VREG,
183 };
184
185 enum iqs626_st_offs {
186         IQS626_ST_OFFS_PROX,
187         IQS626_ST_OFFS_DIR,
188         IQS626_ST_OFFS_TOUCH,
189         IQS626_ST_OFFS_DEEP,
190 };
191
192 enum iqs626_th_offs {
193         IQS626_TH_OFFS_PROX,
194         IQS626_TH_OFFS_TOUCH,
195         IQS626_TH_OFFS_DEEP,
196 };
197
198 enum iqs626_event_id {
199         IQS626_EVENT_PROX_DN,
200         IQS626_EVENT_PROX_UP,
201         IQS626_EVENT_TOUCH_DN,
202         IQS626_EVENT_TOUCH_UP,
203         IQS626_EVENT_DEEP_DN,
204         IQS626_EVENT_DEEP_UP,
205 };
206
207 enum iqs626_gesture_id {
208         IQS626_GESTURE_FLICK_X_POS,
209         IQS626_GESTURE_FLICK_X_NEG,
210         IQS626_GESTURE_FLICK_Y_POS,
211         IQS626_GESTURE_FLICK_Y_NEG,
212         IQS626_GESTURE_TAP,
213         IQS626_GESTURE_HOLD,
214         IQS626_NUM_GESTURES,
215 };
216
217 struct iqs626_event_desc {
218         const char *name;
219         enum iqs626_st_offs st_offs;
220         enum iqs626_th_offs th_offs;
221         bool dir_up;
222         u8 mask;
223 };
224
225 static const struct iqs626_event_desc iqs626_events[] = {
226         [IQS626_EVENT_PROX_DN] = {
227                 .name = "event-prox",
228                 .st_offs = IQS626_ST_OFFS_PROX,
229                 .th_offs = IQS626_TH_OFFS_PROX,
230                 .mask = IQS626_EVENT_MASK_PROX,
231         },
232         [IQS626_EVENT_PROX_UP] = {
233                 .name = "event-prox-alt",
234                 .st_offs = IQS626_ST_OFFS_PROX,
235                 .th_offs = IQS626_TH_OFFS_PROX,
236                 .dir_up = true,
237                 .mask = IQS626_EVENT_MASK_PROX,
238         },
239         [IQS626_EVENT_TOUCH_DN] = {
240                 .name = "event-touch",
241                 .st_offs = IQS626_ST_OFFS_TOUCH,
242                 .th_offs = IQS626_TH_OFFS_TOUCH,
243                 .mask = IQS626_EVENT_MASK_TOUCH,
244         },
245         [IQS626_EVENT_TOUCH_UP] = {
246                 .name = "event-touch-alt",
247                 .st_offs = IQS626_ST_OFFS_TOUCH,
248                 .th_offs = IQS626_TH_OFFS_TOUCH,
249                 .dir_up = true,
250                 .mask = IQS626_EVENT_MASK_TOUCH,
251         },
252         [IQS626_EVENT_DEEP_DN] = {
253                 .name = "event-deep",
254                 .st_offs = IQS626_ST_OFFS_DEEP,
255                 .th_offs = IQS626_TH_OFFS_DEEP,
256                 .mask = IQS626_EVENT_MASK_DEEP,
257         },
258         [IQS626_EVENT_DEEP_UP] = {
259                 .name = "event-deep-alt",
260                 .st_offs = IQS626_ST_OFFS_DEEP,
261                 .th_offs = IQS626_TH_OFFS_DEEP,
262                 .dir_up = true,
263                 .mask = IQS626_EVENT_MASK_DEEP,
264         },
265 };
266
267 struct iqs626_ver_info {
268         u8 prod_num;
269         u8 sw_num;
270         u8 hw_num;
271         u8 padding;
272 } __packed;
273
274 struct iqs626_flags {
275         __be16 system;
276         u8 gesture;
277         u8 padding_a;
278         u8 states[4];
279         u8 ref_active;
280         u8 padding_b;
281         u8 comp_min;
282         u8 comp_max;
283         u8 trackpad_x;
284         u8 trackpad_y;
285 } __packed;
286
287 struct iqs626_ch_reg_ulp {
288         u8 thresh[2];
289         u8 hyst;
290         u8 filter;
291         u8 engine[2];
292         u8 ati_target;
293         u8 padding;
294         __be16 ati_comp;
295         u8 rx_enable;
296         u8 tx_enable;
297 } __packed;
298
299 struct iqs626_ch_reg_tp {
300         u8 thresh;
301         u8 ati_base;
302         __be16 ati_comp;
303 } __packed;
304
305 struct iqs626_tp_grp_reg {
306         u8 hyst;
307         u8 ati_target;
308         u8 engine[2];
309         struct iqs626_ch_reg_tp ch_reg_tp[IQS626_NUM_CH_TP_3];
310 } __packed;
311
312 struct iqs626_ch_reg_gen {
313         u8 thresh[3];
314         u8 padding;
315         u8 hyst;
316         u8 ati_target;
317         __be16 ati_comp;
318         u8 engine[5];
319         u8 filter;
320         u8 rx_enable;
321         u8 tx_enable;
322         u8 assoc_select;
323         u8 assoc_weight;
324 } __packed;
325
326 struct iqs626_ch_reg_hall {
327         u8 engine;
328         u8 thresh;
329         u8 hyst;
330         u8 ati_target;
331         __be16 ati_comp;
332 } __packed;
333
334 struct iqs626_sys_reg {
335         __be16 general;
336         u8 misc_a;
337         u8 event_mask;
338         u8 active;
339         u8 reseed;
340         u8 rate_np;
341         u8 rate_lp;
342         u8 rate_ulp;
343         u8 timeout_pwr;
344         u8 timeout_rdy;
345         u8 timeout_lta;
346         u8 misc_b;
347         u8 thresh_swipe;
348         u8 timeout_tap;
349         u8 timeout_swipe;
350         u8 redo_ati;
351         u8 padding;
352         struct iqs626_ch_reg_ulp ch_reg_ulp;
353         struct iqs626_tp_grp_reg tp_grp_reg;
354         struct iqs626_ch_reg_gen ch_reg_gen[IQS626_NUM_CH_GEN];
355         struct iqs626_ch_reg_hall ch_reg_hall;
356 } __packed;
357
358 struct iqs626_channel_desc {
359         const char *name;
360         int num_ch;
361         u8 active;
362         bool events[ARRAY_SIZE(iqs626_events)];
363 };
364
365 static const struct iqs626_channel_desc iqs626_channels[] = {
366         [IQS626_CH_ULP_0] = {
367                 .name = "ulp-0",
368                 .num_ch = 1,
369                 .active = BIT(0),
370                 .events = {
371                         [IQS626_EVENT_PROX_DN] = true,
372                         [IQS626_EVENT_PROX_UP] = true,
373                         [IQS626_EVENT_TOUCH_DN] = true,
374                         [IQS626_EVENT_TOUCH_UP] = true,
375                 },
376         },
377         [IQS626_CH_TP_2] = {
378                 .name = "trackpad-3x2",
379                 .num_ch = IQS626_NUM_CH_TP_2,
380                 .active = BIT(1),
381                 .events = {
382                         [IQS626_EVENT_TOUCH_DN] = true,
383                 },
384         },
385         [IQS626_CH_TP_3] = {
386                 .name = "trackpad-3x3",
387                 .num_ch = IQS626_NUM_CH_TP_3,
388                 .active = BIT(2) | BIT(1),
389                 .events = {
390                         [IQS626_EVENT_TOUCH_DN] = true,
391                 },
392         },
393         [IQS626_CH_GEN_0] = {
394                 .name = "generic-0",
395                 .num_ch = 1,
396                 .active = BIT(4),
397                 .events = {
398                         [IQS626_EVENT_PROX_DN] = true,
399                         [IQS626_EVENT_PROX_UP] = true,
400                         [IQS626_EVENT_TOUCH_DN] = true,
401                         [IQS626_EVENT_TOUCH_UP] = true,
402                         [IQS626_EVENT_DEEP_DN] = true,
403                         [IQS626_EVENT_DEEP_UP] = true,
404                 },
405         },
406         [IQS626_CH_GEN_1] = {
407                 .name = "generic-1",
408                 .num_ch = 1,
409                 .active = BIT(5),
410                 .events = {
411                         [IQS626_EVENT_PROX_DN] = true,
412                         [IQS626_EVENT_PROX_UP] = true,
413                         [IQS626_EVENT_TOUCH_DN] = true,
414                         [IQS626_EVENT_TOUCH_UP] = true,
415                         [IQS626_EVENT_DEEP_DN] = true,
416                         [IQS626_EVENT_DEEP_UP] = true,
417                 },
418         },
419         [IQS626_CH_GEN_2] = {
420                 .name = "generic-2",
421                 .num_ch = 1,
422                 .active = BIT(6),
423                 .events = {
424                         [IQS626_EVENT_PROX_DN] = true,
425                         [IQS626_EVENT_PROX_UP] = true,
426                         [IQS626_EVENT_TOUCH_DN] = true,
427                         [IQS626_EVENT_TOUCH_UP] = true,
428                         [IQS626_EVENT_DEEP_DN] = true,
429                         [IQS626_EVENT_DEEP_UP] = true,
430                 },
431         },
432         [IQS626_CH_HALL] = {
433                 .name = "hall",
434                 .num_ch = 1,
435                 .active = BIT(7),
436                 .events = {
437                         [IQS626_EVENT_TOUCH_DN] = true,
438                         [IQS626_EVENT_TOUCH_UP] = true,
439                 },
440         },
441 };
442
443 struct iqs626_private {
444         struct i2c_client *client;
445         struct regmap *regmap;
446         struct iqs626_sys_reg sys_reg;
447         struct completion ati_done;
448         struct input_dev *keypad;
449         struct input_dev *trackpad;
450         struct touchscreen_properties prop;
451         unsigned int kp_type[ARRAY_SIZE(iqs626_channels)]
452                             [ARRAY_SIZE(iqs626_events)];
453         unsigned int kp_code[ARRAY_SIZE(iqs626_channels)]
454                             [ARRAY_SIZE(iqs626_events)];
455         unsigned int tp_code[IQS626_NUM_GESTURES];
456         unsigned int suspend_mode;
457 };
458
459 static noinline_for_stack int
460 iqs626_parse_events(struct iqs626_private *iqs626,
461                     struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id)
462 {
463         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
464         struct i2c_client *client = iqs626->client;
465         const char *ev_name;
466         u8 *thresh, *hyst;
467         unsigned int val;
468         int i;
469
470         switch (ch_id) {
471         case IQS626_CH_ULP_0:
472                 thresh = sys_reg->ch_reg_ulp.thresh;
473                 hyst = &sys_reg->ch_reg_ulp.hyst;
474                 break;
475
476         case IQS626_CH_TP_2:
477         case IQS626_CH_TP_3:
478                 thresh = &sys_reg->tp_grp_reg.ch_reg_tp[0].thresh;
479                 hyst = &sys_reg->tp_grp_reg.hyst;
480                 break;
481
482         case IQS626_CH_GEN_0:
483         case IQS626_CH_GEN_1:
484         case IQS626_CH_GEN_2:
485                 i = ch_id - IQS626_CH_GEN_0;
486                 thresh = sys_reg->ch_reg_gen[i].thresh;
487                 hyst = &sys_reg->ch_reg_gen[i].hyst;
488                 break;
489
490         case IQS626_CH_HALL:
491                 thresh = &sys_reg->ch_reg_hall.thresh;
492                 hyst = &sys_reg->ch_reg_hall.hyst;
493                 break;
494
495         default:
496                 return -EINVAL;
497         }
498
499         for (i = 0; i < ARRAY_SIZE(iqs626_events); i++) {
500                 if (!iqs626_channels[ch_id].events[i])
501                         continue;
502
503                 struct fwnode_handle *ev_node __free(fwnode_handle) = NULL;
504                 if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) {
505                         /*
506                          * Trackpad touch events are simply described under the
507                          * trackpad child node.
508                          */
509                         ev_node = fwnode_handle_get(ch_node);
510                 } else {
511                         ev_name = iqs626_events[i].name;
512                         ev_node = fwnode_get_named_child_node(ch_node, ev_name);
513                         if (!ev_node)
514                                 continue;
515
516                         if (!fwnode_property_read_u32(ev_node, "linux,code",
517                                                       &val)) {
518                                 iqs626->kp_code[ch_id][i] = val;
519
520                                 if (fwnode_property_read_u32(ev_node,
521                                                              "linux,input-type",
522                                                              &val)) {
523                                         if (ch_id == IQS626_CH_HALL)
524                                                 val = EV_SW;
525                                         else
526                                                 val = EV_KEY;
527                                 }
528
529                                 if (val != EV_KEY && val != EV_SW) {
530                                         dev_err(&client->dev,
531                                                 "Invalid input type: %u\n",
532                                                 val);
533                                         return -EINVAL;
534                                 }
535
536                                 iqs626->kp_type[ch_id][i] = val;
537
538                                 sys_reg->event_mask &= ~iqs626_events[i].mask;
539                         }
540                 }
541
542                 if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) {
543                         if (val > IQS626_CHx_HYST_MAX) {
544                                 dev_err(&client->dev,
545                                         "Invalid %s channel hysteresis: %u\n",
546                                         fwnode_get_name(ch_node), val);
547                                 return -EINVAL;
548                         }
549
550                         if (i == IQS626_EVENT_DEEP_DN ||
551                             i == IQS626_EVENT_DEEP_UP) {
552                                 *hyst &= ~IQS626_CHx_HYST_DEEP_MASK;
553                                 *hyst |= (val << IQS626_CHx_HYST_DEEP_SHIFT);
554                         } else if (i == IQS626_EVENT_TOUCH_DN ||
555                                    i == IQS626_EVENT_TOUCH_UP) {
556                                 *hyst &= ~IQS626_CHx_HYST_TOUCH_MASK;
557                                 *hyst |= val;
558                         }
559                 }
560
561                 if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 &&
562                     !fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) {
563                         if (val > IQS626_CHx_THRESH_MAX) {
564                                 dev_err(&client->dev,
565                                         "Invalid %s channel threshold: %u\n",
566                                         fwnode_get_name(ch_node), val);
567                                 return -EINVAL;
568                         }
569
570                         if (ch_id == IQS626_CH_HALL)
571                                 *thresh = val;
572                         else
573                                 *(thresh + iqs626_events[i].th_offs) = val;
574                 }
575         }
576
577         return 0;
578 }
579
580 static noinline_for_stack int
581 iqs626_parse_ati_target(struct iqs626_private *iqs626,
582                         struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id)
583 {
584         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
585         struct i2c_client *client = iqs626->client;
586         unsigned int val;
587         u8 *ati_target;
588         int i;
589
590         switch (ch_id) {
591         case IQS626_CH_ULP_0:
592                 ati_target = &sys_reg->ch_reg_ulp.ati_target;
593                 break;
594
595         case IQS626_CH_TP_2:
596         case IQS626_CH_TP_3:
597                 ati_target = &sys_reg->tp_grp_reg.ati_target;
598                 break;
599
600         case IQS626_CH_GEN_0:
601         case IQS626_CH_GEN_1:
602         case IQS626_CH_GEN_2:
603                 i = ch_id - IQS626_CH_GEN_0;
604                 ati_target = &sys_reg->ch_reg_gen[i].ati_target;
605                 break;
606
607         case IQS626_CH_HALL:
608                 ati_target = &sys_reg->ch_reg_hall.ati_target;
609                 break;
610
611         default:
612                 return -EINVAL;
613         }
614
615         if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) {
616                 if (val > IQS626_CHx_ATI_TARGET_MAX) {
617                         dev_err(&client->dev,
618                                 "Invalid %s channel ATI target: %u\n",
619                                 fwnode_get_name(ch_node), val);
620                         return -EINVAL;
621                 }
622
623                 *ati_target &= ~IQS626_CHx_ATI_TARGET_MASK;
624                 *ati_target |= (val / 32);
625         }
626
627         if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 &&
628             !fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) {
629                 switch (val) {
630                 case 75:
631                         val = IQS626_CHx_ATI_BASE_75;
632                         break;
633
634                 case 100:
635                         val = IQS626_CHx_ATI_BASE_100;
636                         break;
637
638                 case 150:
639                         val = IQS626_CHx_ATI_BASE_150;
640                         break;
641
642                 case 200:
643                         val = IQS626_CHx_ATI_BASE_200;
644                         break;
645
646                 default:
647                         dev_err(&client->dev,
648                                 "Invalid %s channel ATI base: %u\n",
649                                 fwnode_get_name(ch_node), val);
650                         return -EINVAL;
651                 }
652
653                 *ati_target &= ~IQS626_CHx_ATI_BASE_MASK;
654                 *ati_target |= val;
655         }
656
657         return 0;
658 }
659
660 static int iqs626_parse_pins(struct iqs626_private *iqs626,
661                              struct fwnode_handle *ch_node,
662                              const char *propname, u8 *enable)
663 {
664         struct i2c_client *client = iqs626->client;
665         unsigned int val[IQS626_NUM_CRx_TX];
666         int error, count, i;
667
668         if (!fwnode_property_present(ch_node, propname))
669                 return 0;
670
671         count = fwnode_property_count_u32(ch_node, propname);
672         if (count > IQS626_NUM_CRx_TX) {
673                 dev_err(&client->dev,
674                         "Too many %s channel CRX/TX pins present\n",
675                         fwnode_get_name(ch_node));
676                 return -EINVAL;
677         } else if (count < 0) {
678                 dev_err(&client->dev,
679                         "Failed to count %s channel CRX/TX pins: %d\n",
680                         fwnode_get_name(ch_node), count);
681                 return count;
682         }
683
684         error = fwnode_property_read_u32_array(ch_node, propname, val, count);
685         if (error) {
686                 dev_err(&client->dev,
687                         "Failed to read %s channel CRX/TX pins: %d\n",
688                         fwnode_get_name(ch_node), error);
689                 return error;
690         }
691
692         *enable = 0;
693
694         for (i = 0; i < count; i++) {
695                 if (val[i] >= IQS626_NUM_CRx_TX) {
696                         dev_err(&client->dev,
697                                 "Invalid %s channel CRX/TX pin: %u\n",
698                                 fwnode_get_name(ch_node), val[i]);
699                         return -EINVAL;
700                 }
701
702                 *enable |= BIT(val[i]);
703         }
704
705         return 0;
706 }
707
708 static int iqs626_parse_trackpad(struct iqs626_private *iqs626,
709                                  struct fwnode_handle *ch_node,
710                                  enum iqs626_ch_id ch_id)
711 {
712         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
713         struct i2c_client *client = iqs626->client;
714         u8 *hyst = &sys_reg->tp_grp_reg.hyst;
715         int error, count, i;
716         unsigned int val;
717
718         if (!fwnode_property_read_u32(ch_node, "azoteq,lta-update", &val)) {
719                 if (val > IQS626_MISC_A_TPx_LTA_UPDATE_MAX) {
720                         dev_err(&client->dev,
721                                 "Invalid %s channel update rate: %u\n",
722                                 fwnode_get_name(ch_node), val);
723                         return -EINVAL;
724                 }
725
726                 sys_reg->misc_a &= ~IQS626_MISC_A_TPx_LTA_UPDATE_MASK;
727                 sys_reg->misc_a |= (val << IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT);
728         }
729
730         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-trackpad",
731                                       &val)) {
732                 if (val > IQS626_FILT_STR_MAX) {
733                         dev_err(&client->dev,
734                                 "Invalid %s channel filter strength: %u\n",
735                                 fwnode_get_name(ch_node), val);
736                         return -EINVAL;
737                 }
738
739                 sys_reg->misc_b &= ~IQS626_MISC_B_FILT_STR_TPx;
740                 sys_reg->misc_b |= val;
741         }
742
743         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt",
744                                       &val)) {
745                 if (val > IQS626_FILT_STR_MAX) {
746                         dev_err(&client->dev,
747                                 "Invalid %s channel filter strength: %u\n",
748                                 fwnode_get_name(ch_node), val);
749                         return -EINVAL;
750                 }
751
752                 *hyst &= ~IQS626_FILT_STR_NP_TPx_MASK;
753                 *hyst |= (val << IQS626_FILT_STR_NP_TPx_SHIFT);
754         }
755
756         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt",
757                                       &val)) {
758                 if (val > IQS626_FILT_STR_MAX) {
759                         dev_err(&client->dev,
760                                 "Invalid %s channel filter strength: %u\n",
761                                 fwnode_get_name(ch_node), val);
762                         return -EINVAL;
763                 }
764
765                 *hyst &= ~IQS626_FILT_STR_LP_TPx_MASK;
766                 *hyst |= (val << IQS626_FILT_STR_LP_TPx_SHIFT);
767         }
768
769         for (i = 0; i < iqs626_channels[ch_id].num_ch; i++) {
770                 u8 *ati_base = &sys_reg->tp_grp_reg.ch_reg_tp[i].ati_base;
771                 u8 *thresh = &sys_reg->tp_grp_reg.ch_reg_tp[i].thresh;
772                 char tc_name[10];
773
774                 snprintf(tc_name, sizeof(tc_name), "channel-%d", i);
775
776                 struct fwnode_handle *tc_node __free(fwnode_handle) =
777                                 fwnode_get_named_child_node(ch_node, tc_name);
778                 if (!tc_node)
779                         continue;
780
781                 if (!fwnode_property_read_u32(tc_node, "azoteq,ati-base",
782                                               &val)) {
783                         if (val < IQS626_TPx_ATI_BASE_MIN ||
784                             val > IQS626_TPx_ATI_BASE_MAX) {
785                                 dev_err(&client->dev,
786                                         "Invalid %s %s ATI base: %u\n",
787                                         fwnode_get_name(ch_node), tc_name, val);
788                                 return -EINVAL;
789                         }
790
791                         *ati_base = val - IQS626_TPx_ATI_BASE_MIN;
792                 }
793
794                 if (!fwnode_property_read_u32(tc_node, "azoteq,thresh",
795                                               &val)) {
796                         if (val > IQS626_CHx_THRESH_MAX) {
797                                 dev_err(&client->dev,
798                                         "Invalid %s %s threshold: %u\n",
799                                         fwnode_get_name(ch_node), tc_name, val);
800                                 return -EINVAL;
801                         }
802
803                         *thresh = val;
804                 }
805         }
806
807         if (!fwnode_property_present(ch_node, "linux,keycodes"))
808                 return 0;
809
810         count = fwnode_property_count_u32(ch_node, "linux,keycodes");
811         if (count > IQS626_NUM_GESTURES) {
812                 dev_err(&client->dev, "Too many keycodes present\n");
813                 return -EINVAL;
814         } else if (count < 0) {
815                 dev_err(&client->dev, "Failed to count keycodes: %d\n", count);
816                 return count;
817         }
818
819         error = fwnode_property_read_u32_array(ch_node, "linux,keycodes",
820                                                iqs626->tp_code, count);
821         if (error) {
822                 dev_err(&client->dev, "Failed to read keycodes: %d\n", error);
823                 return error;
824         }
825
826         sys_reg->misc_b &= ~IQS626_MISC_B_TPx_SWIPE;
827         if (fwnode_property_present(ch_node, "azoteq,gesture-swipe"))
828                 sys_reg->misc_b |= IQS626_MISC_B_TPx_SWIPE;
829
830         if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-tap-ms",
831                                       &val)) {
832                 if (val > IQS626_TIMEOUT_TAP_MS_MAX) {
833                         dev_err(&client->dev,
834                                 "Invalid %s channel timeout: %u\n",
835                                 fwnode_get_name(ch_node), val);
836                         return -EINVAL;
837                 }
838
839                 sys_reg->timeout_tap = val / 16;
840         }
841
842         if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-swipe-ms",
843                                       &val)) {
844                 if (val > IQS626_TIMEOUT_SWIPE_MS_MAX) {
845                         dev_err(&client->dev,
846                                 "Invalid %s channel timeout: %u\n",
847                                 fwnode_get_name(ch_node), val);
848                         return -EINVAL;
849                 }
850
851                 sys_reg->timeout_swipe = val / 16;
852         }
853
854         if (!fwnode_property_read_u32(ch_node, "azoteq,thresh-swipe",
855                                       &val)) {
856                 if (val > IQS626_THRESH_SWIPE_MAX) {
857                         dev_err(&client->dev,
858                                 "Invalid %s channel threshold: %u\n",
859                                 fwnode_get_name(ch_node), val);
860                         return -EINVAL;
861                 }
862
863                 sys_reg->thresh_swipe = val;
864         }
865
866         sys_reg->event_mask &= ~IQS626_EVENT_MASK_GESTURE;
867
868         return 0;
869 }
870
871 static noinline_for_stack int
872 iqs626_parse_channel(struct iqs626_private *iqs626,
873                      struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id)
874 {
875         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
876         struct i2c_client *client = iqs626->client;
877         u8 *engine, *filter, *rx_enable, *tx_enable;
878         u8 *assoc_select, *assoc_weight;
879         unsigned int val;
880         int error, i;
881
882         switch (ch_id) {
883         case IQS626_CH_ULP_0:
884                 engine = sys_reg->ch_reg_ulp.engine;
885                 break;
886
887         case IQS626_CH_TP_2:
888         case IQS626_CH_TP_3:
889                 engine = sys_reg->tp_grp_reg.engine;
890                 break;
891
892         case IQS626_CH_GEN_0:
893         case IQS626_CH_GEN_1:
894         case IQS626_CH_GEN_2:
895                 i = ch_id - IQS626_CH_GEN_0;
896                 engine = sys_reg->ch_reg_gen[i].engine;
897                 break;
898
899         case IQS626_CH_HALL:
900                 engine = &sys_reg->ch_reg_hall.engine;
901                 break;
902
903         default:
904                 return -EINVAL;
905         }
906
907         error = iqs626_parse_ati_target(iqs626, ch_node, ch_id);
908         if (error)
909                 return error;
910
911         error = iqs626_parse_events(iqs626, ch_node, ch_id);
912         if (error)
913                 return error;
914
915         if (!fwnode_property_present(ch_node, "azoteq,ati-exclude"))
916                 sys_reg->redo_ati |= iqs626_channels[ch_id].active;
917
918         if (!fwnode_property_present(ch_node, "azoteq,reseed-disable"))
919                 sys_reg->reseed |= iqs626_channels[ch_id].active;
920
921         *engine |= IQS626_CHx_ENG_0_MEAS_CAP_SIZE;
922         if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease"))
923                 *engine &= ~IQS626_CHx_ENG_0_MEAS_CAP_SIZE;
924
925         *engine |= IQS626_CHx_ENG_0_RX_TERM_VSS;
926         if (!fwnode_property_read_u32(ch_node, "azoteq,rx-inactive", &val)) {
927                 switch (val) {
928                 case IQS626_RX_INACTIVE_VSS:
929                         break;
930
931                 case IQS626_RX_INACTIVE_FLOAT:
932                         *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS;
933                         if (ch_id == IQS626_CH_GEN_0 ||
934                             ch_id == IQS626_CH_GEN_1 ||
935                             ch_id == IQS626_CH_GEN_2)
936                                 *(engine + 4) &= ~IQS626_CHx_ENG_4_RX_TERM_VREG;
937                         break;
938
939                 case IQS626_RX_INACTIVE_VREG:
940                         if (ch_id == IQS626_CH_GEN_0 ||
941                             ch_id == IQS626_CH_GEN_1 ||
942                             ch_id == IQS626_CH_GEN_2) {
943                                 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS;
944                                 *(engine + 4) |= IQS626_CHx_ENG_4_RX_TERM_VREG;
945                                 break;
946                         }
947                         fallthrough;
948
949                 default:
950                         dev_err(&client->dev,
951                                 "Invalid %s channel CRX pin termination: %u\n",
952                                 fwnode_get_name(ch_node), val);
953                         return -EINVAL;
954                 }
955         }
956
957         *engine &= ~IQS626_CHx_ENG_0_LINEARIZE;
958         if (fwnode_property_present(ch_node, "azoteq,linearize"))
959                 *engine |= IQS626_CHx_ENG_0_LINEARIZE;
960
961         *engine &= ~IQS626_CHx_ENG_0_DUAL_DIR;
962         if (fwnode_property_present(ch_node, "azoteq,dual-direction"))
963                 *engine |= IQS626_CHx_ENG_0_DUAL_DIR;
964
965         *engine &= ~IQS626_CHx_ENG_0_FILT_DISABLE;
966         if (fwnode_property_present(ch_node, "azoteq,filt-disable"))
967                 *engine |= IQS626_CHx_ENG_0_FILT_DISABLE;
968
969         if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) {
970                 if (val > IQS626_CHx_ENG_0_ATI_MODE_MAX) {
971                         dev_err(&client->dev,
972                                 "Invalid %s channel ATI mode: %u\n",
973                                 fwnode_get_name(ch_node), val);
974                         return -EINVAL;
975                 }
976
977                 *engine &= ~IQS626_CHx_ENG_0_ATI_MODE_MASK;
978                 *engine |= val;
979         }
980
981         if (ch_id == IQS626_CH_HALL)
982                 return 0;
983
984         *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_ENABLE;
985         if (!fwnode_property_read_u32(ch_node, "azoteq,cct-increase",
986                                       &val) && val) {
987                 unsigned int orig_val = val--;
988
989                 /*
990                  * In the case of the generic channels, the charge cycle time
991                  * field doubles in size and straddles two separate registers.
992                  */
993                 if (ch_id == IQS626_CH_GEN_0 ||
994                     ch_id == IQS626_CH_GEN_1 ||
995                     ch_id == IQS626_CH_GEN_2) {
996                         *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_1;
997                         if (val & BIT(1))
998                                 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_1;
999
1000                         *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_0;
1001                         if (val & BIT(0))
1002                                 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_0;
1003
1004                         val >>= 2;
1005                 }
1006
1007                 if (val & ~GENMASK(1, 0)) {
1008                         dev_err(&client->dev,
1009                                 "Invalid %s channel charge cycle time: %u\n",
1010                                 fwnode_get_name(ch_node), orig_val);
1011                         return -EINVAL;
1012                 }
1013
1014                 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_1;
1015                 if (val & BIT(1))
1016                         *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_1;
1017
1018                 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_0;
1019                 if (val & BIT(0))
1020                         *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_0;
1021
1022                 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_ENABLE;
1023         }
1024
1025         if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) {
1026                 if (val > IQS626_CHx_ENG_1_PROJ_BIAS_MAX) {
1027                         dev_err(&client->dev,
1028                                 "Invalid %s channel bias current: %u\n",
1029                                 fwnode_get_name(ch_node), val);
1030                         return -EINVAL;
1031                 }
1032
1033                 *(engine + 1) &= ~IQS626_CHx_ENG_1_PROJ_BIAS_MASK;
1034                 *(engine + 1) |= (val << IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT);
1035         }
1036
1037         if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) {
1038                 if (val > IQS626_CHx_ENG_1_SENSE_FREQ_MAX) {
1039                         dev_err(&client->dev,
1040                                 "Invalid %s channel sensing frequency: %u\n",
1041                                 fwnode_get_name(ch_node), val);
1042                         return -EINVAL;
1043                 }
1044
1045                 *(engine + 1) &= ~IQS626_CHx_ENG_1_SENSE_FREQ_MASK;
1046                 *(engine + 1) |= (val << IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT);
1047         }
1048
1049         *(engine + 1) &= ~IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN;
1050         if (fwnode_property_present(ch_node, "azoteq,ati-band-tighten"))
1051                 *(engine + 1) |= IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN;
1052
1053         if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3)
1054                 return iqs626_parse_trackpad(iqs626, ch_node, ch_id);
1055
1056         if (ch_id == IQS626_CH_ULP_0) {
1057                 sys_reg->ch_reg_ulp.hyst &= ~IQS626_ULP_PROJ_ENABLE;
1058                 if (fwnode_property_present(ch_node, "azoteq,proj-enable"))
1059                         sys_reg->ch_reg_ulp.hyst |= IQS626_ULP_PROJ_ENABLE;
1060
1061                 filter = &sys_reg->ch_reg_ulp.filter;
1062
1063                 rx_enable = &sys_reg->ch_reg_ulp.rx_enable;
1064                 tx_enable = &sys_reg->ch_reg_ulp.tx_enable;
1065         } else {
1066                 i = ch_id - IQS626_CH_GEN_0;
1067                 filter = &sys_reg->ch_reg_gen[i].filter;
1068
1069                 rx_enable = &sys_reg->ch_reg_gen[i].rx_enable;
1070                 tx_enable = &sys_reg->ch_reg_gen[i].tx_enable;
1071         }
1072
1073         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt",
1074                                       &val)) {
1075                 if (val > IQS626_FILT_STR_MAX) {
1076                         dev_err(&client->dev,
1077                                 "Invalid %s channel filter strength: %u\n",
1078                                 fwnode_get_name(ch_node), val);
1079                         return -EINVAL;
1080                 }
1081
1082                 *filter &= ~IQS626_FILT_STR_NP_CNT_MASK;
1083                 *filter |= (val << IQS626_FILT_STR_NP_CNT_SHIFT);
1084         }
1085
1086         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt",
1087                                       &val)) {
1088                 if (val > IQS626_FILT_STR_MAX) {
1089                         dev_err(&client->dev,
1090                                 "Invalid %s channel filter strength: %u\n",
1091                                 fwnode_get_name(ch_node), val);
1092                         return -EINVAL;
1093                 }
1094
1095                 *filter &= ~IQS626_FILT_STR_LP_CNT_MASK;
1096                 *filter |= (val << IQS626_FILT_STR_LP_CNT_SHIFT);
1097         }
1098
1099         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-lta",
1100                                       &val)) {
1101                 if (val > IQS626_FILT_STR_MAX) {
1102                         dev_err(&client->dev,
1103                                 "Invalid %s channel filter strength: %u\n",
1104                                 fwnode_get_name(ch_node), val);
1105                         return -EINVAL;
1106                 }
1107
1108                 *filter &= ~IQS626_FILT_STR_NP_LTA_MASK;
1109                 *filter |= (val << IQS626_FILT_STR_NP_LTA_SHIFT);
1110         }
1111
1112         if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-lta",
1113                                       &val)) {
1114                 if (val > IQS626_FILT_STR_MAX) {
1115                         dev_err(&client->dev,
1116                                 "Invalid %s channel filter strength: %u\n",
1117                                 fwnode_get_name(ch_node), val);
1118                         return -EINVAL;
1119                 }
1120
1121                 *filter &= ~IQS626_FILT_STR_LP_LTA_MASK;
1122                 *filter |= val;
1123         }
1124
1125         error = iqs626_parse_pins(iqs626, ch_node, "azoteq,rx-enable",
1126                                   rx_enable);
1127         if (error)
1128                 return error;
1129
1130         error = iqs626_parse_pins(iqs626, ch_node, "azoteq,tx-enable",
1131                                   tx_enable);
1132         if (error)
1133                 return error;
1134
1135         if (ch_id == IQS626_CH_ULP_0)
1136                 return 0;
1137
1138         *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE;
1139         if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size",
1140                                       &val) && val) {
1141                 unsigned int orig_val = val--;
1142
1143                 if (val > IQS626_CHx_ENG_2_LOCAL_CAP_MAX) {
1144                         dev_err(&client->dev,
1145                                 "Invalid %s channel local cap. size: %u\n",
1146                                 fwnode_get_name(ch_node), orig_val);
1147                         return -EINVAL;
1148                 }
1149
1150                 *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_MASK;
1151                 *(engine + 2) |= (val << IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT);
1152
1153                 *(engine + 2) |= IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE;
1154         }
1155
1156         if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) {
1157                 if (val > IQS626_CHx_ENG_2_SENSE_MODE_MAX) {
1158                         dev_err(&client->dev,
1159                                 "Invalid %s channel sensing mode: %u\n",
1160                                 fwnode_get_name(ch_node), val);
1161                         return -EINVAL;
1162                 }
1163
1164                 *(engine + 2) &= ~IQS626_CHx_ENG_2_SENSE_MODE_MASK;
1165                 *(engine + 2) |= val;
1166         }
1167
1168         if (!fwnode_property_read_u32(ch_node, "azoteq,tx-freq", &val)) {
1169                 if (val > IQS626_CHx_ENG_3_TX_FREQ_MAX) {
1170                         dev_err(&client->dev,
1171                                 "Invalid %s channel excitation frequency: %u\n",
1172                                 fwnode_get_name(ch_node), val);
1173                         return -EINVAL;
1174                 }
1175
1176                 *(engine + 3) &= ~IQS626_CHx_ENG_3_TX_FREQ_MASK;
1177                 *(engine + 3) |= (val << IQS626_CHx_ENG_3_TX_FREQ_SHIFT);
1178         }
1179
1180         *(engine + 3) &= ~IQS626_CHx_ENG_3_INV_LOGIC;
1181         if (fwnode_property_present(ch_node, "azoteq,invert-enable"))
1182                 *(engine + 3) |= IQS626_CHx_ENG_3_INV_LOGIC;
1183
1184         *(engine + 4) &= ~IQS626_CHx_ENG_4_COMP_DISABLE;
1185         if (fwnode_property_present(ch_node, "azoteq,comp-disable"))
1186                 *(engine + 4) |= IQS626_CHx_ENG_4_COMP_DISABLE;
1187
1188         *(engine + 4) &= ~IQS626_CHx_ENG_4_STATIC_ENABLE;
1189         if (fwnode_property_present(ch_node, "azoteq,static-enable"))
1190                 *(engine + 4) |= IQS626_CHx_ENG_4_STATIC_ENABLE;
1191
1192         i = ch_id - IQS626_CH_GEN_0;
1193         assoc_select = &sys_reg->ch_reg_gen[i].assoc_select;
1194         assoc_weight = &sys_reg->ch_reg_gen[i].assoc_weight;
1195
1196         *assoc_select = 0;
1197         if (!fwnode_property_present(ch_node, "azoteq,assoc-select"))
1198                 return 0;
1199
1200         for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1201                 if (fwnode_property_match_string(ch_node, "azoteq,assoc-select",
1202                                                  iqs626_channels[i].name) < 0)
1203                         continue;
1204
1205                 *assoc_select |= iqs626_channels[i].active;
1206         }
1207
1208         if (fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val))
1209                 return 0;
1210
1211         if (val > IQS626_GEN_WEIGHT_MAX) {
1212                 dev_err(&client->dev,
1213                         "Invalid %s channel associated weight: %u\n",
1214                         fwnode_get_name(ch_node), val);
1215                 return -EINVAL;
1216         }
1217
1218         *assoc_weight = val;
1219
1220         return 0;
1221 }
1222
1223 static int iqs626_parse_prop(struct iqs626_private *iqs626)
1224 {
1225         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1226         struct i2c_client *client = iqs626->client;
1227         unsigned int val;
1228         int error, i;
1229         u16 general;
1230
1231         if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode",
1232                                       &val)) {
1233                 if (val > IQS626_SYS_SETTINGS_PWR_MODE_MAX) {
1234                         dev_err(&client->dev, "Invalid suspend mode: %u\n",
1235                                 val);
1236                         return -EINVAL;
1237                 }
1238
1239                 iqs626->suspend_mode = val;
1240         }
1241
1242         error = regmap_raw_read(iqs626->regmap, IQS626_SYS_SETTINGS, sys_reg,
1243                                 sizeof(*sys_reg));
1244         if (error)
1245                 return error;
1246
1247         general = be16_to_cpu(sys_reg->general);
1248         general &= IQS626_SYS_SETTINGS_ULP_UPDATE_MASK;
1249
1250         if (device_property_present(&client->dev, "azoteq,clk-div"))
1251                 general |= IQS626_SYS_SETTINGS_CLK_DIV;
1252
1253         if (device_property_present(&client->dev, "azoteq,ulp-enable"))
1254                 general |= IQS626_SYS_SETTINGS_ULP_AUTO;
1255
1256         if (!device_property_read_u32(&client->dev, "azoteq,ulp-update",
1257                                       &val)) {
1258                 if (val > IQS626_SYS_SETTINGS_ULP_UPDATE_MAX) {
1259                         dev_err(&client->dev, "Invalid update rate: %u\n", val);
1260                         return -EINVAL;
1261                 }
1262
1263                 general &= ~IQS626_SYS_SETTINGS_ULP_UPDATE_MASK;
1264                 general |= (val << IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT);
1265         }
1266
1267         sys_reg->misc_a &= ~IQS626_MISC_A_ATI_BAND_DISABLE;
1268         if (device_property_present(&client->dev, "azoteq,ati-band-disable"))
1269                 sys_reg->misc_a |= IQS626_MISC_A_ATI_BAND_DISABLE;
1270
1271         sys_reg->misc_a &= ~IQS626_MISC_A_ATI_LP_ONLY;
1272         if (device_property_present(&client->dev, "azoteq,ati-lp-only"))
1273                 sys_reg->misc_a |= IQS626_MISC_A_ATI_LP_ONLY;
1274
1275         if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select",
1276                                       &val)) {
1277                 if (val > IQS626_MISC_A_GPIO3_SELECT_MAX) {
1278                         dev_err(&client->dev, "Invalid GPIO3 selection: %u\n",
1279                                 val);
1280                         return -EINVAL;
1281                 }
1282
1283                 sys_reg->misc_a &= ~IQS626_MISC_A_GPIO3_SELECT_MASK;
1284                 sys_reg->misc_a |= val;
1285         }
1286
1287         if (!device_property_read_u32(&client->dev, "azoteq,reseed-select",
1288                                       &val)) {
1289                 if (val > IQS626_MISC_B_RESEED_UI_SEL_MAX) {
1290                         dev_err(&client->dev, "Invalid reseed selection: %u\n",
1291                                 val);
1292                         return -EINVAL;
1293                 }
1294
1295                 sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_UI_SEL_MASK;
1296                 sys_reg->misc_b |= (val << IQS626_MISC_B_RESEED_UI_SEL_SHIFT);
1297         }
1298
1299         sys_reg->misc_b &= ~IQS626_MISC_B_THRESH_EXTEND;
1300         if (device_property_present(&client->dev, "azoteq,thresh-extend"))
1301                 sys_reg->misc_b |= IQS626_MISC_B_THRESH_EXTEND;
1302
1303         sys_reg->misc_b &= ~IQS626_MISC_B_TRACKING_UI_ENABLE;
1304         if (device_property_present(&client->dev, "azoteq,tracking-enable"))
1305                 sys_reg->misc_b |= IQS626_MISC_B_TRACKING_UI_ENABLE;
1306
1307         sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_OFFSET;
1308         if (device_property_present(&client->dev, "azoteq,reseed-offset"))
1309                 sys_reg->misc_b |= IQS626_MISC_B_RESEED_OFFSET;
1310
1311         if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms",
1312                                       &val)) {
1313                 if (val > IQS626_RATE_NP_MS_MAX) {
1314                         dev_err(&client->dev, "Invalid report rate: %u\n", val);
1315                         return -EINVAL;
1316                 }
1317
1318                 sys_reg->rate_np = val;
1319         }
1320
1321         if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms",
1322                                       &val)) {
1323                 if (val > IQS626_RATE_LP_MS_MAX) {
1324                         dev_err(&client->dev, "Invalid report rate: %u\n", val);
1325                         return -EINVAL;
1326                 }
1327
1328                 sys_reg->rate_lp = val;
1329         }
1330
1331         if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms",
1332                                       &val)) {
1333                 if (val > IQS626_RATE_ULP_MS_MAX) {
1334                         dev_err(&client->dev, "Invalid report rate: %u\n", val);
1335                         return -EINVAL;
1336                 }
1337
1338                 sys_reg->rate_ulp = val / 16;
1339         }
1340
1341         if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms",
1342                                       &val)) {
1343                 if (val > IQS626_TIMEOUT_PWR_MS_MAX) {
1344                         dev_err(&client->dev, "Invalid timeout: %u\n", val);
1345                         return -EINVAL;
1346                 }
1347
1348                 sys_reg->timeout_pwr = val / 512;
1349         }
1350
1351         if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms",
1352                                       &val)) {
1353                 if (val > IQS626_TIMEOUT_LTA_MS_MAX) {
1354                         dev_err(&client->dev, "Invalid timeout: %u\n", val);
1355                         return -EINVAL;
1356                 }
1357
1358                 sys_reg->timeout_lta = val / 512;
1359         }
1360
1361         sys_reg->event_mask = ~((u8)IQS626_EVENT_MASK_SYS);
1362         sys_reg->redo_ati = 0;
1363
1364         sys_reg->reseed = 0;
1365         sys_reg->active = 0;
1366
1367         for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1368                 struct fwnode_handle *ch_node __free(fwnode_handle) =
1369                         device_get_named_child_node(&client->dev,
1370                                                     iqs626_channels[i].name);
1371                 if (!ch_node)
1372                         continue;
1373
1374                 error = iqs626_parse_channel(iqs626, ch_node, i);
1375                 if (error)
1376                         return error;
1377
1378                 sys_reg->active |= iqs626_channels[i].active;
1379         }
1380
1381         general |= IQS626_SYS_SETTINGS_EVENT_MODE;
1382
1383         /*
1384          * Enable streaming during normal-power mode if the trackpad is used to
1385          * report raw coordinates instead of gestures. In that case, the device
1386          * returns to event mode during low-power mode.
1387          */
1388         if (sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active &&
1389             sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE)
1390                 general |= IQS626_SYS_SETTINGS_EVENT_MODE_LP;
1391
1392         general |= IQS626_SYS_SETTINGS_REDO_ATI;
1393         general |= IQS626_SYS_SETTINGS_ACK_RESET;
1394
1395         sys_reg->general = cpu_to_be16(general);
1396
1397         error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS,
1398                                  &iqs626->sys_reg, sizeof(iqs626->sys_reg));
1399         if (error)
1400                 return error;
1401
1402         iqs626_irq_wait();
1403
1404         return 0;
1405 }
1406
1407 static int iqs626_input_init(struct iqs626_private *iqs626)
1408 {
1409         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1410         struct i2c_client *client = iqs626->client;
1411         int error, i, j;
1412
1413         iqs626->keypad = devm_input_allocate_device(&client->dev);
1414         if (!iqs626->keypad)
1415                 return -ENOMEM;
1416
1417         iqs626->keypad->keycodemax = ARRAY_SIZE(iqs626->kp_code);
1418         iqs626->keypad->keycode = iqs626->kp_code;
1419         iqs626->keypad->keycodesize = sizeof(**iqs626->kp_code);
1420
1421         iqs626->keypad->name = "iqs626a_keypad";
1422         iqs626->keypad->id.bustype = BUS_I2C;
1423
1424         for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1425                 if (!(sys_reg->active & iqs626_channels[i].active))
1426                         continue;
1427
1428                 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) {
1429                         if (!iqs626->kp_type[i][j])
1430                                 continue;
1431
1432                         input_set_capability(iqs626->keypad,
1433                                              iqs626->kp_type[i][j],
1434                                              iqs626->kp_code[i][j]);
1435                 }
1436         }
1437
1438         if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active))
1439                 return 0;
1440
1441         iqs626->trackpad = devm_input_allocate_device(&client->dev);
1442         if (!iqs626->trackpad)
1443                 return -ENOMEM;
1444
1445         iqs626->trackpad->keycodemax = ARRAY_SIZE(iqs626->tp_code);
1446         iqs626->trackpad->keycode = iqs626->tp_code;
1447         iqs626->trackpad->keycodesize = sizeof(*iqs626->tp_code);
1448
1449         iqs626->trackpad->name = "iqs626a_trackpad";
1450         iqs626->trackpad->id.bustype = BUS_I2C;
1451
1452         /*
1453          * Present the trackpad as a traditional pointing device if no gestures
1454          * have been mapped to a keycode.
1455          */
1456         if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) {
1457                 u8 tp_mask = iqs626_channels[IQS626_CH_TP_3].active;
1458
1459                 input_set_capability(iqs626->trackpad, EV_KEY, BTN_TOUCH);
1460                 input_set_abs_params(iqs626->trackpad, ABS_Y, 0, 255, 0, 0);
1461
1462                 if ((sys_reg->active & tp_mask) == tp_mask)
1463                         input_set_abs_params(iqs626->trackpad,
1464                                              ABS_X, 0, 255, 0, 0);
1465                 else
1466                         input_set_abs_params(iqs626->trackpad,
1467                                              ABS_X, 0, 128, 0, 0);
1468
1469                 touchscreen_parse_properties(iqs626->trackpad, false,
1470                                              &iqs626->prop);
1471         } else {
1472                 for (i = 0; i < IQS626_NUM_GESTURES; i++)
1473                         if (iqs626->tp_code[i] != KEY_RESERVED)
1474                                 input_set_capability(iqs626->trackpad, EV_KEY,
1475                                                      iqs626->tp_code[i]);
1476         }
1477
1478         error = input_register_device(iqs626->trackpad);
1479         if (error)
1480                 dev_err(&client->dev, "Failed to register trackpad: %d\n",
1481                         error);
1482
1483         return error;
1484 }
1485
1486 static int iqs626_report(struct iqs626_private *iqs626)
1487 {
1488         struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg;
1489         struct i2c_client *client = iqs626->client;
1490         struct iqs626_flags flags;
1491         __le16 hall_output;
1492         int error, i, j;
1493         u8 state;
1494         u8 *dir_mask = &flags.states[IQS626_ST_OFFS_DIR];
1495
1496         error = regmap_raw_read(iqs626->regmap, IQS626_SYS_FLAGS, &flags,
1497                                 sizeof(flags));
1498         if (error) {
1499                 dev_err(&client->dev, "Failed to read device status: %d\n",
1500                         error);
1501                 return error;
1502         }
1503
1504         /*
1505          * The device resets itself if its own watchdog bites, which can happen
1506          * in the event of an I2C communication error. In this case, the device
1507          * asserts a SHOW_RESET interrupt and all registers must be restored.
1508          */
1509         if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_SHOW_RESET) {
1510                 dev_err(&client->dev, "Unexpected device reset\n");
1511
1512                 error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS,
1513                                          sys_reg, sizeof(*sys_reg));
1514                 if (error)
1515                         dev_err(&client->dev,
1516                                 "Failed to re-initialize device: %d\n", error);
1517
1518                 return error;
1519         }
1520
1521         if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_IN_ATI)
1522                 return 0;
1523
1524         /*
1525          * Unlike the ULP or generic channels, the Hall channel does not have a
1526          * direction flag. Instead, the direction (i.e. magnet polarity) can be
1527          * derived based on the sign of the 2's complement differential output.
1528          */
1529         if (sys_reg->active & iqs626_channels[IQS626_CH_HALL].active) {
1530                 error = regmap_raw_read(iqs626->regmap, IQS626_HALL_OUTPUT,
1531                                         &hall_output, sizeof(hall_output));
1532                 if (error) {
1533                         dev_err(&client->dev,
1534                                 "Failed to read Hall output: %d\n", error);
1535                         return error;
1536                 }
1537
1538                 *dir_mask &= ~iqs626_channels[IQS626_CH_HALL].active;
1539                 if (le16_to_cpu(hall_output) < 0x8000)
1540                         *dir_mask |= iqs626_channels[IQS626_CH_HALL].active;
1541         }
1542
1543         for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) {
1544                 if (!(sys_reg->active & iqs626_channels[i].active))
1545                         continue;
1546
1547                 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) {
1548                         if (!iqs626->kp_type[i][j])
1549                                 continue;
1550
1551                         state = flags.states[iqs626_events[j].st_offs];
1552                         state &= iqs626_events[j].dir_up ? *dir_mask
1553                                                          : ~(*dir_mask);
1554                         state &= iqs626_channels[i].active;
1555
1556                         input_event(iqs626->keypad, iqs626->kp_type[i][j],
1557                                     iqs626->kp_code[i][j], !!state);
1558                 }
1559         }
1560
1561         input_sync(iqs626->keypad);
1562
1563         /*
1564          * The following completion signals that ATI has finished, any initial
1565          * switch states have been reported and the keypad can be registered.
1566          */
1567         complete_all(&iqs626->ati_done);
1568
1569         if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active))
1570                 return 0;
1571
1572         if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) {
1573                 state = flags.states[IQS626_ST_OFFS_TOUCH];
1574                 state &= iqs626_channels[IQS626_CH_TP_2].active;
1575
1576                 input_report_key(iqs626->trackpad, BTN_TOUCH, state);
1577
1578                 if (state)
1579                         touchscreen_report_pos(iqs626->trackpad, &iqs626->prop,
1580                                                flags.trackpad_x,
1581                                                flags.trackpad_y, false);
1582         } else {
1583                 for (i = 0; i < IQS626_NUM_GESTURES; i++)
1584                         input_report_key(iqs626->trackpad, iqs626->tp_code[i],
1585                                          flags.gesture & BIT(i));
1586
1587                 if (flags.gesture & GENMASK(IQS626_GESTURE_TAP, 0)) {
1588                         input_sync(iqs626->trackpad);
1589
1590                         /*
1591                          * Momentary gestures are followed by a complementary
1592                          * release cycle so as to emulate a full keystroke.
1593                          */
1594                         for (i = 0; i < IQS626_GESTURE_HOLD; i++)
1595                                 input_report_key(iqs626->trackpad,
1596                                                  iqs626->tp_code[i], 0);
1597                 }
1598         }
1599
1600         input_sync(iqs626->trackpad);
1601
1602         return 0;
1603 }
1604
1605 static irqreturn_t iqs626_irq(int irq, void *context)
1606 {
1607         struct iqs626_private *iqs626 = context;
1608
1609         if (iqs626_report(iqs626))
1610                 return IRQ_NONE;
1611
1612         /*
1613          * The device does not deassert its interrupt (RDY) pin until shortly
1614          * after receiving an I2C stop condition; the following delay ensures
1615          * the interrupt handler does not return before this time.
1616          */
1617         iqs626_irq_wait();
1618
1619         return IRQ_HANDLED;
1620 }
1621
1622 static const struct regmap_config iqs626_regmap_config = {
1623         .reg_bits = 8,
1624         .val_bits = 16,
1625         .max_register = IQS626_MAX_REG,
1626 };
1627
1628 static int iqs626_probe(struct i2c_client *client)
1629 {
1630         struct iqs626_ver_info ver_info;
1631         struct iqs626_private *iqs626;
1632         int error;
1633
1634         iqs626 = devm_kzalloc(&client->dev, sizeof(*iqs626), GFP_KERNEL);
1635         if (!iqs626)
1636                 return -ENOMEM;
1637
1638         i2c_set_clientdata(client, iqs626);
1639         iqs626->client = client;
1640
1641         iqs626->regmap = devm_regmap_init_i2c(client, &iqs626_regmap_config);
1642         if (IS_ERR(iqs626->regmap)) {
1643                 error = PTR_ERR(iqs626->regmap);
1644                 dev_err(&client->dev, "Failed to initialize register map: %d\n",
1645                         error);
1646                 return error;
1647         }
1648
1649         init_completion(&iqs626->ati_done);
1650
1651         error = regmap_raw_read(iqs626->regmap, IQS626_VER_INFO, &ver_info,
1652                                 sizeof(ver_info));
1653         if (error)
1654                 return error;
1655
1656         if (ver_info.prod_num != IQS626_VER_INFO_PROD_NUM) {
1657                 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n",
1658                         ver_info.prod_num);
1659                 return -EINVAL;
1660         }
1661
1662         error = iqs626_parse_prop(iqs626);
1663         if (error)
1664                 return error;
1665
1666         error = iqs626_input_init(iqs626);
1667         if (error)
1668                 return error;
1669
1670         error = devm_request_threaded_irq(&client->dev, client->irq,
1671                                           NULL, iqs626_irq, IRQF_ONESHOT,
1672                                           client->name, iqs626);
1673         if (error) {
1674                 dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
1675                 return error;
1676         }
1677
1678         if (!wait_for_completion_timeout(&iqs626->ati_done,
1679                                          msecs_to_jiffies(2000))) {
1680                 dev_err(&client->dev, "Failed to complete ATI\n");
1681                 return -ETIMEDOUT;
1682         }
1683
1684         /*
1685          * The keypad may include one or more switches and is not registered
1686          * until ATI is complete and the initial switch states are read.
1687          */
1688         error = input_register_device(iqs626->keypad);
1689         if (error)
1690                 dev_err(&client->dev, "Failed to register keypad: %d\n", error);
1691
1692         return error;
1693 }
1694
1695 static int iqs626_suspend(struct device *dev)
1696 {
1697         struct iqs626_private *iqs626 = dev_get_drvdata(dev);
1698         struct i2c_client *client = iqs626->client;
1699         unsigned int val;
1700         int error;
1701
1702         if (!iqs626->suspend_mode)
1703                 return 0;
1704
1705         disable_irq(client->irq);
1706
1707         /*
1708          * Automatic power mode switching must be disabled before the device is
1709          * forced into any particular power mode. In this case, the device will
1710          * transition into normal-power mode.
1711          */
1712         error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1713                                    IQS626_SYS_SETTINGS_DIS_AUTO, ~0);
1714         if (error)
1715                 goto err_irq;
1716
1717         /*
1718          * The following check ensures the device has completed its transition
1719          * into normal-power mode before a manual mode switch is performed.
1720          */
1721         error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1722                                         !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK),
1723                                          IQS626_PWR_MODE_POLL_SLEEP_US,
1724                                          IQS626_PWR_MODE_POLL_TIMEOUT_US);
1725         if (error)
1726                 goto err_irq;
1727
1728         error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1729                                    IQS626_SYS_SETTINGS_PWR_MODE_MASK,
1730                                    iqs626->suspend_mode <<
1731                                    IQS626_SYS_SETTINGS_PWR_MODE_SHIFT);
1732         if (error)
1733                 goto err_irq;
1734
1735         /*
1736          * This last check ensures the device has completed its transition into
1737          * the desired power mode to prevent any spurious interrupts from being
1738          * triggered after iqs626_suspend has already returned.
1739          */
1740         error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1741                                          (val & IQS626_SYS_FLAGS_PWR_MODE_MASK)
1742                                          == (iqs626->suspend_mode <<
1743                                              IQS626_SYS_FLAGS_PWR_MODE_SHIFT),
1744                                          IQS626_PWR_MODE_POLL_SLEEP_US,
1745                                          IQS626_PWR_MODE_POLL_TIMEOUT_US);
1746
1747 err_irq:
1748         iqs626_irq_wait();
1749         enable_irq(client->irq);
1750
1751         return error;
1752 }
1753
1754 static int iqs626_resume(struct device *dev)
1755 {
1756         struct iqs626_private *iqs626 = dev_get_drvdata(dev);
1757         struct i2c_client *client = iqs626->client;
1758         unsigned int val;
1759         int error;
1760
1761         if (!iqs626->suspend_mode)
1762                 return 0;
1763
1764         disable_irq(client->irq);
1765
1766         error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1767                                    IQS626_SYS_SETTINGS_PWR_MODE_MASK, 0);
1768         if (error)
1769                 goto err_irq;
1770
1771         /*
1772          * This check ensures the device has returned to normal-power mode
1773          * before automatic power mode switching is re-enabled.
1774          */
1775         error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val,
1776                                         !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK),
1777                                          IQS626_PWR_MODE_POLL_SLEEP_US,
1778                                          IQS626_PWR_MODE_POLL_TIMEOUT_US);
1779         if (error)
1780                 goto err_irq;
1781
1782         error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS,
1783                                    IQS626_SYS_SETTINGS_DIS_AUTO, 0);
1784         if (error)
1785                 goto err_irq;
1786
1787         /*
1788          * This step reports any events that may have been "swallowed" as a
1789          * result of polling PWR_MODE (which automatically acknowledges any
1790          * pending interrupts).
1791          */
1792         error = iqs626_report(iqs626);
1793
1794 err_irq:
1795         iqs626_irq_wait();
1796         enable_irq(client->irq);
1797
1798         return error;
1799 }
1800
1801 static DEFINE_SIMPLE_DEV_PM_OPS(iqs626_pm, iqs626_suspend, iqs626_resume);
1802
1803 static const struct of_device_id iqs626_of_match[] = {
1804         { .compatible = "azoteq,iqs626a" },
1805         { }
1806 };
1807 MODULE_DEVICE_TABLE(of, iqs626_of_match);
1808
1809 static struct i2c_driver iqs626_i2c_driver = {
1810         .driver = {
1811                 .name = "iqs626a",
1812                 .of_match_table = iqs626_of_match,
1813                 .pm = pm_sleep_ptr(&iqs626_pm),
1814         },
1815         .probe = iqs626_probe,
1816 };
1817 module_i2c_driver(iqs626_i2c_driver);
1818
1819 MODULE_AUTHOR("Jeff LaBundy <[email protected]>");
1820 MODULE_DESCRIPTION("Azoteq IQS626A Capacitive Touch Controller");
1821 MODULE_LICENSE("GPL");
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