drivers/iio/adc/ad7280a.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * AD7280A Lithium Ion Battery Monitoring System
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  */
   7
   8 #include <linux/bitfield.h>
   9 #include <linux/bits.h>
  10 #include <linux/cleanup.h>
  11 #include <linux/crc8.h>
  12 #include <linux/delay.h>
  13 #include <linux/device.h>
  14 #include <linux/err.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/mod_devicetable.h>
  19 #include <linux/mutex.h>
  20 #include <linux/slab.h>
  21 #include <linux/sysfs.h>
  22 #include <linux/spi/spi.h>
  23
  24 #include <linux/iio/events.h>
  25 #include <linux/iio/iio.h>
  26
  27 /* Registers */
  28
  29 #define AD7280A_CELL_VOLTAGE_1_REG              0x0  /* D11 to D0, Read only */
  30 #define AD7280A_CELL_VOLTAGE_2_REG              0x1  /* D11 to D0, Read only */
  31 #define AD7280A_CELL_VOLTAGE_3_REG              0x2  /* D11 to D0, Read only */
  32 #define AD7280A_CELL_VOLTAGE_4_REG              0x3  /* D11 to D0, Read only */
  33 #define AD7280A_CELL_VOLTAGE_5_REG              0x4  /* D11 to D0, Read only */
  34 #define AD7280A_CELL_VOLTAGE_6_REG              0x5  /* D11 to D0, Read only */
  35 #define AD7280A_AUX_ADC_1_REG                   0x6  /* D11 to D0, Read only */
  36 #define AD7280A_AUX_ADC_2_REG                   0x7  /* D11 to D0, Read only */
  37 #define AD7280A_AUX_ADC_3_REG                   0x8  /* D11 to D0, Read only */
  38 #define AD7280A_AUX_ADC_4_REG                   0x9  /* D11 to D0, Read only */
  39 #define AD7280A_AUX_ADC_5_REG                   0xA  /* D11 to D0, Read only */
  40 #define AD7280A_AUX_ADC_6_REG                   0xB  /* D11 to D0, Read only */
  41 #define AD7280A_SELF_TEST_REG                   0xC  /* D11 to D0, Read only */
  42
  43 #define AD7280A_CTRL_HB_REG                     0xD  /* D15 to D8, Read/write */
  44 #define   AD7280A_CTRL_HB_CONV_INPUT_MSK                GENMASK(7, 6)
  45 #define     AD7280A_CTRL_HB_CONV_INPUT_ALL                      0
  46 #define     AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_5           1
  47 #define     AD7280A_CTRL_HB_CONV_INPUT_6CELL                    2
  48 #define     AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST                3
  49 #define   AD7280A_CTRL_HB_CONV_RREAD_MSK                GENMASK(5, 4)
  50 #define     AD7280A_CTRL_HB_CONV_RREAD_ALL                      0
  51 #define     AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_5           1
  52 #define     AD7280A_CTRL_HB_CONV_RREAD_6CELL                    2
  53 #define     AD7280A_CTRL_HB_CONV_RREAD_NO                       3
  54 #define   AD7280A_CTRL_HB_CONV_START_MSK                BIT(3)
  55 #define     AD7280A_CTRL_HB_CONV_START_CNVST                    0
  56 #define     AD7280A_CTRL_HB_CONV_START_CS                       1
  57 #define   AD7280A_CTRL_HB_CONV_AVG_MSK                  GENMASK(2, 1)
  58 #define     AD7280A_CTRL_HB_CONV_AVG_DIS                        0
  59 #define     AD7280A_CTRL_HB_CONV_AVG_2                          1
  60 #define     AD7280A_CTRL_HB_CONV_AVG_4                          2
  61 #define     AD7280A_CTRL_HB_CONV_AVG_8                          3
  62 #define   AD7280A_CTRL_HB_PWRDN_SW                      BIT(0)
  63
  64 #define AD7280A_CTRL_LB_REG                     0xE  /* D7 to D0, Read/write */
  65 #define   AD7280A_CTRL_LB_SWRST_MSK                     BIT(7)
  66 #define   AD7280A_CTRL_LB_ACQ_TIME_MSK                  GENMASK(6, 5)
  67 #define     AD7280A_CTRL_LB_ACQ_TIME_400ns                      0
  68 #define     AD7280A_CTRL_LB_ACQ_TIME_800ns                      1
  69 #define     AD7280A_CTRL_LB_ACQ_TIME_1200ns                     2
  70 #define     AD7280A_CTRL_LB_ACQ_TIME_1600ns                     3
  71 #define   AD7280A_CTRL_LB_MUST_SET                      BIT(4)
  72 #define   AD7280A_CTRL_LB_THERMISTOR_MSK                BIT(3)
  73 #define   AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK             BIT(2)
  74 #define   AD7280A_CTRL_LB_INC_DEV_ADDR_MSK              BIT(1)
  75 #define   AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK            BIT(0)
  76
  77 #define AD7280A_CELL_OVERVOLTAGE_REG            0xF  /* D7 to D0, Read/write */
  78 #define AD7280A_CELL_UNDERVOLTAGE_REG           0x10 /* D7 to D0, Read/write */
  79 #define AD7280A_AUX_ADC_OVERVOLTAGE_REG         0x11 /* D7 to D0, Read/write */
  80 #define AD7280A_AUX_ADC_UNDERVOLTAGE_REG        0x12 /* D7 to D0, Read/write */
  81
  82 #define AD7280A_ALERT_REG                       0x13 /* D7 to D0, Read/write */
  83 #define   AD7280A_ALERT_REMOVE_MSK                      GENMASK(3, 0)
  84 #define     AD7280A_ALERT_REMOVE_AUX5                   BIT(0)
  85 #define     AD7280A_ALERT_REMOVE_AUX3_AUX5              BIT(1)
  86 #define     AD7280A_ALERT_REMOVE_VIN5                   BIT(2)
  87 #define     AD7280A_ALERT_REMOVE_VIN4_VIN5              BIT(3)
  88 #define   AD7280A_ALERT_GEN_STATIC_HIGH                 BIT(6)
  89 #define   AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN            (BIT(7) | BIT(6))
  90
  91 #define AD7280A_CELL_BALANCE_REG                0x14 /* D7 to D0, Read/write */
  92 #define  AD7280A_CELL_BALANCE_CHAN_BITMAP_MSK           GENMASK(7, 2)
  93 #define AD7280A_CB1_TIMER_REG                   0x15 /* D7 to D0, Read/write */
  94 #define  AD7280A_CB_TIMER_VAL_MSK                       GENMASK(7, 3)
  95 #define AD7280A_CB2_TIMER_REG                   0x16 /* D7 to D0, Read/write */
  96 #define AD7280A_CB3_TIMER_REG                   0x17 /* D7 to D0, Read/write */
  97 #define AD7280A_CB4_TIMER_REG                   0x18 /* D7 to D0, Read/write */
  98 #define AD7280A_CB5_TIMER_REG                   0x19 /* D7 to D0, Read/write */
  99 #define AD7280A_CB6_TIMER_REG                   0x1A /* D7 to D0, Read/write */
 100 #define AD7280A_PD_TIMER_REG                    0x1B /* D7 to D0, Read/write */
 101 #define AD7280A_READ_REG                        0x1C /* D7 to D0, Read/write */
 102 #define   AD7280A_READ_ADDR_MSK                         GENMASK(7, 2)
 103 #define AD7280A_CNVST_CTRL_REG                  0x1D /* D7 to D0, Read/write */
 104
 105 /* Transfer fields */
 106 #define AD7280A_TRANS_WRITE_DEVADDR_MSK         GENMASK(31, 27)
 107 #define AD7280A_TRANS_WRITE_ADDR_MSK            GENMASK(26, 21)
 108 #define AD7280A_TRANS_WRITE_VAL_MSK             GENMASK(20, 13)
 109 #define AD7280A_TRANS_WRITE_ALL_MSK             BIT(12)
 110 #define AD7280A_TRANS_WRITE_CRC_MSK             GENMASK(10, 3)
 111 #define AD7280A_TRANS_WRITE_RES_PATTERN         0x2
 112
 113 /* Layouts differ for channel vs other registers */
 114 #define AD7280A_TRANS_READ_DEVADDR_MSK          GENMASK(31, 27)
 115 #define AD7280A_TRANS_READ_CONV_CHANADDR_MSK    GENMASK(26, 23)
 116 #define AD7280A_TRANS_READ_CONV_DATA_MSK        GENMASK(22, 11)
 117 #define AD7280A_TRANS_READ_REG_REGADDR_MSK      GENMASK(26, 21)
 118 #define AD7280A_TRANS_READ_REG_DATA_MSK         GENMASK(20, 13)
 119 #define AD7280A_TRANS_READ_WRITE_ACK_MSK        BIT(10)
 120 #define AD7280A_TRANS_READ_CRC_MSK              GENMASK(9, 2)
 121
 122 /* Magic value used to indicate this special case */
 123 #define AD7280A_ALL_CELLS                               (0xAD << 16)
 124
 125 #define AD7280A_MAX_SPI_CLK_HZ          700000 /* < 1MHz */
 126 #define AD7280A_MAX_CHAIN               8
 127 #define AD7280A_CELLS_PER_DEV           6
 128 #define AD7280A_BITS                    12
 129 #define AD7280A_NUM_CH                  (AD7280A_AUX_ADC_6_REG - \
 130                                         AD7280A_CELL_VOLTAGE_1_REG + 1)
 131
 132 #define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \
 133                                              (c))
 134 #define AD7280A_CALC_TEMP_CHAN_NUM(d, c)    (((d) * AD7280A_CELLS_PER_DEV) + \
 135                                              (c) - AD7280A_CELLS_PER_DEV)
 136
 137 #define AD7280A_DEVADDR_MASTER          0
 138 #define AD7280A_DEVADDR_ALL             0x1F
 139
 140 static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8};
 141 static const unsigned short ad7280a_t_acq_ns[4] = {470, 1030, 1510, 1945};
 142
 143 /* 5-bit device address is sent LSB first */
 144 static unsigned int ad7280a_devaddr(unsigned int addr)
 145 {
 146         return ((addr & 0x1) << 4) |
 147                ((addr & 0x2) << 2) |
 148                (addr & 0x4) |
 149                ((addr & 0x8) >> 2) |
 150                ((addr & 0x10) >> 4);
 151 }
 152
 153 /*
 154  * During a read a valid write is mandatory.
 155  * So writing to the highest available address (Address 0x1F) and setting the
 156  * address all parts bit to 0 is recommended.
 157  * So the TXVAL is AD7280A_DEVADDR_ALL + CRC
 158  */
 159 #define AD7280A_READ_TXVAL      0xF800030A
 160
 161 /*
 162  * AD7280 CRC
 163  *
 164  * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F
 165  */
 166 #define POLYNOM         0x2F
 167
 168 struct ad7280_state {
 169         struct spi_device               *spi;
 170         struct iio_chan_spec            *channels;
 171         unsigned int                    chain_last_alert_ignore;
 172         bool                            thermistor_term_en;
 173         int                             slave_num;
 174         int                             scan_cnt;
 175         int                             readback_delay_us;
 176         unsigned char                   crc_tab[CRC8_TABLE_SIZE];
 177         u8                              oversampling_ratio;
 178         u8                              acquisition_time;
 179         unsigned char                   ctrl_lb;
 180         unsigned char                   cell_threshhigh;
 181         unsigned char                   cell_threshlow;
 182         unsigned char                   aux_threshhigh;
 183         unsigned char                   aux_threshlow;
 184         unsigned char                   cb_mask[AD7280A_MAX_CHAIN];
 185         struct mutex                    lock; /* protect sensor state */
 186
 187         __be32                          tx __aligned(IIO_DMA_MINALIGN);
 188         __be32                          rx;
 189 };
 190
 191 static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val)
 192 {
 193         unsigned char crc;
 194
 195         crc = crc_tab[val >> 16 & 0xFF];
 196         crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
 197
 198         return crc ^ (val & 0xFF);
 199 }
 200
 201 static int ad7280_check_crc(struct ad7280_state *st, unsigned int val)
 202 {
 203         unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
 204
 205         if (crc != ((val >> 2) & 0xFF))
 206                 return -EIO;
 207
 208         return 0;
 209 }
 210
 211 /*
 212  * After initiating a conversion sequence we need to wait until the conversion
 213  * is done. The delay is typically in the range of 15..30us however depending on
 214  * the number of devices in the daisy chain, the number of averages taken,
 215  * conversion delays and acquisition time options it may take up to 250us, in
 216  * this case we better sleep instead of busy wait.
 217  */
 218
 219 static void ad7280_delay(struct ad7280_state *st)
 220 {
 221         if (st->readback_delay_us < 50)
 222                 udelay(st->readback_delay_us);
 223         else
 224                 usleep_range(250, 500);
 225 }
 226
 227 static int __ad7280_read32(struct ad7280_state *st, unsigned int *val)
 228 {
 229         int ret;
 230         struct spi_transfer t = {
 231                 .tx_buf = &st->tx,
 232                 .rx_buf = &st->rx,
 233                 .len = sizeof(st->tx),
 234         };
 235
 236         st->tx = cpu_to_be32(AD7280A_READ_TXVAL);
 237
 238         ret = spi_sync_transfer(st->spi, &t, 1);
 239         if (ret)
 240                 return ret;
 241
 242         *val = be32_to_cpu(st->rx);
 243
 244         return 0;
 245 }
 246
 247 static int ad7280_write(struct ad7280_state *st, unsigned int devaddr,
 248                         unsigned int addr, bool all, unsigned int val)
 249 {
 250         unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) |
 251                 FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) |
 252                 FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) |
 253                 FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all);
 254
 255         reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK,
 256                         ad7280_calc_crc8(st->crc_tab, reg >> 11));
 257         /* Reserved b010 pattern not included crc calc */
 258         reg |= AD7280A_TRANS_WRITE_RES_PATTERN;
 259
 260         st->tx = cpu_to_be32(reg);
 261
 262         return spi_write(st->spi, &st->tx, sizeof(st->tx));
 263 }
 264
 265 static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr,
 266                            unsigned int addr)
 267 {
 268         int ret;
 269         unsigned int tmp;
 270
 271         /* turns off the read operation on all parts */
 272         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 273                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 274                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 275                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 276                                       AD7280A_CTRL_HB_CONV_RREAD_NO) |
 277                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 278                                       st->oversampling_ratio));
 279         if (ret)
 280                 return ret;
 281
 282         /* turns on the read operation on the addressed part */
 283         ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0,
 284                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 285                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 286                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 287                                       AD7280A_CTRL_HB_CONV_RREAD_ALL) |
 288                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 289                                       st->oversampling_ratio));
 290         if (ret)
 291                 return ret;
 292
 293         /* Set register address on the part to be read from */
 294         ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0,
 295                            FIELD_PREP(AD7280A_READ_ADDR_MSK, addr));
 296         if (ret)
 297                 return ret;
 298
 299         ret = __ad7280_read32(st, &tmp);
 300         if (ret)
 301                 return ret;
 302
 303         if (ad7280_check_crc(st, tmp))
 304                 return -EIO;
 305
 306         if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) ||
 307             (FIELD_GET(AD7280A_TRANS_READ_REG_REGADDR_MSK, tmp) != addr))
 308                 return -EFAULT;
 309
 310         return FIELD_GET(AD7280A_TRANS_READ_REG_DATA_MSK, tmp);
 311 }
 312
 313 static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr,
 314                                unsigned int addr)
 315 {
 316         int ret;
 317         unsigned int tmp;
 318
 319         ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0,
 320                            FIELD_PREP(AD7280A_READ_ADDR_MSK, addr));
 321         if (ret)
 322                 return ret;
 323
 324         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 325                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 326                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 327                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 328                                       AD7280A_CTRL_HB_CONV_RREAD_NO) |
 329                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 330                                       st->oversampling_ratio));
 331         if (ret)
 332                 return ret;
 333
 334         ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0,
 335                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 336                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 337                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 338                                       AD7280A_CTRL_HB_CONV_RREAD_ALL) |
 339                            FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK,
 340                                       AD7280A_CTRL_HB_CONV_START_CS) |
 341                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 342                                       st->oversampling_ratio));
 343         if (ret)
 344                 return ret;
 345
 346         ad7280_delay(st);
 347
 348         ret = __ad7280_read32(st, &tmp);
 349         if (ret)
 350                 return ret;
 351
 352         if (ad7280_check_crc(st, tmp))
 353                 return -EIO;
 354
 355         if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) ||
 356             (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) != addr))
 357                 return -EFAULT;
 358
 359         return FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp);
 360 }
 361
 362 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt,
 363                                     unsigned int *array)
 364 {
 365         int i, ret;
 366         unsigned int tmp, sum = 0;
 367
 368         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1,
 369                            AD7280A_CELL_VOLTAGE_1_REG << 2);
 370         if (ret)
 371                 return ret;
 372
 373         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 374                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 375                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 376                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 377                                       AD7280A_CTRL_HB_CONV_RREAD_ALL) |
 378                            FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK,
 379                                       AD7280A_CTRL_HB_CONV_START_CS) |
 380                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 381                                       st->oversampling_ratio));
 382         if (ret)
 383                 return ret;
 384
 385         ad7280_delay(st);
 386
 387         for (i = 0; i < cnt; i++) {
 388                 ret = __ad7280_read32(st, &tmp);
 389                 if (ret)
 390                         return ret;
 391
 392                 if (ad7280_check_crc(st, tmp))
 393                         return -EIO;
 394
 395                 if (array)
 396                         array[i] = tmp;
 397                 /* only sum cell voltages */
 398                 if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) <=
 399                     AD7280A_CELL_VOLTAGE_6_REG)
 400                         sum += FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp);
 401         }
 402
 403         return sum;
 404 }
 405
 406 static void ad7280_sw_power_down(void *data)
 407 {
 408         struct ad7280_state *st = data;
 409
 410         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 411                      AD7280A_CTRL_HB_PWRDN_SW |
 412                      FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio));
 413 }
 414
 415 static int ad7280_chain_setup(struct ad7280_state *st)
 416 {
 417         unsigned int val, n;
 418         int ret;
 419
 420         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1,
 421                            FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) |
 422                            FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) |
 423                            AD7280A_CTRL_LB_MUST_SET |
 424                            FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) |
 425                            st->ctrl_lb);
 426         if (ret)
 427                 return ret;
 428
 429         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1,
 430                            FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) |
 431                            FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) |
 432                            AD7280A_CTRL_LB_MUST_SET |
 433                            FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) |
 434                            st->ctrl_lb);
 435         if (ret)
 436                 goto error_power_down;
 437
 438         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1,
 439                            FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG));
 440         if (ret)
 441                 goto error_power_down;
 442
 443         for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
 444                 ret = __ad7280_read32(st, &val);
 445                 if (ret)
 446                         goto error_power_down;
 447
 448                 if (val == 0)
 449                         return n - 1;
 450
 451                 if (ad7280_check_crc(st, val)) {
 452                         ret = -EIO;
 453                         goto error_power_down;
 454                 }
 455
 456                 if (n != ad7280a_devaddr(FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, val))) {
 457                         ret = -EIO;
 458                         goto error_power_down;
 459                 }
 460         }
 461         ret = -EFAULT;
 462
 463 error_power_down:
 464         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 465                      AD7280A_CTRL_HB_PWRDN_SW |
 466                      FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio));
 467
 468         return ret;
 469 }
 470
 471 static ssize_t ad7280_show_balance_sw(struct iio_dev *indio_dev,
 472                                       uintptr_t private,
 473                                       const struct iio_chan_spec *chan, char *buf)
 474 {
 475         struct ad7280_state *st = iio_priv(indio_dev);
 476
 477         return sysfs_emit(buf, "%d\n",
 478                           !!(st->cb_mask[chan->address >> 8] &
 479                              BIT(chan->address & 0xFF)));
 480 }
 481
 482 static ssize_t ad7280_store_balance_sw(struct iio_dev *indio_dev,
 483                                        uintptr_t private,
 484                                        const struct iio_chan_spec *chan,
 485                                        const char *buf, size_t len)
 486 {
 487         struct ad7280_state *st = iio_priv(indio_dev);
 488         unsigned int devaddr, ch;
 489         bool readin;
 490         int ret;
 491
 492         ret = kstrtobool(buf, &readin);
 493         if (ret)
 494                 return ret;
 495
 496         devaddr = chan->address >> 8;
 497         ch = chan->address & 0xFF;
 498
 499         mutex_lock(&st->lock);
 500         if (readin)
 501                 st->cb_mask[devaddr] |= BIT(ch);
 502         else
 503                 st->cb_mask[devaddr] &= ~BIT(ch);
 504
 505         ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, 0,
 506                            FIELD_PREP(AD7280A_CELL_BALANCE_CHAN_BITMAP_MSK,
 507                                       st->cb_mask[devaddr]));
 508         mutex_unlock(&st->lock);
 509
 510         return ret ? ret : len;
 511 }
 512
 513 static ssize_t ad7280_show_balance_timer(struct iio_dev *indio_dev,
 514                                          uintptr_t private,
 515                                          const struct iio_chan_spec *chan,
 516                                          char *buf)
 517 {
 518         struct ad7280_state *st = iio_priv(indio_dev);
 519         unsigned int msecs;
 520         int ret;
 521
 522         mutex_lock(&st->lock);
 523         ret = ad7280_read_reg(st, chan->address >> 8,
 524                               (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG);
 525         mutex_unlock(&st->lock);
 526
 527         if (ret < 0)
 528                 return ret;
 529
 530         msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500;
 531
 532         return sysfs_emit(buf, "%u.%u\n", msecs / 1000, msecs % 1000);
 533 }
 534
 535 static ssize_t ad7280_store_balance_timer(struct iio_dev *indio_dev,
 536                                           uintptr_t private,
 537                                           const struct iio_chan_spec *chan,
 538                                           const char *buf, size_t len)
 539 {
 540         struct ad7280_state *st = iio_priv(indio_dev);
 541         int val, val2;
 542         int ret;
 543
 544         ret = iio_str_to_fixpoint(buf, 1000, &val, &val2);
 545         if (ret)
 546                 return ret;
 547
 548         val = val * 1000 + val2;
 549         val /= 71500;
 550
 551         if (val > 31)
 552                 return -EINVAL;
 553
 554         mutex_lock(&st->lock);
 555         ret = ad7280_write(st, chan->address >> 8,
 556                            (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG, 0,
 557                            FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val));
 558         mutex_unlock(&st->lock);
 559
 560         return ret ? ret : len;
 561 }
 562
 563 static const struct iio_chan_spec_ext_info ad7280_cell_ext_info[] = {
 564         {
 565                 .name = "balance_switch_en",
 566                 .read = ad7280_show_balance_sw,
 567                 .write = ad7280_store_balance_sw,
 568                 .shared = IIO_SEPARATE,
 569         }, {
 570                 .name = "balance_switch_timer",
 571                 .read = ad7280_show_balance_timer,
 572                 .write = ad7280_store_balance_timer,
 573                 .shared = IIO_SEPARATE,
 574         },
 575         {}
 576 };
 577
 578 static const struct iio_event_spec ad7280_events[] = {
 579         {
 580                 .type = IIO_EV_TYPE_THRESH,
 581                 .dir = IIO_EV_DIR_RISING,
 582                 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE),
 583         }, {
 584                 .type = IIO_EV_TYPE_THRESH,
 585                 .dir = IIO_EV_DIR_FALLING,
 586                 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE),
 587         },
 588 };
 589
 590 static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i,
 591                                         bool irq_present)
 592 {
 593         chan->type = IIO_VOLTAGE;
 594         chan->differential = 1;
 595         chan->channel = i;
 596         chan->channel2 = chan->channel + 1;
 597         if (irq_present) {
 598                 chan->event_spec = ad7280_events;
 599                 chan->num_event_specs = ARRAY_SIZE(ad7280_events);
 600         }
 601         chan->ext_info = ad7280_cell_ext_info;
 602 }
 603
 604 static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i,
 605                                      bool irq_present)
 606 {
 607         chan->type = IIO_TEMP;
 608         chan->channel = i;
 609         if (irq_present) {
 610                 chan->event_spec = ad7280_events;
 611                 chan->num_event_specs = ARRAY_SIZE(ad7280_events);
 612         }
 613 }
 614
 615 static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr,
 616                                       int cnt)
 617 {
 618         chan->indexed = 1;
 619         chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 620         chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 621         chan->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
 622         chan->address = addr;
 623         chan->scan_index = cnt;
 624         chan->scan_type.sign = 'u';
 625         chan->scan_type.realbits = 12;
 626         chan->scan_type.storagebits = 32;
 627 }
 628
 629 static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan,
 630                                               int cnt, int dev)
 631 {
 632         chan->type = IIO_VOLTAGE;
 633         chan->differential = 1;
 634         chan->channel = 0;
 635         chan->channel2 = dev * AD7280A_CELLS_PER_DEV;
 636         chan->address = AD7280A_ALL_CELLS;
 637         chan->indexed = 1;
 638         chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 639         chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 640         chan->scan_index = cnt;
 641         chan->scan_type.sign = 'u';
 642         chan->scan_type.realbits = 32;
 643         chan->scan_type.storagebits = 32;
 644 }
 645
 646 static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt,
 647                                      bool irq_present)
 648 {
 649         int addr, ch, i;
 650         struct iio_chan_spec *chan;
 651
 652         for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_AUX_ADC_6_REG; ch++) {
 653                 chan = &st->channels[*cnt];
 654
 655                 if (ch < AD7280A_AUX_ADC_1_REG) {
 656                         i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch);
 657                         ad7280_voltage_channel_init(chan, i, irq_present);
 658                 } else {
 659                         i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch);
 660                         ad7280_temp_channel_init(chan, i, irq_present);
 661                 }
 662
 663                 addr = ad7280a_devaddr(dev) << 8 | ch;
 664                 ad7280_common_fields_init(chan, addr, *cnt);
 665
 666                 (*cnt)++;
 667         }
 668 }
 669
 670 static int ad7280_channel_init(struct ad7280_state *st, bool irq_present)
 671 {
 672         int dev, cnt = 0;
 673
 674         st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1,
 675                                     sizeof(*st->channels), GFP_KERNEL);
 676         if (!st->channels)
 677                 return -ENOMEM;
 678
 679         for (dev = 0; dev <= st->slave_num; dev++)
 680                 ad7280_init_dev_channels(st, dev, &cnt, irq_present);
 681
 682         ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev);
 683
 684         return cnt + 1;
 685 }
 686
 687 static int ad7280a_read_thresh(struct iio_dev *indio_dev,
 688                                const struct iio_chan_spec *chan,
 689                                enum iio_event_type type,
 690                                enum iio_event_direction dir,
 691                                enum iio_event_info info, int *val, int *val2)
 692 {
 693         struct ad7280_state *st = iio_priv(indio_dev);
 694
 695         switch (chan->type) {
 696         case IIO_VOLTAGE:
 697                 switch (dir) {
 698                 case IIO_EV_DIR_RISING:
 699                         *val = 1000 + (st->cell_threshhigh * 1568L) / 100;
 700                         return IIO_VAL_INT;
 701                 case IIO_EV_DIR_FALLING:
 702                         *val = 1000 + (st->cell_threshlow * 1568L) / 100;
 703                         return IIO_VAL_INT;
 704                 default:
 705                         return -EINVAL;
 706                 }
 707                 break;
 708         case IIO_TEMP:
 709                 switch (dir) {
 710                 case IIO_EV_DIR_RISING:
 711                         *val = ((st->aux_threshhigh) * 196L) / 10;
 712                         return IIO_VAL_INT;
 713                 case IIO_EV_DIR_FALLING:
 714                         *val = (st->aux_threshlow * 196L) / 10;
 715                         return IIO_VAL_INT;
 716                 default:
 717                         return -EINVAL;
 718                 }
 719                 break;
 720         default:
 721                 return -EINVAL;
 722         }
 723 }
 724
 725 static int ad7280a_write_thresh(struct iio_dev *indio_dev,
 726                                 const struct iio_chan_spec *chan,
 727                                 enum iio_event_type type,
 728                                 enum iio_event_direction dir,
 729                                 enum iio_event_info info,
 730                                 int val, int val2)
 731 {
 732         struct ad7280_state *st = iio_priv(indio_dev);
 733         unsigned int addr;
 734         long value;
 735         int ret;
 736
 737         if (val2 != 0)
 738                 return -EINVAL;
 739
 740         mutex_lock(&st->lock);
 741         switch (chan->type) {
 742         case IIO_VOLTAGE:
 743                 value = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */
 744                 value = clamp(value, 0L, 0xFFL);
 745                 switch (dir) {
 746                 case IIO_EV_DIR_RISING:
 747                         addr = AD7280A_CELL_OVERVOLTAGE_REG;
 748                         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
 749                                            1, value);
 750                         if (ret)
 751                                 break;
 752                         st->cell_threshhigh = value;
 753                         break;
 754                 case IIO_EV_DIR_FALLING:
 755                         addr = AD7280A_CELL_UNDERVOLTAGE_REG;
 756                         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
 757                                            1, value);
 758                         if (ret)
 759                                 break;
 760                         st->cell_threshlow = value;
 761                         break;
 762                 default:
 763                         ret = -EINVAL;
 764                         goto err_unlock;
 765                 }
 766                 break;
 767         case IIO_TEMP:
 768                 value = (val * 10) / 196; /* LSB 19.6mV */
 769                 value = clamp(value, 0L, 0xFFL);
 770                 switch (dir) {
 771                 case IIO_EV_DIR_RISING:
 772                         addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG;
 773                         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
 774                                            1, value);
 775                         if (ret)
 776                                 break;
 777                         st->aux_threshhigh = value;
 778                         break;
 779                 case IIO_EV_DIR_FALLING:
 780                         addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG;
 781                         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
 782                                            1, value);
 783                         if (ret)
 784                                 break;
 785                         st->aux_threshlow = value;
 786                         break;
 787                 default:
 788                         ret = -EINVAL;
 789                         goto err_unlock;
 790                 }
 791                 break;
 792         default:
 793                 ret = -EINVAL;
 794                 goto err_unlock;
 795         }
 796
 797 err_unlock:
 798         mutex_unlock(&st->lock);
 799
 800         return ret;
 801 }
 802
 803 static irqreturn_t ad7280_event_handler(int irq, void *private)
 804 {
 805         struct iio_dev *indio_dev = private;
 806         struct ad7280_state *st = iio_priv(indio_dev);
 807         int i, ret;
 808
 809         unsigned int *channels __free(kfree) = kcalloc(st->scan_cnt, sizeof(*channels),
 810                                                        GFP_KERNEL);
 811         if (!channels)
 812                 return IRQ_HANDLED;
 813
 814         ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
 815         if (ret < 0)
 816                 return IRQ_HANDLED;
 817
 818         for (i = 0; i < st->scan_cnt; i++) {
 819                 unsigned int val;
 820
 821                 val = FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, channels[i]);
 822                 if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, channels[i]) <=
 823                     AD7280A_CELL_VOLTAGE_6_REG) {
 824                         if (val >= st->cell_threshhigh) {
 825                                 u64 tmp = IIO_DIFF_EVENT_CODE(IIO_VOLTAGE, 0, 0,
 826                                                         IIO_EV_TYPE_THRESH,
 827                                                         IIO_EV_DIR_RISING);
 828                                 iio_push_event(indio_dev, tmp,
 829                                                iio_get_time_ns(indio_dev));
 830                         } else if (val <= st->cell_threshlow) {
 831                                 u64 tmp = IIO_DIFF_EVENT_CODE(IIO_VOLTAGE, 0, 0,
 832                                                         IIO_EV_TYPE_THRESH,
 833                                                         IIO_EV_DIR_FALLING);
 834                                 iio_push_event(indio_dev, tmp,
 835                                                iio_get_time_ns(indio_dev));
 836                         }
 837                 } else {
 838                         if (val >= st->aux_threshhigh) {
 839                                 u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
 840                                                         IIO_EV_TYPE_THRESH,
 841                                                         IIO_EV_DIR_RISING);
 842                                 iio_push_event(indio_dev, tmp,
 843                                                iio_get_time_ns(indio_dev));
 844                         } else if (val <= st->aux_threshlow) {
 845                                 u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
 846                                                         IIO_EV_TYPE_THRESH,
 847                                                         IIO_EV_DIR_FALLING);
 848                                 iio_push_event(indio_dev, tmp,
 849                                                iio_get_time_ns(indio_dev));
 850                         }
 851                 }
 852         }
 853
 854         return IRQ_HANDLED;
 855 }
 856
 857 static void ad7280_update_delay(struct ad7280_state *st)
 858 {
 859         /*
 860          * Total Conversion Time = ((tACQ + tCONV) *
 861          *                         (Number of Conversions per Part)) −
 862          *                         tACQ + ((N - 1) * tDELAY)
 863          *
 864          * Readback Delay = Total Conversion Time + tWAIT
 865          */
 866
 867         st->readback_delay_us =
 868                 ((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 720) *
 869                         (AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) -
 870                 ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250;
 871
 872         /* Convert to usecs */
 873         st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
 874         st->readback_delay_us += 5; /* Add tWAIT */
 875 }
 876
 877 static int ad7280_read_raw(struct iio_dev *indio_dev,
 878                            struct iio_chan_spec const *chan,
 879                            int *val,
 880                            int *val2,
 881                            long m)
 882 {
 883         struct ad7280_state *st = iio_priv(indio_dev);
 884         int ret;
 885
 886         switch (m) {
 887         case IIO_CHAN_INFO_RAW:
 888                 mutex_lock(&st->lock);
 889                 if (chan->address == AD7280A_ALL_CELLS)
 890                         ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
 891                 else
 892                         ret = ad7280_read_channel(st, chan->address >> 8,
 893                                                   chan->address & 0xFF);
 894                 mutex_unlock(&st->lock);
 895
 896                 if (ret < 0)
 897                         return ret;
 898
 899                 *val = ret;
 900
 901                 return IIO_VAL_INT;
 902         case IIO_CHAN_INFO_SCALE:
 903                 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6_REG)
 904                         *val = 4000;
 905                 else
 906                         *val = 5000;
 907
 908                 *val2 = AD7280A_BITS;
 909                 return IIO_VAL_FRACTIONAL_LOG2;
 910         case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 911                 *val = ad7280a_n_avg[st->oversampling_ratio];
 912                 return IIO_VAL_INT;
 913         }
 914         return -EINVAL;
 915 }
 916
 917 static int ad7280_write_raw(struct iio_dev *indio_dev,
 918                             struct iio_chan_spec const *chan,
 919                             int val, int val2, long mask)
 920 {
 921         struct ad7280_state *st = iio_priv(indio_dev);
 922         int i;
 923
 924         switch (mask) {
 925         case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 926                 if (val2 != 0)
 927                         return -EINVAL;
 928                 for (i = 0; i < ARRAY_SIZE(ad7280a_n_avg); i++) {
 929                         if (val == ad7280a_n_avg[i]) {
 930                                 st->oversampling_ratio = i;
 931                                 ad7280_update_delay(st);
 932                                 return 0;
 933                         }
 934                 }
 935                 return -EINVAL;
 936         default:
 937                 return -EINVAL;
 938         }
 939 }
 940
 941 static const struct iio_info ad7280_info = {
 942         .read_raw = ad7280_read_raw,
 943         .write_raw = ad7280_write_raw,
 944         .read_event_value = &ad7280a_read_thresh,
 945         .write_event_value = &ad7280a_write_thresh,
 946 };
 947
 948 static const struct iio_info ad7280_info_no_irq = {
 949         .read_raw = ad7280_read_raw,
 950         .write_raw = ad7280_write_raw,
 951 };
 952
 953 static int ad7280_probe(struct spi_device *spi)
 954 {
 955         struct device *dev = &spi->dev;
 956         struct ad7280_state *st;
 957         int ret;
 958         struct iio_dev *indio_dev;
 959
 960         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
 961         if (!indio_dev)
 962                 return -ENOMEM;
 963
 964         st = iio_priv(indio_dev);
 965         spi_set_drvdata(spi, indio_dev);
 966         st->spi = spi;
 967         mutex_init(&st->lock);
 968
 969         st->thermistor_term_en =
 970                 device_property_read_bool(dev, "adi,thermistor-termination");
 971
 972         if (device_property_present(dev, "adi,acquisition-time-ns")) {
 973                 u32 val;
 974
 975                 ret = device_property_read_u32(dev, "adi,acquisition-time-ns", &val);
 976                 if (ret)
 977                         return ret;
 978
 979                 switch (val) {
 980                 case 400:
 981                         st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns;
 982                         break;
 983                 case 800:
 984                         st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns;
 985                         break;
 986                 case 1200:
 987                         st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns;
 988                         break;
 989                 case 1600:
 990                         st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns;
 991                         break;
 992                 default:
 993                         dev_err(dev, "Firmware provided acquisition time is invalid\n");
 994                         return -EINVAL;
 995                 }
 996         } else {
 997                 st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns;
 998         }
 999
1000         /* Alert masks are intended for when particular inputs are not wired up */
1001         if (device_property_present(dev, "adi,voltage-alert-last-chan")) {
1002                 u32 val;
1003
1004                 ret = device_property_read_u32(dev, "adi,voltage-alert-last-chan", &val);
1005                 if (ret)
1006                         return ret;
1007
1008                 switch (val) {
1009                 case 3:
1010                         st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5;
1011                         break;
1012                 case 4:
1013                         st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5;
1014                         break;
1015                 case 5:
1016                         break;
1017                 default:
1018                         dev_err(dev,
1019                                 "Firmware provided last voltage alert channel invalid\n");
1020                         break;
1021                 }
1022         }
1023         crc8_populate_msb(st->crc_tab, POLYNOM);
1024
1025         st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;
1026         st->spi->mode = SPI_MODE_1;
1027         spi_setup(st->spi);
1028
1029         st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) |
1030                 FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en);
1031         st->oversampling_ratio = 0; /* No oversampling */
1032
1033         ret = ad7280_chain_setup(st);
1034         if (ret < 0)
1035                 return ret;
1036
1037         st->slave_num = ret;
1038         st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
1039         st->cell_threshhigh = 0xFF;
1040         st->aux_threshhigh = 0xFF;
1041
1042         ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st);
1043         if (ret)
1044                 return ret;
1045
1046         ad7280_update_delay(st);
1047
1048         indio_dev->name = spi_get_device_id(spi)->name;
1049         indio_dev->modes = INDIO_DIRECT_MODE;
1050
1051         ret = ad7280_channel_init(st, spi->irq > 0);
1052         if (ret < 0)
1053                 return ret;
1054
1055         indio_dev->num_channels = ret;
1056         indio_dev->channels = st->channels;
1057         if (spi->irq > 0) {
1058                 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
1059                                    AD7280A_ALERT_REG, 1,
1060                                    AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
1061                 if (ret)
1062                         return ret;
1063
1064                 ret = ad7280_write(st, ad7280a_devaddr(st->slave_num),
1065                                    AD7280A_ALERT_REG, 0,
1066                                    AD7280A_ALERT_GEN_STATIC_HIGH |
1067                                    FIELD_PREP(AD7280A_ALERT_REMOVE_MSK,
1068                                               st->chain_last_alert_ignore));
1069                 if (ret)
1070                         return ret;
1071
1072                 ret = devm_request_threaded_irq(dev, spi->irq,
1073                                                 NULL,
1074                                                 ad7280_event_handler,
1075                                                 IRQF_TRIGGER_FALLING |
1076                                                 IRQF_ONESHOT,
1077                                                 indio_dev->name,
1078                                                 indio_dev);
1079                 if (ret)
1080                         return ret;
1081
1082                 indio_dev->info = &ad7280_info;
1083         } else {
1084                 indio_dev->info = &ad7280_info_no_irq;
1085         }
1086
1087         return devm_iio_device_register(dev, indio_dev);
1088 }
1089
1090 static const struct spi_device_id ad7280_id[] = {
1091         { "ad7280a", 0 },
1092         { }
1093 };
1094 MODULE_DEVICE_TABLE(spi, ad7280_id);
1095
1096 static struct spi_driver ad7280_driver = {
1097         .driver = {
1098                 .name   = "ad7280",
1099         },
1100         .probe          = ad7280_probe,
1101         .id_table       = ad7280_id,
1102 };
1103 module_spi_driver(ad7280_driver);
1104
1105 MODULE_AUTHOR("Michael Hennerich <[email protected]>");
1106 MODULE_DESCRIPTION("Analog Devices AD7280A");
1107 MODULE_LICENSE("GPL v2");