drivers/gpu/drm/i915/display/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <[email protected]>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <[email protected]>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <[email protected]>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/display/drm_hdmi_helper.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_crtc.h>
  37 #include <drm/drm_edid.h>
  38 #include <drm/drm_eld.h>
  39 #include <drm/drm_probe_helper.h>
  40
  41 #include "i915_drv.h"
  42 #include "i915_reg.h"
  43 #include "intel_atomic.h"
  44 #include "intel_audio.h"
  45 #include "intel_connector.h"
  46 #include "intel_crtc.h"
  47 #include "intel_de.h"
  48 #include "intel_display_driver.h"
  49 #include "intel_display_types.h"
  50 #include "intel_fdi.h"
  51 #include "intel_fifo_underrun.h"
  52 #include "intel_gmbus.h"
  53 #include "intel_hdmi.h"
  54 #include "intel_hotplug.h"
  55 #include "intel_panel.h"
  56 #include "intel_sdvo.h"
  57 #include "intel_sdvo_regs.h"
  58
  59 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  60 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  61 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  62 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  63
  64 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK | SDVO_TV_MASK)
  65
  66 #define IS_TV(c)                ((c)->output_flag & SDVO_TV_MASK)
  67 #define IS_TMDS(c)              ((c)->output_flag & SDVO_TMDS_MASK)
  68 #define IS_LVDS(c)              ((c)->output_flag & SDVO_LVDS_MASK)
  69 #define IS_TV_OR_LVDS(c)        ((c)->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  70 #define IS_DIGITAL(c)           ((c)->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  71
  72 #define HAS_DDC(c)              ((c)->output_flag & (SDVO_RGB_MASK | SDVO_TMDS_MASK | \
  73                                                      SDVO_LVDS_MASK))
  74
  75 static const char * const tv_format_names[] = {
  76         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  77         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  78         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  79         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  80         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  81         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  82         "SECAM_60"
  83 };
  84
  85 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  86
  87 struct intel_sdvo;
  88
  89 struct intel_sdvo_ddc {
  90         struct i2c_adapter ddc;
  91         struct intel_sdvo *sdvo;
  92         u8 ddc_bus;
  93 };
  94
  95 struct intel_sdvo {
  96         struct intel_encoder base;
  97
  98         struct i2c_adapter *i2c;
  99         u8 target_addr;
 100
 101         struct intel_sdvo_ddc ddc[3];
 102
 103         /* Register for the SDVO device: SDVOB or SDVOC */
 104         i915_reg_t sdvo_reg;
 105
 106         /*
 107          * Capabilities of the SDVO device returned by
 108          * intel_sdvo_get_capabilities()
 109          */
 110         struct intel_sdvo_caps caps;
 111
 112         u8 colorimetry_cap;
 113
 114         /* Pixel clock limitations reported by the SDVO device, in kHz */
 115         int pixel_clock_min, pixel_clock_max;
 116
 117         /*
 118          * Hotplug activation bits for this device
 119          */
 120         u16 hotplug_active;
 121
 122         /*
 123          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 124          */
 125         u8 dtd_sdvo_flags;
 126 };
 127
 128 struct intel_sdvo_connector {
 129         struct intel_connector base;
 130
 131         /* Mark the type of connector */
 132         u16 output_flag;
 133
 134         /* This contains all current supported TV format */
 135         u8 tv_format_supported[TV_FORMAT_NUM];
 136         int   format_supported_num;
 137         struct drm_property *tv_format;
 138
 139         /* add the property for the SDVO-TV */
 140         struct drm_property *left;
 141         struct drm_property *right;
 142         struct drm_property *top;
 143         struct drm_property *bottom;
 144         struct drm_property *hpos;
 145         struct drm_property *vpos;
 146         struct drm_property *contrast;
 147         struct drm_property *saturation;
 148         struct drm_property *hue;
 149         struct drm_property *sharpness;
 150         struct drm_property *flicker_filter;
 151         struct drm_property *flicker_filter_adaptive;
 152         struct drm_property *flicker_filter_2d;
 153         struct drm_property *tv_chroma_filter;
 154         struct drm_property *tv_luma_filter;
 155         struct drm_property *dot_crawl;
 156
 157         /* add the property for the SDVO-TV/LVDS */
 158         struct drm_property *brightness;
 159
 160         /* this is to get the range of margin.*/
 161         u32 max_hscan, max_vscan;
 162
 163         /**
 164          * This is set if we treat the device as HDMI, instead of DVI.
 165          */
 166         bool is_hdmi;
 167 };
 168
 169 struct intel_sdvo_connector_state {
 170         /* base.base: tv.saturation/contrast/hue/brightness */
 171         struct intel_digital_connector_state base;
 172
 173         struct {
 174                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 175                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 176                 unsigned chroma_filter, luma_filter, dot_crawl;
 177         } tv;
 178 };
 179
 180 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 181 {
 182         return container_of(encoder, struct intel_sdvo, base);
 183 }
 184
 185 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector)
 186 {
 187         return to_sdvo(intel_attached_encoder(connector));
 188 }
 189
 190 static struct intel_sdvo_connector *
 191 to_intel_sdvo_connector(struct drm_connector *connector)
 192 {
 193         return container_of(connector, struct intel_sdvo_connector, base.base);
 194 }
 195
 196 #define to_intel_sdvo_connector_state(conn_state) \
 197         container_of_const((conn_state), struct intel_sdvo_connector_state, base.base)
 198
 199 static bool
 200 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo);
 201 static bool
 202 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 203                               struct intel_sdvo_connector *intel_sdvo_connector,
 204                               int type);
 205 static bool
 206 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 207                                    struct intel_sdvo_connector *intel_sdvo_connector);
 208
 209 /*
 210  * Writes the SDVOB or SDVOC with the given value, but always writes both
 211  * SDVOB and SDVOC to work around apparent hardware issues (according to
 212  * comments in the BIOS).
 213  */
 214 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 215 {
 216         struct drm_device *dev = intel_sdvo->base.base.dev;
 217         struct drm_i915_private *dev_priv = to_i915(dev);
 218         u32 bval = val, cval = val;
 219         int i;
 220
 221         if (HAS_PCH_SPLIT(dev_priv)) {
 222                 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 223                 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 224                 /*
 225                  * HW workaround, need to write this twice for issue
 226                  * that may result in first write getting masked.
 227                  */
 228                 if (HAS_PCH_IBX(dev_priv)) {
 229                         intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 230                         intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 231                 }
 232                 return;
 233         }
 234
 235         if (intel_sdvo->base.port == PORT_B)
 236                 cval = intel_de_read(dev_priv, GEN3_SDVOC);
 237         else
 238                 bval = intel_de_read(dev_priv, GEN3_SDVOB);
 239
 240         /*
 241          * Write the registers twice for luck. Sometimes,
 242          * writing them only once doesn't appear to 'stick'.
 243          * The BIOS does this too. Yay, magic
 244          */
 245         for (i = 0; i < 2; i++) {
 246                 intel_de_write(dev_priv, GEN3_SDVOB, bval);
 247                 intel_de_posting_read(dev_priv, GEN3_SDVOB);
 248
 249                 intel_de_write(dev_priv, GEN3_SDVOC, cval);
 250                 intel_de_posting_read(dev_priv, GEN3_SDVOC);
 251         }
 252 }
 253
 254 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 255 {
 256         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
 257         struct i2c_msg msgs[] = {
 258                 {
 259                         .addr = intel_sdvo->target_addr,
 260                         .flags = 0,
 261                         .len = 1,
 262                         .buf = &addr,
 263                 },
 264                 {
 265                         .addr = intel_sdvo->target_addr,
 266                         .flags = I2C_M_RD,
 267                         .len = 1,
 268                         .buf = ch,
 269                 }
 270         };
 271         int ret;
 272
 273         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 274                 return true;
 275
 276         drm_dbg_kms(&i915->drm, "i2c transfer returned %d\n", ret);
 277         return false;
 278 }
 279
 280 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
 281
 282 /** Mapping of command numbers to names, for debug output */
 283 static const struct {
 284         u8 cmd;
 285         const char *name;
 286 } __packed sdvo_cmd_names[] = {
 287         SDVO_CMD_NAME_ENTRY(RESET),
 288         SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS),
 289         SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV),
 290         SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS),
 291         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS),
 292         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS),
 293         SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP),
 294         SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP),
 295         SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS),
 296         SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT),
 297         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG),
 298         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG),
 299         SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE),
 300         SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT),
 301         SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT),
 302         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1),
 303         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2),
 304         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1),
 305         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2),
 306         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1),
 307         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2),
 308         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1),
 309         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2),
 310         SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING),
 311         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1),
 312         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2),
 313         SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE),
 314         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE),
 315         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS),
 316         SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT),
 317         SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT),
 318         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS),
 319         SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT),
 320         SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT),
 321         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES),
 322         SDVO_CMD_NAME_ENTRY(GET_POWER_STATE),
 323         SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE),
 324         SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE),
 325         SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH),
 326         SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT),
 327         SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 328         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS),
 329
 330         /* Add the op code for SDVO enhancements */
 331         SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS),
 332         SDVO_CMD_NAME_ENTRY(GET_HPOS),
 333         SDVO_CMD_NAME_ENTRY(SET_HPOS),
 334         SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS),
 335         SDVO_CMD_NAME_ENTRY(GET_VPOS),
 336         SDVO_CMD_NAME_ENTRY(SET_VPOS),
 337         SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION),
 338         SDVO_CMD_NAME_ENTRY(GET_SATURATION),
 339         SDVO_CMD_NAME_ENTRY(SET_SATURATION),
 340         SDVO_CMD_NAME_ENTRY(GET_MAX_HUE),
 341         SDVO_CMD_NAME_ENTRY(GET_HUE),
 342         SDVO_CMD_NAME_ENTRY(SET_HUE),
 343         SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST),
 344         SDVO_CMD_NAME_ENTRY(GET_CONTRAST),
 345         SDVO_CMD_NAME_ENTRY(SET_CONTRAST),
 346         SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS),
 347         SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS),
 348         SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS),
 349         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H),
 350         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H),
 351         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H),
 352         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V),
 353         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V),
 354         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V),
 355         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER),
 356         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER),
 357         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER),
 358         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE),
 359         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE),
 360         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE),
 361         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D),
 362         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D),
 363         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D),
 364         SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS),
 365         SDVO_CMD_NAME_ENTRY(GET_SHARPNESS),
 366         SDVO_CMD_NAME_ENTRY(SET_SHARPNESS),
 367         SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL),
 368         SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL),
 369         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER),
 370         SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER),
 371         SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER),
 372         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER),
 373         SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER),
 374         SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER),
 375
 376         /* HDMI op code */
 377         SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE),
 378         SDVO_CMD_NAME_ENTRY(GET_ENCODE),
 379         SDVO_CMD_NAME_ENTRY(SET_ENCODE),
 380         SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI),
 381         SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI),
 382         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP),
 383         SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY),
 384         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY),
 385         SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER),
 386         SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT),
 387         SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT),
 388         SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX),
 389         SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX),
 390         SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO),
 391         SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT),
 392         SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT),
 393         SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE),
 394         SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE),
 395         SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA),
 396         SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA),
 397 };
 398
 399 #undef SDVO_CMD_NAME_ENTRY
 400
 401 static const char *sdvo_cmd_name(u8 cmd)
 402 {
 403         int i;
 404
 405         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 406                 if (cmd == sdvo_cmd_names[i].cmd)
 407                         return sdvo_cmd_names[i].name;
 408         }
 409
 410         return NULL;
 411 }
 412
 413 #define SDVO_NAME(svdo) ((svdo)->base.port == PORT_B ? "SDVOB" : "SDVOC")
 414
 415 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 416                                    const void *args, int args_len)
 417 {
 418         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 419         const char *cmd_name;
 420         int i, pos = 0;
 421         char buffer[64];
 422
 423 #define BUF_PRINT(args...) \
 424         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 425
 426         for (i = 0; i < args_len; i++) {
 427                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 428         }
 429         for (; i < 8; i++) {
 430                 BUF_PRINT("   ");
 431         }
 432
 433         cmd_name = sdvo_cmd_name(cmd);
 434         if (cmd_name)
 435                 BUF_PRINT("(%s)", cmd_name);
 436         else
 437                 BUF_PRINT("(%02X)", cmd);
 438
 439         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 440 #undef BUF_PRINT
 441
 442         drm_dbg_kms(&dev_priv->drm, "%s: W: %02X %s\n", SDVO_NAME(intel_sdvo),
 443                     cmd, buffer);
 444 }
 445
 446 static const char * const cmd_status_names[] = {
 447         [SDVO_CMD_STATUS_POWER_ON] = "Power on",
 448         [SDVO_CMD_STATUS_SUCCESS] = "Success",
 449         [SDVO_CMD_STATUS_NOTSUPP] = "Not supported",
 450         [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg",
 451         [SDVO_CMD_STATUS_PENDING] = "Pending",
 452         [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified",
 453         [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported",
 454 };
 455
 456 static const char *sdvo_cmd_status(u8 status)
 457 {
 458         if (status < ARRAY_SIZE(cmd_status_names))
 459                 return cmd_status_names[status];
 460         else
 461                 return NULL;
 462 }
 463
 464 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 465                                    const void *args, int args_len,
 466                                    bool unlocked)
 467 {
 468         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
 469         u8 *buf, status;
 470         struct i2c_msg *msgs;
 471         int i, ret = true;
 472
 473         /* Would be simpler to allocate both in one go ? */
 474         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 475         if (!buf)
 476                 return false;
 477
 478         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 479         if (!msgs) {
 480                 kfree(buf);
 481                 return false;
 482         }
 483
 484         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 485
 486         for (i = 0; i < args_len; i++) {
 487                 msgs[i].addr = intel_sdvo->target_addr;
 488                 msgs[i].flags = 0;
 489                 msgs[i].len = 2;
 490                 msgs[i].buf = buf + 2 *i;
 491                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 492                 buf[2*i + 1] = ((u8*)args)[i];
 493         }
 494         msgs[i].addr = intel_sdvo->target_addr;
 495         msgs[i].flags = 0;
 496         msgs[i].len = 2;
 497         msgs[i].buf = buf + 2*i;
 498         buf[2*i + 0] = SDVO_I2C_OPCODE;
 499         buf[2*i + 1] = cmd;
 500
 501         /* the following two are to read the response */
 502         status = SDVO_I2C_CMD_STATUS;
 503         msgs[i+1].addr = intel_sdvo->target_addr;
 504         msgs[i+1].flags = 0;
 505         msgs[i+1].len = 1;
 506         msgs[i+1].buf = &status;
 507
 508         msgs[i+2].addr = intel_sdvo->target_addr;
 509         msgs[i+2].flags = I2C_M_RD;
 510         msgs[i+2].len = 1;
 511         msgs[i+2].buf = &status;
 512
 513         if (unlocked)
 514                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 515         else
 516                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 517         if (ret < 0) {
 518                 drm_dbg_kms(&i915->drm, "I2c transfer returned %d\n", ret);
 519                 ret = false;
 520                 goto out;
 521         }
 522         if (ret != i+3) {
 523                 /* failure in I2C transfer */
 524                 drm_dbg_kms(&i915->drm, "I2c transfer returned %d/%d\n", ret, i+3);
 525                 ret = false;
 526         }
 527
 528 out:
 529         kfree(msgs);
 530         kfree(buf);
 531         return ret;
 532 }
 533
 534 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 535                                  const void *args, int args_len)
 536 {
 537         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 538 }
 539
 540 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 541                                      void *response, int response_len)
 542 {
 543         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 544         const char *cmd_status;
 545         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 546         u8 status;
 547         int i, pos = 0;
 548         char buffer[64];
 549
 550         buffer[0] = '\0';
 551
 552         /*
 553          * The documentation states that all commands will be
 554          * processed within 15µs, and that we need only poll
 555          * the status byte a maximum of 3 times in order for the
 556          * command to be complete.
 557          *
 558          * Check 5 times in case the hardware failed to read the docs.
 559          *
 560          * Also beware that the first response by many devices is to
 561          * reply PENDING and stall for time. TVs are notorious for
 562          * requiring longer than specified to complete their replies.
 563          * Originally (in the DDX long ago), the delay was only ever 15ms
 564          * with an additional delay of 30ms applied for TVs added later after
 565          * many experiments. To accommodate both sets of delays, we do a
 566          * sequence of slow checks if the device is falling behind and fails
 567          * to reply within 5*15µs.
 568          */
 569         if (!intel_sdvo_read_byte(intel_sdvo,
 570                                   SDVO_I2C_CMD_STATUS,
 571                                   &status))
 572                 goto log_fail;
 573
 574         while ((status == SDVO_CMD_STATUS_PENDING ||
 575                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 576                 if (retry < 10)
 577                         msleep(15);
 578                 else
 579                         udelay(15);
 580
 581                 if (!intel_sdvo_read_byte(intel_sdvo,
 582                                           SDVO_I2C_CMD_STATUS,
 583                                           &status))
 584                         goto log_fail;
 585         }
 586
 587 #define BUF_PRINT(args...) \
 588         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 589
 590         cmd_status = sdvo_cmd_status(status);
 591         if (cmd_status)
 592                 BUF_PRINT("(%s)", cmd_status);
 593         else
 594                 BUF_PRINT("(??? %d)", status);
 595
 596         if (status != SDVO_CMD_STATUS_SUCCESS)
 597                 goto log_fail;
 598
 599         /* Read the command response */
 600         for (i = 0; i < response_len; i++) {
 601                 if (!intel_sdvo_read_byte(intel_sdvo,
 602                                           SDVO_I2C_RETURN_0 + i,
 603                                           &((u8 *)response)[i]))
 604                         goto log_fail;
 605                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 606         }
 607
 608         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 609 #undef BUF_PRINT
 610
 611         drm_dbg_kms(&dev_priv->drm, "%s: R: %s\n",
 612                     SDVO_NAME(intel_sdvo), buffer);
 613         return true;
 614
 615 log_fail:
 616         drm_dbg_kms(&dev_priv->drm, "%s: R: ... failed %s\n",
 617                     SDVO_NAME(intel_sdvo), buffer);
 618         return false;
 619 }
 620
 621 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 622 {
 623         if (adjusted_mode->crtc_clock >= 100000)
 624                 return 1;
 625         else if (adjusted_mode->crtc_clock >= 50000)
 626                 return 2;
 627         else
 628                 return 4;
 629 }
 630
 631 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 632                                                 u8 ddc_bus)
 633 {
 634         /* This must be the immediately preceding write before the i2c xfer */
 635         return __intel_sdvo_write_cmd(intel_sdvo,
 636                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 637                                       &ddc_bus, 1, false);
 638 }
 639
 640 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 641 {
 642         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 643                 return false;
 644
 645         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 646 }
 647
 648 static bool
 649 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 650 {
 651         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 652                 return false;
 653
 654         return intel_sdvo_read_response(intel_sdvo, value, len);
 655 }
 656
 657 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 658 {
 659         struct intel_sdvo_set_target_input_args targets = {};
 660         return intel_sdvo_set_value(intel_sdvo,
 661                                     SDVO_CMD_SET_TARGET_INPUT,
 662                                     &targets, sizeof(targets));
 663 }
 664
 665 /*
 666  * Return whether each input is trained.
 667  *
 668  * This function is making an assumption about the layout of the response,
 669  * which should be checked against the docs.
 670  */
 671 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 672 {
 673         struct intel_sdvo_get_trained_inputs_response response;
 674
 675         BUILD_BUG_ON(sizeof(response) != 1);
 676         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 677                                   &response, sizeof(response)))
 678                 return false;
 679
 680         *input_1 = response.input0_trained;
 681         *input_2 = response.input1_trained;
 682         return true;
 683 }
 684
 685 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 686                                           u16 outputs)
 687 {
 688         return intel_sdvo_set_value(intel_sdvo,
 689                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 690                                     &outputs, sizeof(outputs));
 691 }
 692
 693 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 694                                           u16 *outputs)
 695 {
 696         return intel_sdvo_get_value(intel_sdvo,
 697                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 698                                     outputs, sizeof(*outputs));
 699 }
 700
 701 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 702                                                int mode)
 703 {
 704         u8 state = SDVO_ENCODER_STATE_ON;
 705
 706         switch (mode) {
 707         case DRM_MODE_DPMS_ON:
 708                 state = SDVO_ENCODER_STATE_ON;
 709                 break;
 710         case DRM_MODE_DPMS_STANDBY:
 711                 state = SDVO_ENCODER_STATE_STANDBY;
 712                 break;
 713         case DRM_MODE_DPMS_SUSPEND:
 714                 state = SDVO_ENCODER_STATE_SUSPEND;
 715                 break;
 716         case DRM_MODE_DPMS_OFF:
 717                 state = SDVO_ENCODER_STATE_OFF;
 718                 break;
 719         }
 720
 721         return intel_sdvo_set_value(intel_sdvo,
 722                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 723 }
 724
 725 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 726                                                    int *clock_min,
 727                                                    int *clock_max)
 728 {
 729         struct intel_sdvo_pixel_clock_range clocks;
 730
 731         BUILD_BUG_ON(sizeof(clocks) != 4);
 732         if (!intel_sdvo_get_value(intel_sdvo,
 733                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 734                                   &clocks, sizeof(clocks)))
 735                 return false;
 736
 737         /* Convert the values from units of 10 kHz to kHz. */
 738         *clock_min = clocks.min * 10;
 739         *clock_max = clocks.max * 10;
 740         return true;
 741 }
 742
 743 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 744                                          u16 outputs)
 745 {
 746         return intel_sdvo_set_value(intel_sdvo,
 747                                     SDVO_CMD_SET_TARGET_OUTPUT,
 748                                     &outputs, sizeof(outputs));
 749 }
 750
 751 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 752                                   struct intel_sdvo_dtd *dtd)
 753 {
 754         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 755                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 756 }
 757
 758 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 759                                   struct intel_sdvo_dtd *dtd)
 760 {
 761         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 762                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 763 }
 764
 765 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 766                                         struct intel_sdvo_dtd *dtd)
 767 {
 768         return intel_sdvo_set_timing(intel_sdvo,
 769                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 770 }
 771
 772 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 773                                          struct intel_sdvo_dtd *dtd)
 774 {
 775         return intel_sdvo_set_timing(intel_sdvo,
 776                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 777 }
 778
 779 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 780                                         struct intel_sdvo_dtd *dtd)
 781 {
 782         return intel_sdvo_get_timing(intel_sdvo,
 783                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 784 }
 785
 786 static bool
 787 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 788                                          struct intel_sdvo_connector *intel_sdvo_connector,
 789                                          const struct drm_display_mode *mode)
 790 {
 791         struct intel_sdvo_preferred_input_timing_args args;
 792
 793         memset(&args, 0, sizeof(args));
 794         args.clock = mode->clock / 10;
 795         args.width = mode->hdisplay;
 796         args.height = mode->vdisplay;
 797         args.interlace = 0;
 798
 799         if (IS_LVDS(intel_sdvo_connector)) {
 800                 const struct drm_display_mode *fixed_mode =
 801                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
 802
 803                 if (fixed_mode->hdisplay != args.width ||
 804                     fixed_mode->vdisplay != args.height)
 805                         args.scaled = 1;
 806         }
 807
 808         return intel_sdvo_set_value(intel_sdvo,
 809                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 810                                     &args, sizeof(args));
 811 }
 812
 813 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 814                                                   struct intel_sdvo_dtd *dtd)
 815 {
 816         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 817         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 818         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 819                                     &dtd->part1, sizeof(dtd->part1)) &&
 820                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 821                                      &dtd->part2, sizeof(dtd->part2));
 822 }
 823
 824 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 825 {
 826         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 827 }
 828
 829 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 830                                          const struct drm_display_mode *mode)
 831 {
 832         u16 width, height;
 833         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 834         u16 h_sync_offset, v_sync_offset;
 835         int mode_clock;
 836
 837         memset(dtd, 0, sizeof(*dtd));
 838
 839         width = mode->hdisplay;
 840         height = mode->vdisplay;
 841
 842         /* do some mode translations */
 843         h_blank_len = mode->htotal - mode->hdisplay;
 844         h_sync_len = mode->hsync_end - mode->hsync_start;
 845
 846         v_blank_len = mode->vtotal - mode->vdisplay;
 847         v_sync_len = mode->vsync_end - mode->vsync_start;
 848
 849         h_sync_offset = mode->hsync_start - mode->hdisplay;
 850         v_sync_offset = mode->vsync_start - mode->vdisplay;
 851
 852         mode_clock = mode->clock;
 853         mode_clock /= 10;
 854         dtd->part1.clock = mode_clock;
 855
 856         dtd->part1.h_active = width & 0xff;
 857         dtd->part1.h_blank = h_blank_len & 0xff;
 858         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 859                 ((h_blank_len >> 8) & 0xf);
 860         dtd->part1.v_active = height & 0xff;
 861         dtd->part1.v_blank = v_blank_len & 0xff;
 862         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 863                 ((v_blank_len >> 8) & 0xf);
 864
 865         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 866         dtd->part2.h_sync_width = h_sync_len & 0xff;
 867         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 868                 (v_sync_len & 0xf);
 869         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 870                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 871                 ((v_sync_len & 0x30) >> 4);
 872
 873         dtd->part2.dtd_flags = 0x18;
 874         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 875                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 876         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 877                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 878         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 879                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 880
 881         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 882 }
 883
 884 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 885                                          const struct intel_sdvo_dtd *dtd)
 886 {
 887         struct drm_display_mode mode = {};
 888
 889         mode.hdisplay = dtd->part1.h_active;
 890         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 891         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 892         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 893         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 894         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 895         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 896         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 897
 898         mode.vdisplay = dtd->part1.v_active;
 899         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 900         mode.vsync_start = mode.vdisplay;
 901         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 902         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 903         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 904         mode.vsync_end = mode.vsync_start +
 905                 (dtd->part2.v_sync_off_width & 0xf);
 906         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 907         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 908         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 909
 910         mode.clock = dtd->part1.clock * 10;
 911
 912         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 913                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 914         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 915                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 916         else
 917                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 918         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 919                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 920         else
 921                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 922
 923         drm_mode_set_crtcinfo(&mode, 0);
 924
 925         drm_mode_copy(pmode, &mode);
 926 }
 927
 928 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 929 {
 930         struct intel_sdvo_encode encode;
 931
 932         BUILD_BUG_ON(sizeof(encode) != 2);
 933         return intel_sdvo_get_value(intel_sdvo,
 934                                     SDVO_CMD_GET_SUPP_ENCODE,
 935                                     &encode, sizeof(encode));
 936 }
 937
 938 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 939                                   u8 mode)
 940 {
 941         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 942 }
 943
 944 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 945                                        u8 mode)
 946 {
 947         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 948 }
 949
 950 static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
 951                                              u8 pixel_repeat)
 952 {
 953         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
 954                                     &pixel_repeat, 1);
 955 }
 956
 957 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 958                                        u8 audio_state)
 959 {
 960         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 961                                     &audio_state, 1);
 962 }
 963
 964 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo,
 965                                      u8 *hbuf_size)
 966 {
 967         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 968                                   hbuf_size, 1))
 969                 return false;
 970
 971         /* Buffer size is 0 based, hooray! However zero means zero. */
 972         if (*hbuf_size)
 973                 (*hbuf_size)++;
 974
 975         return true;
 976 }
 977
 978 #if 0
 979 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 980 {
 981         int i, j;
 982         u8 set_buf_index[2];
 983         u8 av_split;
 984         u8 buf_size;
 985         u8 buf[48];
 986         u8 *pos;
 987
 988         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 989
 990         for (i = 0; i <= av_split; i++) {
 991                 set_buf_index[0] = i; set_buf_index[1] = 0;
 992                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 993                                      set_buf_index, 2);
 994                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 995                 intel_sdvo_read_response(encoder, &buf_size, 1);
 996
 997                 pos = buf;
 998                 for (j = 0; j <= buf_size; j += 8) {
 999                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
1000                                              NULL, 0);
1001                         intel_sdvo_read_response(encoder, pos, 8);
1002                         pos += 8;
1003                 }
1004         }
1005 }
1006 #endif
1007
1008 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
1009                                        unsigned int if_index, u8 tx_rate,
1010                                        const u8 *data, unsigned int length)
1011 {
1012         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
1013         u8 set_buf_index[2] = { if_index, 0 };
1014         u8 hbuf_size, tmp[8];
1015         int i;
1016
1017         if (!intel_sdvo_set_value(intel_sdvo,
1018                                   SDVO_CMD_SET_HBUF_INDEX,
1019                                   set_buf_index, 2))
1020                 return false;
1021
1022         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1023                 return false;
1024
1025         drm_dbg_kms(&i915->drm,
1026                     "writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1027                     if_index, length, hbuf_size);
1028
1029         if (hbuf_size < length)
1030                 return false;
1031
1032         for (i = 0; i < hbuf_size; i += 8) {
1033                 memset(tmp, 0, 8);
1034                 if (i < length)
1035                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
1036
1037                 if (!intel_sdvo_set_value(intel_sdvo,
1038                                           SDVO_CMD_SET_HBUF_DATA,
1039                                           tmp, 8))
1040                         return false;
1041         }
1042
1043         return intel_sdvo_set_value(intel_sdvo,
1044                                     SDVO_CMD_SET_HBUF_TXRATE,
1045                                     &tx_rate, 1);
1046 }
1047
1048 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1049                                          unsigned int if_index,
1050                                          u8 *data, unsigned int length)
1051 {
1052         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
1053         u8 set_buf_index[2] = { if_index, 0 };
1054         u8 hbuf_size, tx_rate, av_split;
1055         int i;
1056
1057         if (!intel_sdvo_get_value(intel_sdvo,
1058                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
1059                                   &av_split, 1))
1060                 return -ENXIO;
1061
1062         if (av_split < if_index)
1063                 return 0;
1064
1065         if (!intel_sdvo_set_value(intel_sdvo,
1066                                   SDVO_CMD_SET_HBUF_INDEX,
1067                                   set_buf_index, 2))
1068                 return -ENXIO;
1069
1070         if (!intel_sdvo_get_value(intel_sdvo,
1071                                   SDVO_CMD_GET_HBUF_TXRATE,
1072                                   &tx_rate, 1))
1073                 return -ENXIO;
1074
1075         /* TX_DISABLED doesn't mean disabled for ELD */
1076         if (if_index != SDVO_HBUF_INDEX_ELD && tx_rate == SDVO_HBUF_TX_DISABLED)
1077                 return 0;
1078
1079         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1080                 return false;
1081
1082         drm_dbg_kms(&i915->drm,
1083                     "reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1084                     if_index, length, hbuf_size);
1085
1086         hbuf_size = min_t(unsigned int, length, hbuf_size);
1087
1088         for (i = 0; i < hbuf_size; i += 8) {
1089                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1090                         return -ENXIO;
1091                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1092                                               min_t(unsigned int, 8, hbuf_size - i)))
1093                         return -ENXIO;
1094         }
1095
1096         return hbuf_size;
1097 }
1098
1099 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1100                                              struct intel_crtc_state *crtc_state,
1101                                              struct drm_connector_state *conn_state)
1102 {
1103         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1104         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1105         const struct drm_display_mode *adjusted_mode =
1106                 &crtc_state->hw.adjusted_mode;
1107         int ret;
1108
1109         if (!crtc_state->has_hdmi_sink)
1110                 return true;
1111
1112         crtc_state->infoframes.enable |=
1113                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1114
1115         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1116                                                        conn_state->connector,
1117                                                        adjusted_mode);
1118         if (ret)
1119                 return false;
1120
1121         drm_hdmi_avi_infoframe_quant_range(frame,
1122                                            conn_state->connector,
1123                                            adjusted_mode,
1124                                            crtc_state->limited_color_range ?
1125                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1126                                            HDMI_QUANTIZATION_RANGE_FULL);
1127
1128         ret = hdmi_avi_infoframe_check(frame);
1129         if (drm_WARN_ON(&dev_priv->drm, ret))
1130                 return false;
1131
1132         return true;
1133 }
1134
1135 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1136                                          const struct intel_crtc_state *crtc_state)
1137 {
1138         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1139         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1140         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1141         ssize_t len;
1142
1143         if ((crtc_state->infoframes.enable &
1144              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1145                 return true;
1146
1147         if (drm_WARN_ON(&dev_priv->drm,
1148                         frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1149                 return false;
1150
1151         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1152         if (drm_WARN_ON(&dev_priv->drm, len < 0))
1153                 return false;
1154
1155         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1156                                           SDVO_HBUF_TX_VSYNC,
1157                                           sdvo_data, len);
1158 }
1159
1160 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1161                                          struct intel_crtc_state *crtc_state)
1162 {
1163         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
1164         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1165         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1166         ssize_t len;
1167         int ret;
1168
1169         if (!crtc_state->has_hdmi_sink)
1170                 return;
1171
1172         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1173                                         sdvo_data, sizeof(sdvo_data));
1174         if (len < 0) {
1175                 drm_dbg_kms(&i915->drm, "failed to read AVI infoframe\n");
1176                 return;
1177         } else if (len == 0) {
1178                 return;
1179         }
1180
1181         crtc_state->infoframes.enable |=
1182                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1183
1184         ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1185         if (ret) {
1186                 drm_dbg_kms(&i915->drm, "Failed to unpack AVI infoframe\n");
1187                 return;
1188         }
1189
1190         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1191                 drm_dbg_kms(&i915->drm,
1192                             "Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1193                             frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1194 }
1195
1196 static void intel_sdvo_get_eld(struct intel_sdvo *intel_sdvo,
1197                                struct intel_crtc_state *crtc_state)
1198 {
1199         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
1200         ssize_t len;
1201         u8 val;
1202
1203         if (!crtc_state->has_audio)
1204                 return;
1205
1206         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT, &val, 1))
1207                 return;
1208
1209         if ((val & SDVO_AUDIO_ELD_VALID) == 0)
1210                 return;
1211
1212         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1213                                         crtc_state->eld, sizeof(crtc_state->eld));
1214         if (len < 0)
1215                 drm_dbg_kms(&i915->drm, "failed to read ELD\n");
1216 }
1217
1218 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1219                                      const struct drm_connector_state *conn_state)
1220 {
1221         struct intel_sdvo_tv_format format;
1222         u32 format_map;
1223
1224         format_map = 1 << conn_state->tv.legacy_mode;
1225         memset(&format, 0, sizeof(format));
1226         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1227
1228         BUILD_BUG_ON(sizeof(format) != 6);
1229         return intel_sdvo_set_value(intel_sdvo,
1230                                     SDVO_CMD_SET_TV_FORMAT,
1231                                     &format, sizeof(format));
1232 }
1233
1234 static bool
1235 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1236                                         struct intel_sdvo_connector *intel_sdvo_connector,
1237                                         const struct drm_display_mode *mode)
1238 {
1239         struct intel_sdvo_dtd output_dtd;
1240
1241         if (!intel_sdvo_set_target_output(intel_sdvo,
1242                                           intel_sdvo_connector->output_flag))
1243                 return false;
1244
1245         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1246         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1247                 return false;
1248
1249         return true;
1250 }
1251
1252 /*
1253  * Asks the sdvo controller for the preferred input mode given the output mode.
1254  * Unfortunately we have to set up the full output mode to do that.
1255  */
1256 static bool
1257 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1258                                     struct intel_sdvo_connector *intel_sdvo_connector,
1259                                     const struct drm_display_mode *mode,
1260                                     struct drm_display_mode *adjusted_mode)
1261 {
1262         struct intel_sdvo_dtd input_dtd;
1263
1264         /* Reset the input timing to the screen. Assume always input 0. */
1265         if (!intel_sdvo_set_target_input(intel_sdvo))
1266                 return false;
1267
1268         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1269                                                       intel_sdvo_connector,
1270                                                       mode))
1271                 return false;
1272
1273         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1274                                                    &input_dtd))
1275                 return false;
1276
1277         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1278         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1279
1280         return true;
1281 }
1282
1283 static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1284 {
1285         struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
1286         unsigned int dotclock = pipe_config->hw.adjusted_mode.crtc_clock;
1287         struct dpll *clock = &pipe_config->dpll;
1288
1289         /*
1290          * SDVO TV has fixed PLL values depend on its clock range,
1291          * this mirrors vbios setting.
1292          */
1293         if (dotclock >= 100000 && dotclock < 140500) {
1294                 clock->p1 = 2;
1295                 clock->p2 = 10;
1296                 clock->n = 3;
1297                 clock->m1 = 16;
1298                 clock->m2 = 8;
1299         } else if (dotclock >= 140500 && dotclock <= 200000) {
1300                 clock->p1 = 1;
1301                 clock->p2 = 10;
1302                 clock->n = 6;
1303                 clock->m1 = 12;
1304                 clock->m2 = 8;
1305         } else {
1306                 drm_dbg_kms(&dev_priv->drm,
1307                             "SDVO TV clock out of range: %i\n", dotclock);
1308                 return -EINVAL;
1309         }
1310
1311         pipe_config->clock_set = true;
1312
1313         return 0;
1314 }
1315
1316 static bool intel_has_hdmi_sink(struct intel_sdvo_connector *intel_sdvo_connector,
1317                                 const struct drm_connector_state *conn_state)
1318 {
1319         struct drm_connector *connector = conn_state->connector;
1320
1321         return intel_sdvo_connector->is_hdmi &&
1322                 connector->display_info.is_hdmi &&
1323                 READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
1324 }
1325
1326 static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
1327                                            const struct intel_crtc_state *crtc_state,
1328                                            const struct drm_connector_state *conn_state)
1329 {
1330         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1331
1332         if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
1333                 return false;
1334
1335         return intel_hdmi_limited_color_range(crtc_state, conn_state);
1336 }
1337
1338 static bool intel_sdvo_has_audio(struct intel_encoder *encoder,
1339                                  const struct intel_crtc_state *crtc_state,
1340                                  const struct drm_connector_state *conn_state)
1341 {
1342         struct drm_connector *connector = conn_state->connector;
1343         struct intel_sdvo_connector *intel_sdvo_connector =
1344                 to_intel_sdvo_connector(connector);
1345         const struct intel_digital_connector_state *intel_conn_state =
1346                 to_intel_digital_connector_state(conn_state);
1347
1348         if (!crtc_state->has_hdmi_sink)
1349                 return false;
1350
1351         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
1352                 return intel_sdvo_connector->is_hdmi &&
1353                         connector->display_info.has_audio;
1354         else
1355                 return intel_conn_state->force_audio == HDMI_AUDIO_ON;
1356 }
1357
1358 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1359                                      struct intel_crtc_state *pipe_config,
1360                                      struct drm_connector_state *conn_state)
1361 {
1362         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
1363         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1364         struct intel_sdvo_connector *intel_sdvo_connector =
1365                 to_intel_sdvo_connector(conn_state->connector);
1366         struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
1367         struct drm_display_mode *mode = &pipe_config->hw.mode;
1368
1369         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev))) {
1370                 pipe_config->has_pch_encoder = true;
1371                 if (!intel_fdi_compute_pipe_bpp(pipe_config))
1372                         return -EINVAL;
1373         }
1374
1375         drm_dbg_kms(&i915->drm, "forcing bpc to 8 for SDVO\n");
1376         /* FIXME: Don't increase pipe_bpp */
1377         pipe_config->pipe_bpp = 8*3;
1378         pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
1379         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1380
1381         /*
1382          * We need to construct preferred input timings based on our
1383          * output timings.  To do that, we have to set the output
1384          * timings, even though this isn't really the right place in
1385          * the sequence to do it. Oh well.
1386          */
1387         if (IS_TV(intel_sdvo_connector)) {
1388                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1389                                                              intel_sdvo_connector,
1390                                                              mode))
1391                         return -EINVAL;
1392
1393                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1394                                                            intel_sdvo_connector,
1395                                                            mode,
1396                                                            adjusted_mode);
1397                 pipe_config->sdvo_tv_clock = true;
1398         } else if (IS_LVDS(intel_sdvo_connector)) {
1399                 const struct drm_display_mode *fixed_mode =
1400                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1401                 int ret;
1402
1403                 ret = intel_panel_compute_config(&intel_sdvo_connector->base,
1404                                                  adjusted_mode);
1405                 if (ret)
1406                         return ret;
1407
1408                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1409                                                              intel_sdvo_connector,
1410                                                              fixed_mode))
1411                         return -EINVAL;
1412
1413                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1414                                                            intel_sdvo_connector,
1415                                                            mode,
1416                                                            adjusted_mode);
1417         }
1418
1419         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1420                 return -EINVAL;
1421
1422         /*
1423          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1424          * SDVO device will factor out the multiplier during mode_set.
1425          */
1426         pipe_config->pixel_multiplier =
1427                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1428
1429         pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, conn_state);
1430
1431         pipe_config->has_audio =
1432                 intel_sdvo_has_audio(encoder, pipe_config, conn_state) &&
1433                 intel_audio_compute_config(encoder, pipe_config, conn_state);
1434
1435         pipe_config->limited_color_range =
1436                 intel_sdvo_limited_color_range(encoder, pipe_config,
1437                                                conn_state);
1438
1439         /* Clock computation needs to happen after pixel multiplier. */
1440         if (IS_TV(intel_sdvo_connector)) {
1441                 int ret;
1442
1443                 ret = i9xx_adjust_sdvo_tv_clock(pipe_config);
1444                 if (ret)
1445                         return ret;
1446         }
1447
1448         if (conn_state->picture_aspect_ratio)
1449                 adjusted_mode->picture_aspect_ratio =
1450                         conn_state->picture_aspect_ratio;
1451
1452         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1453                                               pipe_config, conn_state)) {
1454                 drm_dbg_kms(&i915->drm, "bad AVI infoframe\n");
1455                 return -EINVAL;
1456         }
1457
1458         return 0;
1459 }
1460
1461 #define UPDATE_PROPERTY(input, NAME) \
1462         do { \
1463                 val = input; \
1464                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1465         } while (0)
1466
1467 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1468                                     const struct intel_sdvo_connector_state *sdvo_state)
1469 {
1470         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1471         struct intel_sdvo_connector *intel_sdvo_conn =
1472                 to_intel_sdvo_connector(conn_state->connector);
1473         u16 val;
1474
1475         if (intel_sdvo_conn->left)
1476                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1477
1478         if (intel_sdvo_conn->top)
1479                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1480
1481         if (intel_sdvo_conn->hpos)
1482                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1483
1484         if (intel_sdvo_conn->vpos)
1485                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1486
1487         if (intel_sdvo_conn->saturation)
1488                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1489
1490         if (intel_sdvo_conn->contrast)
1491                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1492
1493         if (intel_sdvo_conn->hue)
1494                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1495
1496         if (intel_sdvo_conn->brightness)
1497                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1498
1499         if (intel_sdvo_conn->sharpness)
1500                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1501
1502         if (intel_sdvo_conn->flicker_filter)
1503                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1504
1505         if (intel_sdvo_conn->flicker_filter_2d)
1506                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1507
1508         if (intel_sdvo_conn->flicker_filter_adaptive)
1509                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1510
1511         if (intel_sdvo_conn->tv_chroma_filter)
1512                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1513
1514         if (intel_sdvo_conn->tv_luma_filter)
1515                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1516
1517         if (intel_sdvo_conn->dot_crawl)
1518                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1519
1520 #undef UPDATE_PROPERTY
1521 }
1522
1523 static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
1524                                   struct intel_encoder *intel_encoder,
1525                                   const struct intel_crtc_state *crtc_state,
1526                                   const struct drm_connector_state *conn_state)
1527 {
1528         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1529         struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
1530         const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
1531         const struct intel_sdvo_connector_state *sdvo_state =
1532                 to_intel_sdvo_connector_state(conn_state);
1533         struct intel_sdvo_connector *intel_sdvo_connector =
1534                 to_intel_sdvo_connector(conn_state->connector);
1535         const struct drm_display_mode *mode = &crtc_state->hw.mode;
1536         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1537         u32 sdvox;
1538         struct intel_sdvo_in_out_map in_out;
1539         struct intel_sdvo_dtd input_dtd, output_dtd;
1540         int rate;
1541
1542         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1543
1544         /*
1545          * First, set the input mapping for the first input to our controlled
1546          * output. This is only correct if we're a single-input device, in
1547          * which case the first input is the output from the appropriate SDVO
1548          * channel on the motherboard.  In a two-input device, the first input
1549          * will be SDVOB and the second SDVOC.
1550          */
1551         in_out.in0 = intel_sdvo_connector->output_flag;
1552         in_out.in1 = 0;
1553
1554         intel_sdvo_set_value(intel_sdvo,
1555                              SDVO_CMD_SET_IN_OUT_MAP,
1556                              &in_out, sizeof(in_out));
1557
1558         /* Set the output timings to the screen */
1559         if (!intel_sdvo_set_target_output(intel_sdvo,
1560                                           intel_sdvo_connector->output_flag))
1561                 return;
1562
1563         /* lvds has a special fixed output timing. */
1564         if (IS_LVDS(intel_sdvo_connector)) {
1565                 const struct drm_display_mode *fixed_mode =
1566                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1567
1568                 intel_sdvo_get_dtd_from_mode(&output_dtd, fixed_mode);
1569         } else {
1570                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1571         }
1572         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1573                 drm_info(&dev_priv->drm,
1574                          "Setting output timings on %s failed\n",
1575                          SDVO_NAME(intel_sdvo));
1576
1577         /* Set the input timing to the screen. Assume always input 0. */
1578         if (!intel_sdvo_set_target_input(intel_sdvo))
1579                 return;
1580
1581         if (crtc_state->has_hdmi_sink) {
1582                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1583                 intel_sdvo_set_colorimetry(intel_sdvo,
1584                                            crtc_state->limited_color_range ?
1585                                            SDVO_COLORIMETRY_RGB220 :
1586                                            SDVO_COLORIMETRY_RGB256);
1587                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1588                 intel_sdvo_set_pixel_replication(intel_sdvo,
1589                                                  !!(adjusted_mode->flags &
1590                                                     DRM_MODE_FLAG_DBLCLK));
1591         } else
1592                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1593
1594         if (IS_TV(intel_sdvo_connector) &&
1595             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1596                 return;
1597
1598         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1599
1600         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1601                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1602         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1603                 drm_info(&dev_priv->drm,
1604                          "Setting input timings on %s failed\n",
1605                          SDVO_NAME(intel_sdvo));
1606
1607         switch (crtc_state->pixel_multiplier) {
1608         default:
1609                 drm_WARN(&dev_priv->drm, 1,
1610                          "unknown pixel multiplier specified\n");
1611                 fallthrough;
1612         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1613         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1614         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1615         }
1616         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1617                 return;
1618
1619         /* Set the SDVO control regs. */
1620         if (DISPLAY_VER(dev_priv) >= 4) {
1621                 /* The real mode polarity is set by the SDVO commands, using
1622                  * struct intel_sdvo_dtd. */
1623                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1624                 if (DISPLAY_VER(dev_priv) < 5)
1625                         sdvox |= SDVO_BORDER_ENABLE;
1626         } else {
1627                 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1628                 if (intel_sdvo->base.port == PORT_B)
1629                         sdvox &= SDVOB_PRESERVE_MASK;
1630                 else
1631                         sdvox &= SDVOC_PRESERVE_MASK;
1632                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1633         }
1634
1635         if (HAS_PCH_CPT(dev_priv))
1636                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1637         else
1638                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1639
1640         if (DISPLAY_VER(dev_priv) >= 4) {
1641                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1642         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1643                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1644                 /* done in crtc_mode_set as it lives inside the dpll register */
1645         } else {
1646                 sdvox |= (crtc_state->pixel_multiplier - 1)
1647                         << SDVO_PORT_MULTIPLY_SHIFT;
1648         }
1649
1650         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1651             DISPLAY_VER(dev_priv) < 5)
1652                 sdvox |= SDVO_STALL_SELECT;
1653         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1654 }
1655
1656 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1657 {
1658         struct intel_sdvo_connector *intel_sdvo_connector =
1659                 to_intel_sdvo_connector(&connector->base);
1660         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1661         u16 active_outputs = 0;
1662
1663         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1664
1665         return active_outputs & intel_sdvo_connector->output_flag;
1666 }
1667
1668 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1669                              i915_reg_t sdvo_reg, enum pipe *pipe)
1670 {
1671         u32 val;
1672
1673         val = intel_de_read(dev_priv, sdvo_reg);
1674
1675         /* asserts want to know the pipe even if the port is disabled */
1676         if (HAS_PCH_CPT(dev_priv))
1677                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1678         else if (IS_CHERRYVIEW(dev_priv))
1679                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1680         else
1681                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1682
1683         return val & SDVO_ENABLE;
1684 }
1685
1686 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1687                                     enum pipe *pipe)
1688 {
1689         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1690         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1691         u16 active_outputs = 0;
1692         bool ret;
1693
1694         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1695
1696         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1697
1698         return ret || active_outputs;
1699 }
1700
1701 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1702                                   struct intel_crtc_state *pipe_config)
1703 {
1704         struct drm_device *dev = encoder->base.dev;
1705         struct drm_i915_private *dev_priv = to_i915(dev);
1706         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1707         struct intel_sdvo_dtd dtd;
1708         int encoder_pixel_multiplier = 0;
1709         int dotclock;
1710         u32 flags = 0, sdvox;
1711         u8 val;
1712         bool ret;
1713
1714         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1715
1716         sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1717
1718         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1719         if (!ret) {
1720                 /*
1721                  * Some sdvo encoders are not spec compliant and don't
1722                  * implement the mandatory get_timings function.
1723                  */
1724                 drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
1725                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1726         } else {
1727                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1728                         flags |= DRM_MODE_FLAG_PHSYNC;
1729                 else
1730                         flags |= DRM_MODE_FLAG_NHSYNC;
1731
1732                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1733                         flags |= DRM_MODE_FLAG_PVSYNC;
1734                 else
1735                         flags |= DRM_MODE_FLAG_NVSYNC;
1736         }
1737
1738         pipe_config->hw.adjusted_mode.flags |= flags;
1739
1740         /*
1741          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1742          * the sdvo port register, on all other platforms it is part of the dpll
1743          * state. Since the general pipe state readout happens before the
1744          * encoder->get_config we so already have a valid pixel multplier on all
1745          * other platfroms.
1746          */
1747         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1748                 pipe_config->pixel_multiplier =
1749                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1750                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1751         }
1752
1753         dotclock = pipe_config->port_clock;
1754
1755         if (pipe_config->pixel_multiplier)
1756                 dotclock /= pipe_config->pixel_multiplier;
1757
1758         pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
1759
1760         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1761         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1762                                  &val, 1)) {
1763                 switch (val) {
1764                 case SDVO_CLOCK_RATE_MULT_1X:
1765                         encoder_pixel_multiplier = 1;
1766                         break;
1767                 case SDVO_CLOCK_RATE_MULT_2X:
1768                         encoder_pixel_multiplier = 2;
1769                         break;
1770                 case SDVO_CLOCK_RATE_MULT_4X:
1771                         encoder_pixel_multiplier = 4;
1772                         break;
1773                 }
1774         }
1775
1776         drm_WARN(dev,
1777                  encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1778                  "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1779                  pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1780
1781         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
1782                                  &val, 1)) {
1783                 if (val == SDVO_COLORIMETRY_RGB220)
1784                         pipe_config->limited_color_range = true;
1785         }
1786
1787         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1788                                  &val, 1)) {
1789                 if (val & SDVO_AUDIO_PRESENCE_DETECT)
1790                         pipe_config->has_audio = true;
1791         }
1792
1793         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1794                                  &val, 1)) {
1795                 if (val == SDVO_ENCODE_HDMI)
1796                         pipe_config->has_hdmi_sink = true;
1797         }
1798
1799         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1800
1801         intel_sdvo_get_eld(intel_sdvo, pipe_config);
1802 }
1803
1804 static void intel_sdvo_disable_audio(struct intel_encoder *encoder,
1805                                      const struct intel_crtc_state *old_crtc_state,
1806                                      const struct drm_connector_state *old_conn_state)
1807 {
1808         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1809
1810         if (!old_crtc_state->has_audio)
1811                 return;
1812
1813         intel_sdvo_set_audio_state(intel_sdvo, 0);
1814 }
1815
1816 static void intel_sdvo_enable_audio(struct intel_encoder *encoder,
1817                                     const struct intel_crtc_state *crtc_state,
1818                                     const struct drm_connector_state *conn_state)
1819 {
1820         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1821         const u8 *eld = crtc_state->eld;
1822
1823         if (!crtc_state->has_audio)
1824                 return;
1825
1826         intel_sdvo_set_audio_state(intel_sdvo, 0);
1827
1828         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1829                                    SDVO_HBUF_TX_DISABLED,
1830                                    eld, drm_eld_size(eld));
1831
1832         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1833                                    SDVO_AUDIO_PRESENCE_DETECT);
1834 }
1835
1836 static void intel_disable_sdvo(struct intel_atomic_state *state,
1837                                struct intel_encoder *encoder,
1838                                const struct intel_crtc_state *old_crtc_state,
1839                                const struct drm_connector_state *conn_state)
1840 {
1841         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1842         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1843         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
1844         u32 temp;
1845
1846         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1847         if (0)
1848                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1849                                                    DRM_MODE_DPMS_OFF);
1850
1851         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1852
1853         temp &= ~SDVO_ENABLE;
1854         intel_sdvo_write_sdvox(intel_sdvo, temp);
1855
1856         /*
1857          * HW workaround for IBX, we need to move the port
1858          * to transcoder A after disabling it to allow the
1859          * matching DP port to be enabled on transcoder A.
1860          */
1861         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1862                 /*
1863                  * We get CPU/PCH FIFO underruns on the other pipe when
1864                  * doing the workaround. Sweep them under the rug.
1865                  */
1866                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1867                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1868
1869                 temp &= ~SDVO_PIPE_SEL_MASK;
1870                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1871                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1872
1873                 temp &= ~SDVO_ENABLE;
1874                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1875
1876                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1877                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1878                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1879         }
1880 }
1881
1882 static void pch_disable_sdvo(struct intel_atomic_state *state,
1883                              struct intel_encoder *encoder,
1884                              const struct intel_crtc_state *old_crtc_state,
1885                              const struct drm_connector_state *old_conn_state)
1886 {
1887 }
1888
1889 static void pch_post_disable_sdvo(struct intel_atomic_state *state,
1890                                   struct intel_encoder *encoder,
1891                                   const struct intel_crtc_state *old_crtc_state,
1892                                   const struct drm_connector_state *old_conn_state)
1893 {
1894         intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state);
1895 }
1896
1897 static void intel_enable_sdvo(struct intel_atomic_state *state,
1898                               struct intel_encoder *encoder,
1899                               const struct intel_crtc_state *pipe_config,
1900                               const struct drm_connector_state *conn_state)
1901 {
1902         struct drm_device *dev = encoder->base.dev;
1903         struct drm_i915_private *dev_priv = to_i915(dev);
1904         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1905         struct intel_sdvo_connector *intel_sdvo_connector =
1906                 to_intel_sdvo_connector(conn_state->connector);
1907         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1908         u32 temp;
1909         bool input1, input2;
1910         int i;
1911         bool success;
1912
1913         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1914         temp |= SDVO_ENABLE;
1915         intel_sdvo_write_sdvox(intel_sdvo, temp);
1916
1917         for (i = 0; i < 2; i++)
1918                 intel_crtc_wait_for_next_vblank(crtc);
1919
1920         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1921         /*
1922          * Warn if the device reported failure to sync.
1923          *
1924          * A lot of SDVO devices fail to notify of sync, but it's
1925          * a given it the status is a success, we succeeded.
1926          */
1927         if (success && !input1) {
1928                 drm_dbg_kms(&dev_priv->drm,
1929                             "First %s output reported failure to sync\n",
1930                             SDVO_NAME(intel_sdvo));
1931         }
1932
1933         if (0)
1934                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1935                                                    DRM_MODE_DPMS_ON);
1936         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo_connector->output_flag);
1937 }
1938
1939 static enum drm_mode_status
1940 intel_sdvo_mode_valid(struct drm_connector *connector,
1941                       struct drm_display_mode *mode)
1942 {
1943         struct drm_i915_private *i915 = to_i915(connector->dev);
1944         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
1945         struct intel_sdvo_connector *intel_sdvo_connector =
1946                 to_intel_sdvo_connector(connector);
1947         bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, connector->state);
1948         int max_dotclk = i915->display.cdclk.max_dotclk_freq;
1949         enum drm_mode_status status;
1950         int clock = mode->clock;
1951
1952         status = intel_cpu_transcoder_mode_valid(i915, mode);
1953         if (status != MODE_OK)
1954                 return status;
1955
1956         if (clock > max_dotclk)
1957                 return MODE_CLOCK_HIGH;
1958
1959         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
1960                 if (!has_hdmi_sink)
1961                         return MODE_CLOCK_LOW;
1962                 clock *= 2;
1963         }
1964
1965         if (intel_sdvo->pixel_clock_min > clock)
1966                 return MODE_CLOCK_LOW;
1967
1968         if (intel_sdvo->pixel_clock_max < clock)
1969                 return MODE_CLOCK_HIGH;
1970
1971         if (IS_LVDS(intel_sdvo_connector)) {
1972                 enum drm_mode_status status;
1973
1974                 status = intel_panel_mode_valid(&intel_sdvo_connector->base, mode);
1975                 if (status != MODE_OK)
1976                         return status;
1977         }
1978
1979         return MODE_OK;
1980 }
1981
1982 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1983 {
1984         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
1985         BUILD_BUG_ON(sizeof(*caps) != 8);
1986         if (!intel_sdvo_get_value(intel_sdvo,
1987                                   SDVO_CMD_GET_DEVICE_CAPS,
1988                                   caps, sizeof(*caps)))
1989                 return false;
1990
1991         drm_dbg_kms(&i915->drm, "SDVO capabilities:\n"
1992                     "  vendor_id: %d\n"
1993                     "  device_id: %d\n"
1994                     "  device_rev_id: %d\n"
1995                     "  sdvo_version_major: %d\n"
1996                     "  sdvo_version_minor: %d\n"
1997                     "  sdvo_num_inputs: %d\n"
1998                     "  smooth_scaling: %d\n"
1999                     "  sharp_scaling: %d\n"
2000                     "  up_scaling: %d\n"
2001                     "  down_scaling: %d\n"
2002                     "  stall_support: %d\n"
2003                     "  output_flags: %d\n",
2004                     caps->vendor_id,
2005                     caps->device_id,
2006                     caps->device_rev_id,
2007                     caps->sdvo_version_major,
2008                     caps->sdvo_version_minor,
2009                     caps->sdvo_num_inputs,
2010                     caps->smooth_scaling,
2011                     caps->sharp_scaling,
2012                     caps->up_scaling,
2013                     caps->down_scaling,
2014                     caps->stall_support,
2015                     caps->output_flags);
2016
2017         return true;
2018 }
2019
2020 static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
2021 {
2022         u8 cap;
2023
2024         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
2025                                   &cap, sizeof(cap)))
2026                 return SDVO_COLORIMETRY_RGB256;
2027
2028         return cap;
2029 }
2030
2031 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
2032 {
2033         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
2034         u16 hotplug;
2035
2036         if (!I915_HAS_HOTPLUG(dev_priv))
2037                 return 0;
2038
2039         /*
2040          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
2041          * on the line.
2042          */
2043         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
2044                 return 0;
2045
2046         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
2047                                   &hotplug, sizeof(hotplug)))
2048                 return 0;
2049
2050         return hotplug;
2051 }
2052
2053 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
2054 {
2055         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
2056
2057         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
2058                              &intel_sdvo->hotplug_active, 2);
2059 }
2060
2061 static enum intel_hotplug_state
2062 intel_sdvo_hotplug(struct intel_encoder *encoder,
2063                    struct intel_connector *connector)
2064 {
2065         intel_sdvo_enable_hotplug(encoder);
2066
2067         return intel_encoder_hotplug(encoder, connector);
2068 }
2069
2070 static const struct drm_edid *
2071 intel_sdvo_get_edid(struct drm_connector *connector)
2072 {
2073         struct i2c_adapter *ddc = connector->ddc;
2074
2075         if (!ddc)
2076                 return NULL;
2077
2078         return drm_edid_read_ddc(connector, ddc);
2079 }
2080
2081 /* Mac mini hack -- use the same DDC as the analog connector */
2082 static const struct drm_edid *
2083 intel_sdvo_get_analog_edid(struct drm_connector *connector)
2084 {
2085         struct intel_display *display = to_intel_display(connector->dev);
2086         struct i2c_adapter *ddc;
2087
2088         ddc = intel_gmbus_get_adapter(display, display->vbt.crt_ddc_pin);
2089         if (!ddc)
2090                 return NULL;
2091
2092         return drm_edid_read_ddc(connector, ddc);
2093 }
2094
2095 static enum drm_connector_status
2096 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
2097 {
2098         enum drm_connector_status status;
2099         const struct drm_edid *drm_edid;
2100
2101         drm_edid = intel_sdvo_get_edid(connector);
2102
2103         /*
2104          * When there is no edid and no monitor is connected with VGA
2105          * port, try to use the CRT ddc to read the EDID for DVI-connector.
2106          */
2107         if (!drm_edid)
2108                 drm_edid = intel_sdvo_get_analog_edid(connector);
2109
2110         status = connector_status_unknown;
2111         if (drm_edid) {
2112                 /* DDC bus is shared, match EDID to connector type */
2113                 if (drm_edid_is_digital(drm_edid))
2114                         status = connector_status_connected;
2115                 else
2116                         status = connector_status_disconnected;
2117                 drm_edid_free(drm_edid);
2118         }
2119
2120         return status;
2121 }
2122
2123 static bool
2124 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
2125                                   const struct drm_edid *drm_edid)
2126 {
2127         bool monitor_is_digital = drm_edid_is_digital(drm_edid);
2128         bool connector_is_digital = !!IS_DIGITAL(sdvo);
2129
2130         drm_dbg_kms(sdvo->base.base.dev,
2131                     "connector_is_digital? %d, monitor_is_digital? %d\n",
2132                     connector_is_digital, monitor_is_digital);
2133         return connector_is_digital == monitor_is_digital;
2134 }
2135
2136 static enum drm_connector_status
2137 intel_sdvo_detect(struct drm_connector *connector, bool force)
2138 {
2139         struct drm_i915_private *i915 = to_i915(connector->dev);
2140         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2141         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2142         enum drm_connector_status ret;
2143         u16 response;
2144
2145         drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
2146                     connector->base.id, connector->name);
2147
2148         if (!intel_display_device_enabled(i915))
2149                 return connector_status_disconnected;
2150
2151         if (!intel_display_driver_check_access(i915))
2152                 return connector->status;
2153
2154         if (!intel_sdvo_set_target_output(intel_sdvo,
2155                                           intel_sdvo_connector->output_flag))
2156                 return connector_status_unknown;
2157
2158         if (!intel_sdvo_get_value(intel_sdvo,
2159                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
2160                                   &response, 2))
2161                 return connector_status_unknown;
2162
2163         drm_dbg_kms(&i915->drm, "SDVO response %d %d [%x]\n",
2164                     response & 0xff, response >> 8,
2165                     intel_sdvo_connector->output_flag);
2166
2167         if (response == 0)
2168                 return connector_status_disconnected;
2169
2170         if ((intel_sdvo_connector->output_flag & response) == 0)
2171                 ret = connector_status_disconnected;
2172         else if (IS_TMDS(intel_sdvo_connector))
2173                 ret = intel_sdvo_tmds_sink_detect(connector);
2174         else {
2175                 const struct drm_edid *drm_edid;
2176
2177                 /* if we have an edid check it matches the connection */
2178                 drm_edid = intel_sdvo_get_edid(connector);
2179                 if (!drm_edid)
2180                         drm_edid = intel_sdvo_get_analog_edid(connector);
2181                 if (drm_edid) {
2182                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2183                                                               drm_edid))
2184                                 ret = connector_status_connected;
2185                         else
2186                                 ret = connector_status_disconnected;
2187
2188                         drm_edid_free(drm_edid);
2189                 } else {
2190                         ret = connector_status_connected;
2191                 }
2192         }
2193
2194         return ret;
2195 }
2196
2197 static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2198 {
2199         struct drm_i915_private *i915 = to_i915(connector->dev);
2200         int num_modes = 0;
2201         const struct drm_edid *drm_edid;
2202
2203         drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s]\n",
2204                     connector->base.id, connector->name);
2205
2206         if (!intel_display_driver_check_access(i915))
2207                 return drm_edid_connector_add_modes(connector);
2208
2209         /* set the bus switch and get the modes */
2210         drm_edid = intel_sdvo_get_edid(connector);
2211
2212         /*
2213          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2214          * link between analog and digital outputs. So, if the regular SDVO
2215          * DDC fails, check to see if the analog output is disconnected, in
2216          * which case we'll look there for the digital DDC data.
2217          */
2218         if (!drm_edid)
2219                 drm_edid = intel_sdvo_get_analog_edid(connector);
2220
2221         if (!drm_edid)
2222                 return 0;
2223
2224         if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2225                                               drm_edid))
2226                 num_modes += intel_connector_update_modes(connector, drm_edid);
2227
2228         drm_edid_free(drm_edid);
2229
2230         return num_modes;
2231 }
2232
2233 /*
2234  * Set of SDVO TV modes.
2235  * Note!  This is in reply order (see loop in get_tv_modes).
2236  * XXX: all 60Hz refresh?
2237  */
2238 static const struct drm_display_mode sdvo_tv_modes[] = {
2239         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2240                    416, 0, 200, 201, 232, 233, 0,
2241                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2242         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2243                    416, 0, 240, 241, 272, 273, 0,
2244                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2245         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2246                    496, 0, 300, 301, 332, 333, 0,
2247                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2248         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2249                    736, 0, 350, 351, 382, 383, 0,
2250                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2251         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2252                    736, 0, 400, 401, 432, 433, 0,
2253                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2254         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2255                    736, 0, 480, 481, 512, 513, 0,
2256                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2257         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2258                    800, 0, 480, 481, 512, 513, 0,
2259                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2260         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2261                    800, 0, 576, 577, 608, 609, 0,
2262                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2263         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2264                    816, 0, 350, 351, 382, 383, 0,
2265                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2266         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2267                    816, 0, 400, 401, 432, 433, 0,
2268                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2269         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2270                    816, 0, 480, 481, 512, 513, 0,
2271                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2272         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2273                    816, 0, 540, 541, 572, 573, 0,
2274                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2275         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2276                    816, 0, 576, 577, 608, 609, 0,
2277                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2278         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2279                    864, 0, 576, 577, 608, 609, 0,
2280                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2281         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2282                    896, 0, 600, 601, 632, 633, 0,
2283                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2284         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2285                    928, 0, 624, 625, 656, 657, 0,
2286                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2287         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2288                    1016, 0, 766, 767, 798, 799, 0,
2289                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2290         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2291                    1120, 0, 768, 769, 800, 801, 0,
2292                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2293         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2294                    1376, 0, 1024, 1025, 1056, 1057, 0,
2295                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2296 };
2297
2298 static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
2299 {
2300         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2301         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
2302         struct intel_sdvo_connector *intel_sdvo_connector =
2303                 to_intel_sdvo_connector(connector);
2304         const struct drm_connector_state *conn_state = connector->state;
2305         struct intel_sdvo_sdtv_resolution_request tv_res;
2306         u32 reply = 0, format_map = 0;
2307         int num_modes = 0;
2308         int i;
2309
2310         drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
2311                     connector->base.id, connector->name);
2312
2313         if (!intel_display_driver_check_access(i915))
2314                 return 0;
2315
2316         /*
2317          * Read the list of supported input resolutions for the selected TV
2318          * format.
2319          */
2320         format_map = 1 << conn_state->tv.legacy_mode;
2321         memcpy(&tv_res, &format_map,
2322                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2323
2324         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo_connector->output_flag))
2325                 return 0;
2326
2327         BUILD_BUG_ON(sizeof(tv_res) != 3);
2328         if (!intel_sdvo_write_cmd(intel_sdvo,
2329                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2330                                   &tv_res, sizeof(tv_res)))
2331                 return 0;
2332         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2333                 return 0;
2334
2335         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
2336                 if (reply & (1 << i)) {
2337                         struct drm_display_mode *nmode;
2338                         nmode = drm_mode_duplicate(connector->dev,
2339                                                    &sdvo_tv_modes[i]);
2340                         if (nmode) {
2341                                 drm_mode_probed_add(connector, nmode);
2342                                 num_modes++;
2343                         }
2344                 }
2345         }
2346
2347         return num_modes;
2348 }
2349
2350 static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2351 {
2352         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2353
2354         drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
2355                     connector->base.id, connector->name);
2356
2357         return intel_panel_get_modes(to_intel_connector(connector));
2358 }
2359
2360 static int intel_sdvo_get_modes(struct drm_connector *connector)
2361 {
2362         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2363
2364         if (IS_TV(intel_sdvo_connector))
2365                 return intel_sdvo_get_tv_modes(connector);
2366         else if (IS_LVDS(intel_sdvo_connector))
2367                 return intel_sdvo_get_lvds_modes(connector);
2368         else
2369                 return intel_sdvo_get_ddc_modes(connector);
2370 }
2371
2372 static int
2373 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2374                                          const struct drm_connector_state *state,
2375                                          struct drm_property *property,
2376                                          u64 *val)
2377 {
2378         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2379         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2380
2381         if (property == intel_sdvo_connector->tv_format) {
2382                 int i;
2383
2384                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2385                         if (state->tv.legacy_mode == intel_sdvo_connector->tv_format_supported[i]) {
2386                                 *val = i;
2387
2388                                 return 0;
2389                         }
2390
2391                 drm_WARN_ON(connector->dev, 1);
2392                 *val = 0;
2393         } else if (property == intel_sdvo_connector->top ||
2394                    property == intel_sdvo_connector->bottom)
2395                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2396         else if (property == intel_sdvo_connector->left ||
2397                  property == intel_sdvo_connector->right)
2398                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2399         else if (property == intel_sdvo_connector->hpos)
2400                 *val = sdvo_state->tv.hpos;
2401         else if (property == intel_sdvo_connector->vpos)
2402                 *val = sdvo_state->tv.vpos;
2403         else if (property == intel_sdvo_connector->saturation)
2404                 *val = state->tv.saturation;
2405         else if (property == intel_sdvo_connector->contrast)
2406                 *val = state->tv.contrast;
2407         else if (property == intel_sdvo_connector->hue)
2408                 *val = state->tv.hue;
2409         else if (property == intel_sdvo_connector->brightness)
2410                 *val = state->tv.brightness;
2411         else if (property == intel_sdvo_connector->sharpness)
2412                 *val = sdvo_state->tv.sharpness;
2413         else if (property == intel_sdvo_connector->flicker_filter)
2414                 *val = sdvo_state->tv.flicker_filter;
2415         else if (property == intel_sdvo_connector->flicker_filter_2d)
2416                 *val = sdvo_state->tv.flicker_filter_2d;
2417         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2418                 *val = sdvo_state->tv.flicker_filter_adaptive;
2419         else if (property == intel_sdvo_connector->tv_chroma_filter)
2420                 *val = sdvo_state->tv.chroma_filter;
2421         else if (property == intel_sdvo_connector->tv_luma_filter)
2422                 *val = sdvo_state->tv.luma_filter;
2423         else if (property == intel_sdvo_connector->dot_crawl)
2424                 *val = sdvo_state->tv.dot_crawl;
2425         else
2426                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2427
2428         return 0;
2429 }
2430
2431 static int
2432 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2433                                          struct drm_connector_state *state,
2434                                          struct drm_property *property,
2435                                          u64 val)
2436 {
2437         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2438         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2439
2440         if (property == intel_sdvo_connector->tv_format) {
2441                 state->tv.legacy_mode = intel_sdvo_connector->tv_format_supported[val];
2442
2443                 if (state->crtc) {
2444                         struct drm_crtc_state *crtc_state =
2445                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2446
2447                         crtc_state->connectors_changed = true;
2448                 }
2449         } else if (property == intel_sdvo_connector->top ||
2450                    property == intel_sdvo_connector->bottom)
2451                 /* Cannot set these independent from each other */
2452                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2453         else if (property == intel_sdvo_connector->left ||
2454                  property == intel_sdvo_connector->right)
2455                 /* Cannot set these independent from each other */
2456                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2457         else if (property == intel_sdvo_connector->hpos)
2458                 sdvo_state->tv.hpos = val;
2459         else if (property == intel_sdvo_connector->vpos)
2460                 sdvo_state->tv.vpos = val;
2461         else if (property == intel_sdvo_connector->saturation)
2462                 state->tv.saturation = val;
2463         else if (property == intel_sdvo_connector->contrast)
2464                 state->tv.contrast = val;
2465         else if (property == intel_sdvo_connector->hue)
2466                 state->tv.hue = val;
2467         else if (property == intel_sdvo_connector->brightness)
2468                 state->tv.brightness = val;
2469         else if (property == intel_sdvo_connector->sharpness)
2470                 sdvo_state->tv.sharpness = val;
2471         else if (property == intel_sdvo_connector->flicker_filter)
2472                 sdvo_state->tv.flicker_filter = val;
2473         else if (property == intel_sdvo_connector->flicker_filter_2d)
2474                 sdvo_state->tv.flicker_filter_2d = val;
2475         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2476                 sdvo_state->tv.flicker_filter_adaptive = val;
2477         else if (property == intel_sdvo_connector->tv_chroma_filter)
2478                 sdvo_state->tv.chroma_filter = val;
2479         else if (property == intel_sdvo_connector->tv_luma_filter)
2480                 sdvo_state->tv.luma_filter = val;
2481         else if (property == intel_sdvo_connector->dot_crawl)
2482                 sdvo_state->tv.dot_crawl = val;
2483         else
2484                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2485
2486         return 0;
2487 }
2488
2489 static struct drm_connector_state *
2490 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2491 {
2492         struct intel_sdvo_connector_state *state;
2493
2494         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2495         if (!state)
2496                 return NULL;
2497
2498         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2499         return &state->base.base;
2500 }
2501
2502 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2503         .detect = intel_sdvo_detect,
2504         .fill_modes = drm_helper_probe_single_connector_modes,
2505         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2506         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2507         .late_register = intel_connector_register,
2508         .early_unregister = intel_connector_unregister,
2509         .destroy = intel_connector_destroy,
2510         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2511         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2512 };
2513
2514 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2515                                    struct drm_atomic_state *state)
2516 {
2517         struct drm_connector_state *new_conn_state =
2518                 drm_atomic_get_new_connector_state(state, conn);
2519         struct drm_connector_state *old_conn_state =
2520                 drm_atomic_get_old_connector_state(state, conn);
2521         struct intel_sdvo_connector_state *old_state =
2522                 to_intel_sdvo_connector_state(old_conn_state);
2523         struct intel_sdvo_connector_state *new_state =
2524                 to_intel_sdvo_connector_state(new_conn_state);
2525
2526         if (new_conn_state->crtc &&
2527             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2528              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2529                 struct drm_crtc_state *crtc_state =
2530                         drm_atomic_get_new_crtc_state(state,
2531                                                       new_conn_state->crtc);
2532
2533                 crtc_state->connectors_changed = true;
2534         }
2535
2536         return intel_digital_connector_atomic_check(conn, state);
2537 }
2538
2539 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2540         .get_modes = intel_sdvo_get_modes,
2541         .mode_valid = intel_sdvo_mode_valid,
2542         .atomic_check = intel_sdvo_atomic_check,
2543 };
2544
2545 static void intel_sdvo_encoder_destroy(struct drm_encoder *_encoder)
2546 {
2547         struct intel_encoder *encoder = to_intel_encoder(_encoder);
2548         struct intel_sdvo *sdvo = to_sdvo(encoder);
2549         int i;
2550
2551         for (i = 0; i < ARRAY_SIZE(sdvo->ddc); i++) {
2552                 if (sdvo->ddc[i].ddc_bus)
2553                         i2c_del_adapter(&sdvo->ddc[i].ddc);
2554         }
2555
2556         drm_encoder_cleanup(&encoder->base);
2557         kfree(sdvo);
2558 };
2559
2560 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2561         .destroy = intel_sdvo_encoder_destroy,
2562 };
2563
2564 static int
2565 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo,
2566                          struct intel_sdvo_connector *connector)
2567 {
2568         u16 mask = 0;
2569         int num_bits;
2570
2571         /*
2572          * Make a mask of outputs less than or equal to our own priority in the
2573          * list.
2574          */
2575         switch (connector->output_flag) {
2576         case SDVO_OUTPUT_LVDS1:
2577                 mask |= SDVO_OUTPUT_LVDS1;
2578                 fallthrough;
2579         case SDVO_OUTPUT_LVDS0:
2580                 mask |= SDVO_OUTPUT_LVDS0;
2581                 fallthrough;
2582         case SDVO_OUTPUT_TMDS1:
2583                 mask |= SDVO_OUTPUT_TMDS1;
2584                 fallthrough;
2585         case SDVO_OUTPUT_TMDS0:
2586                 mask |= SDVO_OUTPUT_TMDS0;
2587                 fallthrough;
2588         case SDVO_OUTPUT_RGB1:
2589                 mask |= SDVO_OUTPUT_RGB1;
2590                 fallthrough;
2591         case SDVO_OUTPUT_RGB0:
2592                 mask |= SDVO_OUTPUT_RGB0;
2593                 break;
2594         }
2595
2596         /* Count bits to find what number we are in the priority list. */
2597         mask &= sdvo->caps.output_flags;
2598         num_bits = hweight16(mask);
2599         /* If more than 3 outputs, default to DDC bus 3 for now. */
2600         if (num_bits > 3)
2601                 num_bits = 3;
2602
2603         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2604         return num_bits;
2605 }
2606
2607 /*
2608  * Choose the appropriate DDC bus for control bus switch command for this
2609  * SDVO output based on the controlled output.
2610  *
2611  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2612  * outputs, then LVDS outputs.
2613  */
2614 static struct intel_sdvo_ddc *
2615 intel_sdvo_select_ddc_bus(struct intel_sdvo *sdvo,
2616                           struct intel_sdvo_connector *connector)
2617 {
2618         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2619         const struct sdvo_device_mapping *mapping;
2620         int ddc_bus;
2621
2622         if (sdvo->base.port == PORT_B)
2623                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2624         else
2625                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2626
2627         if (mapping->initialized)
2628                 ddc_bus = (mapping->ddc_pin & 0xf0) >> 4;
2629         else
2630                 ddc_bus = intel_sdvo_guess_ddc_bus(sdvo, connector);
2631
2632         if (ddc_bus < 1 || ddc_bus > 3)
2633                 return NULL;
2634
2635         return &sdvo->ddc[ddc_bus - 1];
2636 }
2637
2638 static void
2639 intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo)
2640 {
2641         struct intel_display *display = to_intel_display(&sdvo->base);
2642         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2643         const struct sdvo_device_mapping *mapping;
2644         u8 pin;
2645
2646         if (sdvo->base.port == PORT_B)
2647                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2648         else
2649                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2650
2651         if (mapping->initialized &&
2652             intel_gmbus_is_valid_pin(display, mapping->i2c_pin))
2653                 pin = mapping->i2c_pin;
2654         else
2655                 pin = GMBUS_PIN_DPB;
2656
2657         drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] I2C pin %d, target addr 0x%x\n",
2658                     sdvo->base.base.base.id, sdvo->base.base.name,
2659                     pin, sdvo->target_addr);
2660
2661         sdvo->i2c = intel_gmbus_get_adapter(display, pin);
2662
2663         /*
2664          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2665          * our code totally fails once we start using gmbus. Hence fall back to
2666          * bit banging for now.
2667          */
2668         intel_gmbus_force_bit(sdvo->i2c, true);
2669 }
2670
2671 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2672 static void
2673 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2674 {
2675         intel_gmbus_force_bit(sdvo->i2c, false);
2676 }
2677
2678 static bool
2679 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo)
2680 {
2681         return intel_sdvo_check_supp_encode(intel_sdvo);
2682 }
2683
2684 static u8
2685 intel_sdvo_get_target_addr(struct intel_sdvo *sdvo)
2686 {
2687         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2688         const struct sdvo_device_mapping *my_mapping, *other_mapping;
2689
2690         if (sdvo->base.port == PORT_B) {
2691                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2692                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2693         } else {
2694                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2695                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2696         }
2697
2698         /* If the BIOS described our SDVO device, take advantage of it. */
2699         if (my_mapping->target_addr)
2700                 return my_mapping->target_addr;
2701
2702         /*
2703          * If the BIOS only described a different SDVO device, use the
2704          * address that it isn't using.
2705          */
2706         if (other_mapping->target_addr) {
2707                 if (other_mapping->target_addr == 0x70)
2708                         return 0x72;
2709                 else
2710                         return 0x70;
2711         }
2712
2713         /*
2714          * No SDVO device info is found for another DVO port,
2715          * so use mapping assumption we had before BIOS parsing.
2716          */
2717         if (sdvo->base.port == PORT_B)
2718                 return 0x70;
2719         else
2720                 return 0x72;
2721 }
2722
2723 static int
2724 intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
2725                           struct intel_sdvo *sdvo, int bit);
2726
2727 static int
2728 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2729                           struct intel_sdvo *encoder)
2730 {
2731         struct drm_i915_private *i915 = to_i915(encoder->base.base.dev);
2732         struct intel_sdvo_ddc *ddc = NULL;
2733         int ret;
2734
2735         if (HAS_DDC(connector))
2736                 ddc = intel_sdvo_select_ddc_bus(encoder, connector);
2737
2738         ret = drm_connector_init_with_ddc(encoder->base.base.dev,
2739                                           &connector->base.base,
2740                                           &intel_sdvo_connector_funcs,
2741                                           connector->base.base.connector_type,
2742                                           ddc ? &ddc->ddc : NULL);
2743         if (ret < 0)
2744                 return ret;
2745
2746         drm_connector_helper_add(&connector->base.base,
2747                                  &intel_sdvo_connector_helper_funcs);
2748
2749         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2750         connector->base.base.interlace_allowed = true;
2751         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2752
2753         intel_connector_attach_encoder(&connector->base, &encoder->base);
2754
2755         if (ddc)
2756                 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] using %s\n",
2757                             connector->base.base.base.id, connector->base.base.name,
2758                             ddc->ddc.name);
2759
2760         return 0;
2761 }
2762
2763 static void
2764 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2765                                struct intel_sdvo_connector *connector)
2766 {
2767         intel_attach_force_audio_property(&connector->base.base);
2768         if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
2769                 intel_attach_broadcast_rgb_property(&connector->base.base);
2770         intel_attach_aspect_ratio_property(&connector->base.base);
2771 }
2772
2773 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2774 {
2775         struct intel_sdvo_connector *sdvo_connector;
2776         struct intel_sdvo_connector_state *conn_state;
2777
2778         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2779         if (!sdvo_connector)
2780                 return NULL;
2781
2782         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2783         if (!conn_state) {
2784                 kfree(sdvo_connector);
2785                 return NULL;
2786         }
2787
2788         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2789                                             &conn_state->base.base);
2790
2791         intel_panel_init_alloc(&sdvo_connector->base);
2792
2793         return sdvo_connector;
2794 }
2795
2796 static bool
2797 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)
2798 {
2799         struct drm_encoder *encoder = &intel_sdvo->base.base;
2800         struct drm_connector *connector;
2801         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2802         struct drm_i915_private *i915 = to_i915(intel_encoder->base.dev);
2803         struct intel_connector *intel_connector;
2804         struct intel_sdvo_connector *intel_sdvo_connector;
2805
2806         drm_dbg_kms(&i915->drm, "initialising DVI type 0x%x\n", type);
2807
2808         intel_sdvo_connector = intel_sdvo_connector_alloc();
2809         if (!intel_sdvo_connector)
2810                 return false;
2811
2812         intel_sdvo_connector->output_flag = type;
2813
2814         intel_connector = &intel_sdvo_connector->base;
2815         connector = &intel_connector->base;
2816         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2817             intel_sdvo_connector->output_flag) {
2818                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2819                 /*
2820                  * Some SDVO devices have one-shot hotplug interrupts.
2821                  * Ensure that they get re-enabled when an interrupt happens.
2822                  */
2823                 intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
2824                 intel_encoder->hotplug = intel_sdvo_hotplug;
2825                 intel_sdvo_enable_hotplug(intel_encoder);
2826         } else {
2827                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2828         }
2829         intel_connector->base.polled = intel_connector->polled;
2830         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2831         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2832
2833         if (intel_sdvo_is_hdmi_connector(intel_sdvo)) {
2834                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2835                 intel_sdvo_connector->is_hdmi = true;
2836         }
2837
2838         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2839                 kfree(intel_sdvo_connector);
2840                 return false;
2841         }
2842
2843         if (intel_sdvo_connector->is_hdmi)
2844                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2845
2846         return true;
2847 }
2848
2849 static bool
2850 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)
2851 {
2852         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
2853         struct drm_encoder *encoder = &intel_sdvo->base.base;
2854         struct drm_connector *connector;
2855         struct intel_connector *intel_connector;
2856         struct intel_sdvo_connector *intel_sdvo_connector;
2857
2858         drm_dbg_kms(&i915->drm, "initialising TV type 0x%x\n", type);
2859
2860         intel_sdvo_connector = intel_sdvo_connector_alloc();
2861         if (!intel_sdvo_connector)
2862                 return false;
2863
2864         intel_connector = &intel_sdvo_connector->base;
2865         connector = &intel_connector->base;
2866         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2867         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2868
2869         intel_sdvo_connector->output_flag = type;
2870
2871         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2872                 kfree(intel_sdvo_connector);
2873                 return false;
2874         }
2875
2876         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2877                 goto err;
2878
2879         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2880                 goto err;
2881
2882         return true;
2883
2884 err:
2885         intel_connector_destroy(connector);
2886         return false;
2887 }
2888
2889 static bool
2890 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, u16 type)
2891 {
2892         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
2893         struct drm_encoder *encoder = &intel_sdvo->base.base;
2894         struct drm_connector *connector;
2895         struct intel_connector *intel_connector;
2896         struct intel_sdvo_connector *intel_sdvo_connector;
2897
2898         drm_dbg_kms(&i915->drm, "initialising analog type 0x%x\n", type);
2899
2900         intel_sdvo_connector = intel_sdvo_connector_alloc();
2901         if (!intel_sdvo_connector)
2902                 return false;
2903
2904         intel_connector = &intel_sdvo_connector->base;
2905         connector = &intel_connector->base;
2906         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2907         intel_connector->base.polled = intel_connector->polled;
2908         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2909         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2910
2911         intel_sdvo_connector->output_flag = type;
2912
2913         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2914                 kfree(intel_sdvo_connector);
2915                 return false;
2916         }
2917
2918         return true;
2919 }
2920
2921 static bool
2922 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
2923 {
2924         struct intel_display *display = to_intel_display(&intel_sdvo->base);
2925         struct drm_encoder *encoder = &intel_sdvo->base.base;
2926         struct drm_i915_private *i915 = to_i915(encoder->dev);
2927         struct drm_connector *connector;
2928         struct intel_connector *intel_connector;
2929         struct intel_sdvo_connector *intel_sdvo_connector;
2930
2931         drm_dbg_kms(&i915->drm, "initialising LVDS type 0x%x\n", type);
2932
2933         intel_sdvo_connector = intel_sdvo_connector_alloc();
2934         if (!intel_sdvo_connector)
2935                 return false;
2936
2937         intel_connector = &intel_sdvo_connector->base;
2938         connector = &intel_connector->base;
2939         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2940         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2941
2942         intel_sdvo_connector->output_flag = type;
2943
2944         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2945                 kfree(intel_sdvo_connector);
2946                 return false;
2947         }
2948
2949         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2950                 goto err;
2951
2952         intel_bios_init_panel_late(display, &intel_connector->panel, NULL, NULL);
2953
2954         /*
2955          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2956          * SDVO->LVDS transcoders can't cope with the EDID mode.
2957          */
2958         intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
2959
2960         if (!intel_panel_preferred_fixed_mode(intel_connector)) {
2961                 mutex_lock(&i915->drm.mode_config.mutex);
2962
2963                 intel_ddc_get_modes(connector, connector->ddc);
2964                 intel_panel_add_edid_fixed_modes(intel_connector, false);
2965
2966                 mutex_unlock(&i915->drm.mode_config.mutex);
2967         }
2968
2969         intel_panel_init(intel_connector, NULL);
2970
2971         if (!intel_panel_preferred_fixed_mode(intel_connector))
2972                 goto err;
2973
2974         return true;
2975
2976 err:
2977         intel_connector_destroy(connector);
2978         return false;
2979 }
2980
2981 static u16 intel_sdvo_filter_output_flags(u16 flags)
2982 {
2983         flags &= SDVO_OUTPUT_MASK;
2984
2985         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2986         if (!(flags & SDVO_OUTPUT_TMDS0))
2987                 flags &= ~SDVO_OUTPUT_TMDS1;
2988
2989         if (!(flags & SDVO_OUTPUT_RGB0))
2990                 flags &= ~SDVO_OUTPUT_RGB1;
2991
2992         if (!(flags & SDVO_OUTPUT_LVDS0))
2993                 flags &= ~SDVO_OUTPUT_LVDS1;
2994
2995         return flags;
2996 }
2997
2998 static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type)
2999 {
3000         if (type & SDVO_TMDS_MASK)
3001                 return intel_sdvo_dvi_init(sdvo, type);
3002         else if (type & SDVO_TV_MASK)
3003                 return intel_sdvo_tv_init(sdvo, type);
3004         else if (type & SDVO_RGB_MASK)
3005                 return intel_sdvo_analog_init(sdvo, type);
3006         else if (type & SDVO_LVDS_MASK)
3007                 return intel_sdvo_lvds_init(sdvo, type);
3008         else
3009                 return false;
3010 }
3011
3012 static bool
3013 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
3014 {
3015         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
3016         static const u16 probe_order[] = {
3017                 SDVO_OUTPUT_TMDS0,
3018                 SDVO_OUTPUT_TMDS1,
3019                 /* TV has no XXX1 function block */
3020                 SDVO_OUTPUT_SVID0,
3021                 SDVO_OUTPUT_CVBS0,
3022                 SDVO_OUTPUT_YPRPB0,
3023                 SDVO_OUTPUT_RGB0,
3024                 SDVO_OUTPUT_RGB1,
3025                 SDVO_OUTPUT_LVDS0,
3026                 SDVO_OUTPUT_LVDS1,
3027         };
3028         u16 flags;
3029         int i;
3030
3031         flags = intel_sdvo_filter_output_flags(intel_sdvo->caps.output_flags);
3032
3033         if (flags == 0) {
3034                 drm_dbg_kms(&i915->drm,
3035                             "%s: Unknown SDVO output type (0x%04x)\n",
3036                             SDVO_NAME(intel_sdvo), intel_sdvo->caps.output_flags);
3037                 return false;
3038         }
3039
3040         for (i = 0; i < ARRAY_SIZE(probe_order); i++) {
3041                 u16 type = flags & probe_order[i];
3042
3043                 if (!type)
3044                         continue;
3045
3046                 if (!intel_sdvo_output_init(intel_sdvo, type))
3047                         return false;
3048         }
3049
3050         intel_sdvo->base.pipe_mask = ~0;
3051
3052         return true;
3053 }
3054
3055 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
3056 {
3057         struct drm_device *dev = intel_sdvo->base.base.dev;
3058         struct drm_connector *connector, *tmp;
3059
3060         list_for_each_entry_safe(connector, tmp,
3061                                  &dev->mode_config.connector_list, head) {
3062                 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) {
3063                         drm_connector_unregister(connector);
3064                         intel_connector_destroy(connector);
3065                 }
3066         }
3067 }
3068
3069 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
3070                                           struct intel_sdvo_connector *intel_sdvo_connector,
3071                                           int type)
3072 {
3073         struct drm_device *dev = intel_sdvo->base.base.dev;
3074         struct intel_sdvo_tv_format format;
3075         u32 format_map, i;
3076
3077         if (!intel_sdvo_set_target_output(intel_sdvo, type))
3078                 return false;
3079
3080         BUILD_BUG_ON(sizeof(format) != 6);
3081         if (!intel_sdvo_get_value(intel_sdvo,
3082                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
3083                                   &format, sizeof(format)))
3084                 return false;
3085
3086         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
3087
3088         if (format_map == 0)
3089                 return false;
3090
3091         intel_sdvo_connector->format_supported_num = 0;
3092         for (i = 0 ; i < TV_FORMAT_NUM; i++)
3093                 if (format_map & (1 << i))
3094                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
3095
3096
3097         intel_sdvo_connector->tv_format =
3098                 drm_property_create(dev, DRM_MODE_PROP_ENUM,
3099                                     "mode", intel_sdvo_connector->format_supported_num);
3100         if (!intel_sdvo_connector->tv_format)
3101                 return false;
3102
3103         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
3104                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
3105                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
3106
3107         intel_sdvo_connector->base.base.state->tv.legacy_mode = intel_sdvo_connector->tv_format_supported[0];
3108         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
3109                                    intel_sdvo_connector->tv_format, 0);
3110         return true;
3111
3112 }
3113
3114 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
3115         if (enhancements.name) { \
3116                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3117                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
3118                         return false; \
3119                 intel_sdvo_connector->name = \
3120                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3121                 if (!intel_sdvo_connector->name) return false; \
3122                 state_assignment = response; \
3123                 drm_object_attach_property(&connector->base, \
3124                                            intel_sdvo_connector->name, 0); \
3125                 drm_dbg_kms(dev, #name ": max %d, default %d, current %d\n", \
3126                             data_value[0], data_value[1], response); \
3127         } \
3128 } while (0)
3129
3130 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
3131
3132 static bool
3133 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
3134                                       struct intel_sdvo_connector *intel_sdvo_connector,
3135                                       struct intel_sdvo_enhancements_reply enhancements)
3136 {
3137         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
3138         struct drm_device *dev = intel_sdvo->base.base.dev;
3139         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3140         struct drm_connector_state *conn_state = connector->state;
3141         struct intel_sdvo_connector_state *sdvo_state =
3142                 to_intel_sdvo_connector_state(conn_state);
3143         u16 response, data_value[2];
3144
3145         /* when horizontal overscan is supported, Add the left/right property */
3146         if (enhancements.overscan_h) {
3147                 if (!intel_sdvo_get_value(intel_sdvo,
3148                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
3149                                           &data_value, 4))
3150                         return false;
3151
3152                 if (!intel_sdvo_get_value(intel_sdvo,
3153                                           SDVO_CMD_GET_OVERSCAN_H,
3154                                           &response, 2))
3155                         return false;
3156
3157                 sdvo_state->tv.overscan_h = response;
3158
3159                 intel_sdvo_connector->max_hscan = data_value[0];
3160                 intel_sdvo_connector->left =
3161                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
3162                 if (!intel_sdvo_connector->left)
3163                         return false;
3164
3165                 drm_object_attach_property(&connector->base,
3166                                            intel_sdvo_connector->left, 0);
3167
3168                 intel_sdvo_connector->right =
3169                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
3170                 if (!intel_sdvo_connector->right)
3171                         return false;
3172
3173                 drm_object_attach_property(&connector->base,
3174                                            intel_sdvo_connector->right, 0);
3175                 drm_dbg_kms(&i915->drm, "h_overscan: max %d, default %d, current %d\n",
3176                             data_value[0], data_value[1], response);
3177         }
3178
3179         if (enhancements.overscan_v) {
3180                 if (!intel_sdvo_get_value(intel_sdvo,
3181                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
3182                                           &data_value, 4))
3183                         return false;
3184
3185                 if (!intel_sdvo_get_value(intel_sdvo,
3186                                           SDVO_CMD_GET_OVERSCAN_V,
3187                                           &response, 2))
3188                         return false;
3189
3190                 sdvo_state->tv.overscan_v = response;
3191
3192                 intel_sdvo_connector->max_vscan = data_value[0];
3193                 intel_sdvo_connector->top =
3194                         drm_property_create_range(dev, 0,
3195                                                   "top_margin", 0, data_value[0]);
3196                 if (!intel_sdvo_connector->top)
3197                         return false;
3198
3199                 drm_object_attach_property(&connector->base,
3200                                            intel_sdvo_connector->top, 0);
3201
3202                 intel_sdvo_connector->bottom =
3203                         drm_property_create_range(dev, 0,
3204                                                   "bottom_margin", 0, data_value[0]);
3205                 if (!intel_sdvo_connector->bottom)
3206                         return false;
3207
3208                 drm_object_attach_property(&connector->base,
3209                                            intel_sdvo_connector->bottom, 0);
3210                 drm_dbg_kms(&i915->drm, "v_overscan: max %d, default %d, current %d\n",
3211                             data_value[0], data_value[1], response);
3212         }
3213
3214         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3215         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3216         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3217         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3218         ENHANCEMENT(&conn_state->tv, hue, HUE);
3219         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3220         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3221         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3222         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3223         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3224         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3225         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3226
3227         if (enhancements.dot_crawl) {
3228                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3229                         return false;
3230
3231                 sdvo_state->tv.dot_crawl = response & 0x1;
3232                 intel_sdvo_connector->dot_crawl =
3233                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3234                 if (!intel_sdvo_connector->dot_crawl)
3235                         return false;
3236
3237                 drm_object_attach_property(&connector->base,
3238                                            intel_sdvo_connector->dot_crawl, 0);
3239                 drm_dbg_kms(&i915->drm, "dot crawl: current %d\n", response);
3240         }
3241
3242         return true;
3243 }
3244
3245 static bool
3246 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3247                                         struct intel_sdvo_connector *intel_sdvo_connector,
3248                                         struct intel_sdvo_enhancements_reply enhancements)
3249 {
3250         struct drm_device *dev = intel_sdvo->base.base.dev;
3251         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3252         u16 response, data_value[2];
3253
3254         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3255
3256         return true;
3257 }
3258 #undef ENHANCEMENT
3259 #undef _ENHANCEMENT
3260
3261 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3262                                                struct intel_sdvo_connector *intel_sdvo_connector)
3263 {
3264         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
3265         union {
3266                 struct intel_sdvo_enhancements_reply reply;
3267                 u16 response;
3268         } enhancements;
3269
3270         BUILD_BUG_ON(sizeof(enhancements) != 2);
3271
3272         if (!intel_sdvo_get_value(intel_sdvo,
3273                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3274                                   &enhancements, sizeof(enhancements)) ||
3275             enhancements.response == 0) {
3276                 drm_dbg_kms(&i915->drm, "No enhancement is supported\n");
3277                 return true;
3278         }
3279
3280         if (IS_TV(intel_sdvo_connector))
3281                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3282         else if (IS_LVDS(intel_sdvo_connector))
3283                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3284         else
3285                 return true;
3286 }
3287
3288 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3289                                      struct i2c_msg *msgs,
3290                                      int num)
3291 {
3292         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3293         struct intel_sdvo *sdvo = ddc->sdvo;
3294
3295         if (!__intel_sdvo_set_control_bus_switch(sdvo, 1 << ddc->ddc_bus))
3296                 return -EIO;
3297
3298         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3299 }
3300
3301 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3302 {
3303         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3304         struct intel_sdvo *sdvo = ddc->sdvo;
3305
3306         return sdvo->i2c->algo->functionality(sdvo->i2c);
3307 }
3308
3309 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3310         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3311         .functionality  = intel_sdvo_ddc_proxy_func
3312 };
3313
3314 static void proxy_lock_bus(struct i2c_adapter *adapter,
3315                            unsigned int flags)
3316 {
3317         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3318         struct intel_sdvo *sdvo = ddc->sdvo;
3319
3320         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3321 }
3322
3323 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3324                              unsigned int flags)
3325 {
3326         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3327         struct intel_sdvo *sdvo = ddc->sdvo;
3328
3329         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3330 }
3331
3332 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3333                              unsigned int flags)
3334 {
3335         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3336         struct intel_sdvo *sdvo = ddc->sdvo;
3337
3338         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3339 }
3340
3341 static const struct i2c_lock_operations proxy_lock_ops = {
3342         .lock_bus =    proxy_lock_bus,
3343         .trylock_bus = proxy_trylock_bus,
3344         .unlock_bus =  proxy_unlock_bus,
3345 };
3346
3347 static int
3348 intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
3349                           struct intel_sdvo *sdvo, int ddc_bus)
3350 {
3351         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
3352         struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
3353
3354         ddc->sdvo = sdvo;
3355         ddc->ddc_bus = ddc_bus;
3356
3357         ddc->ddc.owner = THIS_MODULE;
3358         snprintf(ddc->ddc.name, I2C_NAME_SIZE, "SDVO %c DDC%d",
3359                  port_name(sdvo->base.port), ddc_bus);
3360         ddc->ddc.dev.parent = &pdev->dev;
3361         ddc->ddc.algo_data = ddc;
3362         ddc->ddc.algo = &intel_sdvo_ddc_proxy;
3363         ddc->ddc.lock_ops = &proxy_lock_ops;
3364
3365         return i2c_add_adapter(&ddc->ddc);
3366 }
3367
3368 static bool is_sdvo_port_valid(struct drm_i915_private *dev_priv, enum port port)
3369 {
3370         if (HAS_PCH_SPLIT(dev_priv))
3371                 return port == PORT_B;
3372         else
3373                 return port == PORT_B || port == PORT_C;
3374 }
3375
3376 static bool assert_sdvo_port_valid(struct drm_i915_private *dev_priv,
3377                                    enum port port)
3378 {
3379         return !drm_WARN(&dev_priv->drm, !is_sdvo_port_valid(dev_priv, port),
3380                          "Platform does not support SDVO %c\n", port_name(port));
3381 }
3382
3383 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3384                      i915_reg_t sdvo_reg, enum port port)
3385 {
3386         struct intel_encoder *intel_encoder;
3387         struct intel_sdvo *intel_sdvo;
3388         int i;
3389
3390         if (!assert_port_valid(dev_priv, port))
3391                 return false;
3392
3393         if (!assert_sdvo_port_valid(dev_priv, port))
3394                 return false;
3395
3396         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3397         if (!intel_sdvo)
3398                 return false;
3399
3400         /* encoder type will be decided later */
3401         intel_encoder = &intel_sdvo->base;
3402         intel_encoder->type = INTEL_OUTPUT_SDVO;
3403         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3404         intel_encoder->port = port;
3405
3406         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3407                          &intel_sdvo_enc_funcs, 0,
3408                          "SDVO %c", port_name(port));
3409
3410         intel_sdvo->sdvo_reg = sdvo_reg;
3411         intel_sdvo->target_addr = intel_sdvo_get_target_addr(intel_sdvo) >> 1;
3412
3413         intel_sdvo_select_i2c_bus(intel_sdvo);
3414
3415         /* Read the regs to test if we can talk to the device */
3416         for (i = 0; i < 0x40; i++) {
3417                 u8 byte;
3418
3419                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3420                         drm_dbg_kms(&dev_priv->drm,
3421                                     "No SDVO device found on %s\n",
3422                                     SDVO_NAME(intel_sdvo));
3423                         goto err;
3424                 }
3425         }
3426
3427         intel_encoder->compute_config = intel_sdvo_compute_config;
3428         if (HAS_PCH_SPLIT(dev_priv)) {
3429                 intel_encoder->disable = pch_disable_sdvo;
3430                 intel_encoder->post_disable = pch_post_disable_sdvo;
3431         } else {
3432                 intel_encoder->disable = intel_disable_sdvo;
3433         }
3434         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3435         intel_encoder->enable = intel_enable_sdvo;
3436         intel_encoder->audio_enable = intel_sdvo_enable_audio;
3437         intel_encoder->audio_disable = intel_sdvo_disable_audio;
3438         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3439         intel_encoder->get_config = intel_sdvo_get_config;
3440
3441         /* In default case sdvo lvds is false */
3442         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3443                 goto err;
3444
3445         intel_sdvo->colorimetry_cap =
3446                 intel_sdvo_get_colorimetry_cap(intel_sdvo);
3447
3448         for (i = 0; i < ARRAY_SIZE(intel_sdvo->ddc); i++) {
3449                 int ret;
3450
3451                 ret = intel_sdvo_init_ddc_proxy(&intel_sdvo->ddc[i],
3452                                                 intel_sdvo, i + 1);
3453                 if (ret)
3454                         goto err;
3455         }
3456
3457         if (!intel_sdvo_output_setup(intel_sdvo)) {
3458                 drm_dbg_kms(&dev_priv->drm,
3459                             "SDVO output failed to setup on %s\n",
3460                             SDVO_NAME(intel_sdvo));
3461                 /* Output_setup can leave behind connectors! */
3462                 goto err_output;
3463         }
3464
3465         /*
3466          * Only enable the hotplug irq if we need it, to work around noisy
3467          * hotplug lines.
3468          */
3469         if (intel_sdvo->hotplug_active) {
3470                 if (intel_sdvo->base.port == PORT_B)
3471                         intel_encoder->hpd_pin = HPD_SDVO_B;
3472                 else
3473                         intel_encoder->hpd_pin = HPD_SDVO_C;
3474         }
3475
3476         /*
3477          * Cloning SDVO with anything is often impossible, since the SDVO
3478          * encoder can request a special input timing mode. And even if that's
3479          * not the case we have evidence that cloning a plain unscaled mode with
3480          * VGA doesn't really work. Furthermore the cloning flags are way too
3481          * simplistic anyway to express such constraints, so just give up on
3482          * cloning for SDVO encoders.
3483          */
3484         intel_sdvo->base.cloneable = 0;
3485
3486         /* Set the input timing to the screen. Assume always input 0. */
3487         if (!intel_sdvo_set_target_input(intel_sdvo))
3488                 goto err_output;
3489
3490         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3491                                                     &intel_sdvo->pixel_clock_min,
3492                                                     &intel_sdvo->pixel_clock_max))
3493                 goto err_output;
3494
3495         drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, "
3496                     "clock range %dMHz - %dMHz, "
3497                     "num inputs: %d, "
3498                     "output 1: %c, output 2: %c\n",
3499                     SDVO_NAME(intel_sdvo),
3500                     intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3501                     intel_sdvo->caps.device_rev_id,
3502                     intel_sdvo->pixel_clock_min / 1000,
3503                     intel_sdvo->pixel_clock_max / 1000,
3504                     intel_sdvo->caps.sdvo_num_inputs,
3505                     /* check currently supported outputs */
3506                     intel_sdvo->caps.output_flags &
3507                     (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0 |
3508                      SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_SVID0 |
3509                      SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_YPRPB0) ? 'Y' : 'N',
3510                     intel_sdvo->caps.output_flags &
3511                     (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1 |
3512                      SDVO_OUTPUT_LVDS1) ? 'Y' : 'N');
3513         return true;
3514
3515 err_output:
3516         intel_sdvo_output_cleanup(intel_sdvo);
3517 err:
3518         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3519         intel_sdvo_encoder_destroy(&intel_encoder->base);
3520
3521         return false;
3522 }