1 // SPDX-License-Identifier: MIT
3 * Copyright © 2022-2023 Intel Corporation
5 * High level display driver entry points. This is a layer between top level
6 * driver code and low level display functionality; no low level display code or
10 #include <linux/vga_switcheroo.h>
11 #include <acpi/video.h>
12 #include <drm/display/drm_dp_mst_helper.h>
13 #include <drm/drm_atomic_helper.h>
14 #include <drm/drm_client_event.h>
15 #include <drm/drm_mode_config.h>
16 #include <drm/drm_privacy_screen_consumer.h>
17 #include <drm/drm_probe_helper.h>
18 #include <drm/drm_vblank.h>
22 #include "intel_acpi.h"
23 #include "intel_atomic.h"
24 #include "intel_audio.h"
25 #include "intel_bios.h"
27 #include "intel_cdclk.h"
28 #include "intel_color.h"
29 #include "intel_crtc.h"
30 #include "intel_display_debugfs.h"
31 #include "intel_display_driver.h"
32 #include "intel_display_irq.h"
33 #include "intel_display_power.h"
34 #include "intel_display_types.h"
35 #include "intel_display_wa.h"
36 #include "intel_dkl_phy.h"
37 #include "intel_dmc.h"
39 #include "intel_dp_tunnel.h"
40 #include "intel_dpll.h"
41 #include "intel_dpll_mgr.h"
43 #include "intel_fbc.h"
44 #include "intel_fbdev.h"
45 #include "intel_fdi.h"
46 #include "intel_gmbus.h"
47 #include "intel_hdcp.h"
48 #include "intel_hotplug.h"
49 #include "intel_hti.h"
50 #include "intel_modeset_lock.h"
51 #include "intel_modeset_setup.h"
52 #include "intel_opregion.h"
53 #include "intel_overlay.h"
54 #include "intel_plane_initial.h"
55 #include "intel_pmdemand.h"
56 #include "intel_pps.h"
57 #include "intel_quirks.h"
58 #include "intel_vga.h"
60 #include "skl_watermark.h"
62 bool intel_display_driver_probe_defer(struct pci_dev *pdev)
64 struct drm_privacy_screen *privacy_screen;
67 * apple-gmux is needed on dual GPU MacBook Pro
68 * to probe the panel if we're the inactive GPU.
70 if (vga_switcheroo_client_probe_defer(pdev))
73 /* If the LCD panel has a privacy-screen, wait for it */
74 privacy_screen = drm_privacy_screen_get(&pdev->dev, NULL);
75 if (IS_ERR(privacy_screen) && PTR_ERR(privacy_screen) == -EPROBE_DEFER)
78 drm_privacy_screen_put(privacy_screen);
83 void intel_display_driver_init_hw(struct drm_i915_private *i915)
85 struct intel_display *display = &i915->display;
86 struct intel_cdclk_state *cdclk_state;
88 if (!HAS_DISPLAY(i915))
91 cdclk_state = to_intel_cdclk_state(display->cdclk.obj.state);
93 intel_update_cdclk(display);
94 intel_cdclk_dump_config(display, &display->cdclk.hw, "Current CDCLK");
95 cdclk_state->logical = cdclk_state->actual = display->cdclk.hw;
97 intel_display_wa_apply(i915);
100 static const struct drm_mode_config_funcs intel_mode_funcs = {
101 .fb_create = intel_user_framebuffer_create,
102 .get_format_info = intel_fb_get_format_info,
103 .mode_valid = intel_mode_valid,
104 .atomic_check = intel_atomic_check,
105 .atomic_commit = intel_atomic_commit,
106 .atomic_state_alloc = intel_atomic_state_alloc,
107 .atomic_state_clear = intel_atomic_state_clear,
108 .atomic_state_free = intel_atomic_state_free,
111 static const struct drm_mode_config_helper_funcs intel_mode_config_funcs = {
112 .atomic_commit_setup = drm_dp_mst_atomic_setup_commit,
115 static void intel_mode_config_init(struct drm_i915_private *i915)
117 struct drm_mode_config *mode_config = &i915->drm.mode_config;
119 drm_mode_config_init(&i915->drm);
120 INIT_LIST_HEAD(&i915->display.global.obj_list);
122 mode_config->min_width = 0;
123 mode_config->min_height = 0;
125 mode_config->preferred_depth = 24;
126 mode_config->prefer_shadow = 1;
128 mode_config->funcs = &intel_mode_funcs;
129 mode_config->helper_private = &intel_mode_config_funcs;
131 mode_config->async_page_flip = HAS_ASYNC_FLIPS(i915);
134 * Maximum framebuffer dimensions, chosen to match
135 * the maximum render engine surface size on gen4+.
137 if (DISPLAY_VER(i915) >= 7) {
138 mode_config->max_width = 16384;
139 mode_config->max_height = 16384;
140 } else if (DISPLAY_VER(i915) >= 4) {
141 mode_config->max_width = 8192;
142 mode_config->max_height = 8192;
143 } else if (DISPLAY_VER(i915) == 3) {
144 mode_config->max_width = 4096;
145 mode_config->max_height = 4096;
147 mode_config->max_width = 2048;
148 mode_config->max_height = 2048;
151 if (IS_I845G(i915) || IS_I865G(i915)) {
152 mode_config->cursor_width = IS_I845G(i915) ? 64 : 512;
153 mode_config->cursor_height = 1023;
154 } else if (IS_I830(i915) || IS_I85X(i915) ||
155 IS_I915G(i915) || IS_I915GM(i915)) {
156 mode_config->cursor_width = 64;
157 mode_config->cursor_height = 64;
159 mode_config->cursor_width = 256;
160 mode_config->cursor_height = 256;
164 static void intel_mode_config_cleanup(struct drm_i915_private *i915)
166 intel_atomic_global_obj_cleanup(i915);
167 drm_mode_config_cleanup(&i915->drm);
170 static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
172 struct intel_display *display = &dev_priv->display;
173 struct intel_plane *plane;
175 for_each_intel_plane(&dev_priv->drm, plane) {
176 struct intel_crtc *crtc = intel_crtc_for_pipe(display,
179 plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
183 void intel_display_driver_early_probe(struct drm_i915_private *i915)
185 if (!HAS_DISPLAY(i915))
188 spin_lock_init(&i915->display.fb_tracking.lock);
189 mutex_init(&i915->display.backlight.lock);
190 mutex_init(&i915->display.audio.mutex);
191 mutex_init(&i915->display.wm.wm_mutex);
192 mutex_init(&i915->display.pps.mutex);
193 mutex_init(&i915->display.hdcp.hdcp_mutex);
195 intel_display_irq_init(i915);
196 intel_dkl_phy_init(i915);
197 intel_color_init_hooks(&i915->display);
198 intel_init_cdclk_hooks(&i915->display);
199 intel_audio_hooks_init(i915);
200 intel_dpll_init_clock_hook(i915);
201 intel_init_display_hooks(i915);
202 intel_fdi_init_hook(i915);
203 intel_dmc_wl_init(&i915->display);
206 /* part #1: call before irq install */
207 int intel_display_driver_probe_noirq(struct drm_i915_private *i915)
209 struct intel_display *display = &i915->display;
212 if (i915_inject_probe_failure(i915))
215 if (HAS_DISPLAY(i915)) {
216 ret = drm_vblank_init(&i915->drm,
217 INTEL_NUM_PIPES(i915));
222 intel_bios_init(display);
224 ret = intel_vga_register(display);
228 /* FIXME: completely on the wrong abstraction layer */
229 ret = intel_power_domains_init(i915);
233 intel_pmdemand_init_early(i915);
235 intel_power_domains_init_hw(i915, false);
237 if (!HAS_DISPLAY(i915))
240 intel_dmc_init(display);
242 i915->display.wq.modeset = alloc_ordered_workqueue("i915_modeset", 0);
243 i915->display.wq.flip = alloc_workqueue("i915_flip", WQ_HIGHPRI |
244 WQ_UNBOUND, WQ_UNBOUND_MAX_ACTIVE);
246 intel_mode_config_init(i915);
248 ret = intel_cdclk_init(display);
250 goto cleanup_vga_client_pw_domain_dmc;
252 ret = intel_color_init(display);
254 goto cleanup_vga_client_pw_domain_dmc;
256 ret = intel_dbuf_init(i915);
258 goto cleanup_vga_client_pw_domain_dmc;
260 ret = intel_bw_init(i915);
262 goto cleanup_vga_client_pw_domain_dmc;
264 ret = intel_pmdemand_init(i915);
266 goto cleanup_vga_client_pw_domain_dmc;
268 intel_init_quirks(display);
270 intel_fbc_init(display);
274 cleanup_vga_client_pw_domain_dmc:
275 intel_dmc_fini(display);
276 intel_power_domains_driver_remove(i915);
278 intel_vga_unregister(display);
280 intel_bios_driver_remove(display);
285 static void set_display_access(struct drm_i915_private *i915,
286 bool any_task_allowed,
287 struct task_struct *allowed_task)
289 struct drm_modeset_acquire_ctx ctx;
292 intel_modeset_lock_ctx_retry(&ctx, NULL, 0, err) {
293 err = drm_modeset_lock_all_ctx(&i915->drm, &ctx);
297 i915->display.access.any_task_allowed = any_task_allowed;
298 i915->display.access.allowed_task = allowed_task;
301 drm_WARN_ON(&i915->drm, err);
305 * intel_display_driver_enable_user_access - Enable display HW access for all threads
306 * @i915: i915 device instance
308 * Enable the display HW access for all threads. Examples for such accesses
309 * are modeset commits and connector probing.
311 * This function should be called during driver loading and system resume once
312 * all the HW initialization steps are done.
314 void intel_display_driver_enable_user_access(struct drm_i915_private *i915)
316 set_display_access(i915, true, NULL);
318 intel_hpd_enable_detection_work(i915);
322 * intel_display_driver_disable_user_access - Disable display HW access for user threads
323 * @i915: i915 device instance
325 * Disable the display HW access for user threads. Examples for such accesses
326 * are modeset commits and connector probing. For the current thread the
327 * access is still enabled, which should only perform HW init/deinit
328 * programming (as the initial modeset during driver loading or the disabling
329 * modeset during driver unloading and system suspend/shutdown). This function
330 * should be followed by calling either intel_display_driver_enable_user_access()
331 * after completing the HW init programming or
332 * intel_display_driver_suspend_access() after completing the HW deinit
335 * This function should be called during driver loading/unloading and system
336 * suspend/shutdown before starting the HW init/deinit programming.
338 void intel_display_driver_disable_user_access(struct drm_i915_private *i915)
340 intel_hpd_disable_detection_work(i915);
342 set_display_access(i915, false, current);
346 * intel_display_driver_suspend_access - Suspend display HW access for all threads
347 * @i915: i915 device instance
349 * Disable the display HW access for all threads. Examples for such accesses
350 * are modeset commits and connector probing. This call should be either
351 * followed by calling intel_display_driver_resume_access(), or the driver
352 * should be unloaded/shutdown.
354 * This function should be called during driver unloading and system
355 * suspend/shutdown after completing the HW deinit programming.
357 void intel_display_driver_suspend_access(struct drm_i915_private *i915)
359 set_display_access(i915, false, NULL);
363 * intel_display_driver_resume_access - Resume display HW access for the resume thread
364 * @i915: i915 device instance
366 * Enable the display HW access for the current resume thread, keeping the
367 * access disabled for all other (user) threads. Examples for such accesses
368 * are modeset commits and connector probing. The resume thread should only
369 * perform HW init programming (as the restoring modeset). This function
370 * should be followed by calling intel_display_driver_enable_user_access(),
371 * after completing the HW init programming steps.
373 * This function should be called during system resume before starting the HW
376 void intel_display_driver_resume_access(struct drm_i915_private *i915)
378 set_display_access(i915, false, current);
382 * intel_display_driver_check_access - Check if the current thread has disaplay HW access
383 * @i915: i915 device instance
385 * Check whether the current thread has display HW access, print a debug
386 * message if it doesn't. Such accesses are modeset commits and connector
387 * probing. If the function returns %false any HW access should be prevented.
389 * Returns %true if the current thread has display HW access, %false
392 bool intel_display_driver_check_access(struct drm_i915_private *i915)
394 char comm[TASK_COMM_LEN];
395 char current_task[TASK_COMM_LEN + 16];
396 char allowed_task[TASK_COMM_LEN + 16] = "none";
398 if (i915->display.access.any_task_allowed ||
399 i915->display.access.allowed_task == current)
402 snprintf(current_task, sizeof(current_task), "%s[%d]",
403 get_task_comm(comm, current),
404 task_pid_vnr(current));
406 if (i915->display.access.allowed_task)
407 snprintf(allowed_task, sizeof(allowed_task), "%s[%d]",
408 get_task_comm(comm, i915->display.access.allowed_task),
409 task_pid_vnr(i915->display.access.allowed_task));
411 drm_dbg_kms(&i915->drm,
412 "Reject display access from task %s (allowed to %s)\n",
413 current_task, allowed_task);
418 /* part #2: call after irq install, but before gem init */
419 int intel_display_driver_probe_nogem(struct drm_i915_private *i915)
421 struct intel_display *display = &i915->display;
422 struct drm_device *dev = display->drm;
426 if (!HAS_DISPLAY(i915))
431 intel_panel_sanitize_ssc(i915);
433 intel_pps_setup(display);
435 intel_gmbus_setup(display);
437 drm_dbg_kms(&i915->drm, "%d display pipe%s available.\n",
438 INTEL_NUM_PIPES(i915),
439 INTEL_NUM_PIPES(i915) > 1 ? "s" : "");
441 for_each_pipe(i915, pipe) {
442 ret = intel_crtc_init(i915, pipe);
444 goto err_mode_config;
447 intel_plane_possible_crtcs_init(i915);
448 intel_shared_dpll_init(i915);
449 intel_fdi_pll_freq_update(i915);
451 intel_update_czclk(i915);
452 intel_display_driver_init_hw(i915);
453 intel_dpll_update_ref_clks(i915);
455 if (display->cdclk.max_cdclk_freq == 0)
456 intel_update_max_cdclk(display);
458 intel_hti_init(display);
460 /* Just disable it once at startup */
461 intel_vga_disable(display);
462 intel_setup_outputs(i915);
464 ret = intel_dp_tunnel_mgr_init(display);
468 intel_display_driver_disable_user_access(i915);
470 drm_modeset_lock_all(dev);
471 intel_modeset_setup_hw_state(i915, dev->mode_config.acquire_ctx);
472 intel_acpi_assign_connector_fwnodes(display);
473 drm_modeset_unlock_all(dev);
475 intel_initial_plane_config(i915);
478 * Make sure hardware watermarks really match the state we read out.
479 * Note that we need to do this after reconstructing the BIOS fb's
480 * since the watermark calculation done here will use pstate->fb.
483 ilk_wm_sanitize(i915);
488 intel_hdcp_component_fini(display);
490 intel_mode_config_cleanup(i915);
495 /* part #3: call after gem init */
496 int intel_display_driver_probe(struct drm_i915_private *i915)
498 struct intel_display *display = &i915->display;
501 if (!HAS_DISPLAY(i915))
505 * This will bind stuff into ggtt, so it needs to be done after
506 * the BIOS fb takeover and whatever else magic ggtt reservations
507 * happen during gem/ggtt init.
509 intel_hdcp_component_init(display);
512 * Force all active planes to recompute their states. So that on
513 * mode_setcrtc after probe, all the intel_plane_state variables
514 * are already calculated and there is no assert_plane warnings
517 ret = intel_initial_commit(&i915->drm);
519 drm_dbg_kms(&i915->drm, "Initial modeset failed, %d\n", ret);
521 intel_overlay_setup(i915);
523 /* Only enable hotplug handling once the fbdev is fully set up. */
524 intel_hpd_init(i915);
526 skl_watermark_ipc_init(i915);
531 void intel_display_driver_register(struct drm_i915_private *i915)
533 struct intel_display *display = &i915->display;
534 struct drm_printer p = drm_dbg_printer(&i915->drm, DRM_UT_KMS,
535 "i915 display info:");
537 if (!HAS_DISPLAY(i915))
540 /* Must be done after probing outputs */
541 intel_opregion_register(display);
542 intel_acpi_video_register(display);
544 intel_audio_init(i915);
546 intel_display_driver_enable_user_access(i915);
548 intel_audio_register(i915);
550 intel_display_debugfs_register(i915);
553 * We need to coordinate the hotplugs with the asynchronous
554 * fbdev configuration, for which we use the
555 * fbdev->async_cookie.
557 drm_kms_helper_poll_init(&i915->drm);
558 intel_hpd_poll_disable(i915);
560 intel_fbdev_setup(i915);
562 intel_display_device_info_print(DISPLAY_INFO(i915),
563 DISPLAY_RUNTIME_INFO(i915), &p);
566 /* part #1: call before irq uninstall */
567 void intel_display_driver_remove(struct drm_i915_private *i915)
569 if (!HAS_DISPLAY(i915))
572 flush_workqueue(i915->display.wq.flip);
573 flush_workqueue(i915->display.wq.modeset);
576 * MST topology needs to be suspended so we don't have any calls to
577 * fbdev after it's finalized. MST will be destroyed later as part of
578 * drm_mode_config_cleanup()
580 intel_dp_mst_suspend(i915);
583 /* part #2: call after irq uninstall */
584 void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
586 struct intel_display *display = &i915->display;
588 if (!HAS_DISPLAY(i915))
591 intel_display_driver_suspend_access(i915);
594 * Due to the hpd irq storm handling the hotplug work can re-arm the
595 * poll handlers. Hence disable polling after hpd handling is shut down.
597 intel_hpd_poll_fini(i915);
599 intel_unregister_dsm_handler();
601 /* flush any delayed tasks or pending work */
602 flush_workqueue(i915->unordered_wq);
604 intel_hdcp_component_fini(display);
606 intel_mode_config_cleanup(i915);
608 intel_dp_tunnel_mgr_cleanup(display);
610 intel_overlay_cleanup(i915);
612 intel_gmbus_teardown(display);
614 destroy_workqueue(i915->display.wq.flip);
615 destroy_workqueue(i915->display.wq.modeset);
617 intel_fbc_cleanup(&i915->display);
620 /* part #3: call after gem init */
621 void intel_display_driver_remove_nogem(struct drm_i915_private *i915)
623 struct intel_display *display = &i915->display;
625 intel_dmc_fini(display);
627 intel_power_domains_driver_remove(i915);
629 intel_vga_unregister(display);
631 intel_bios_driver_remove(display);
634 void intel_display_driver_unregister(struct drm_i915_private *i915)
636 struct intel_display *display = &i915->display;
638 if (!HAS_DISPLAY(i915))
641 drm_client_dev_unregister(&i915->drm);
644 * After flushing the fbdev (incl. a late async config which
645 * will have delayed queuing of a hotplug event), then flush
646 * the hotplug events.
648 drm_kms_helper_poll_fini(&i915->drm);
650 intel_display_driver_disable_user_access(i915);
652 intel_audio_deinit(i915);
654 drm_atomic_helper_shutdown(&i915->drm);
656 acpi_video_unregister();
657 intel_opregion_unregister(display);
661 * turn all crtc's off, but do not adjust state
662 * This has to be paired with a call to intel_modeset_setup_hw_state.
664 int intel_display_driver_suspend(struct drm_i915_private *i915)
666 struct drm_atomic_state *state;
669 if (!HAS_DISPLAY(i915))
672 state = drm_atomic_helper_suspend(&i915->drm);
673 ret = PTR_ERR_OR_ZERO(state);
675 drm_err(&i915->drm, "Suspending crtc's failed with %i\n",
678 i915->display.restore.modeset_state = state;
683 __intel_display_driver_resume(struct drm_i915_private *i915,
684 struct drm_atomic_state *state,
685 struct drm_modeset_acquire_ctx *ctx)
687 struct intel_display *display = &i915->display;
688 struct drm_crtc_state *crtc_state;
689 struct drm_crtc *crtc;
692 intel_modeset_setup_hw_state(i915, ctx);
693 intel_vga_redisable(display);
699 * We've duplicated the state, pointers to the old state are invalid.
701 * Don't attempt to use the old state until we commit the duplicated state.
703 for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
705 * Force recalculation even if we restore
706 * current state. With fast modeset this may not result
707 * in a modeset when the state is compatible.
709 crtc_state->mode_changed = true;
712 /* ignore any reset values/BIOS leftovers in the WM registers */
714 to_intel_atomic_state(state)->skip_intermediate_wm = true;
716 ret = drm_atomic_helper_commit_duplicated_state(state, ctx);
718 drm_WARN_ON(&i915->drm, ret == -EDEADLK);
723 void intel_display_driver_resume(struct drm_i915_private *i915)
725 struct drm_atomic_state *state = i915->display.restore.modeset_state;
726 struct drm_modeset_acquire_ctx ctx;
729 if (!HAS_DISPLAY(i915))
732 i915->display.restore.modeset_state = NULL;
734 state->acquire_ctx = &ctx;
736 drm_modeset_acquire_init(&ctx, 0);
739 ret = drm_modeset_lock_all_ctx(&i915->drm, &ctx);
743 drm_modeset_backoff(&ctx);
747 ret = __intel_display_driver_resume(i915, state, &ctx);
749 skl_watermark_ipc_update(i915);
750 drm_modeset_drop_locks(&ctx);
751 drm_modeset_acquire_fini(&ctx);
755 "Restoring old state failed with %i\n", ret);
757 drm_atomic_state_put(state);