1 if ARCH_MXC || COMPILE_TEST
3 config DRM_IMX_LDB_HELPER
6 config DRM_IMX_LEGACY_BRIDGE
10 This is a DRM bridge implementation for the DRM i.MX IPUv3 driver,
11 that uses of_get_drm_display_mode to acquire display mode.
13 Newer designs should not use this bridge and should use proper panel
16 config DRM_IMX8MP_DW_HDMI_BRIDGE
17 tristate "Freescale i.MX8MP HDMI-TX bridge support"
21 imply DRM_IMX8MP_HDMI_PVI
22 imply PHY_FSL_SAMSUNG_HDMI_PHY
24 Choose this to enable support for the internal HDMI encoder found
27 config DRM_IMX8MP_HDMI_PVI
28 tristate "Freescale i.MX8MP HDMI PVI bridge support"
31 Choose this to enable support for the internal HDMI TX Parallel
32 Video Interface found on the Freescale i.MX8MP SoC.
35 tristate "Freescale i.MX8QM LVDS display bridge"
38 select DRM_IMX_LDB_HELPER
41 Choose this to enable the internal LVDS Display Bridge(LDB) found in
42 Freescale i.MX8qm processor. Official name of LDB is pixel mapper.
44 config DRM_IMX8QXP_LDB
45 tristate "Freescale i.MX8QXP LVDS display bridge"
48 select DRM_IMX_LDB_HELPER
51 Choose this to enable the internal LVDS Display Bridge(LDB) found in
52 Freescale i.MX8qxp processor. Official name of LDB is pixel mapper.
54 config DRM_IMX8QXP_PIXEL_COMBINER
55 tristate "Freescale i.MX8QM/QXP pixel combiner"
60 Choose this to enable pixel combiner found in
61 Freescale i.MX8qm/qxp processors.
63 config DRM_IMX8QXP_PIXEL_LINK
64 tristate "Freescale i.MX8QM/QXP display pixel link"
69 Choose this to enable display pixel link found in
70 Freescale i.MX8qm/qxp processors.
72 config DRM_IMX8QXP_PIXEL_LINK_TO_DPI
73 tristate "Freescale i.MX8QXP pixel link to display pixel interface"
77 Choose this to enable pixel link to display pixel interface(PXL2DPI)
78 found in Freescale i.MX8qxp processor.
80 config DRM_IMX93_MIPI_DSI
81 tristate "Freescale i.MX93 specific extensions for Synopsys DW MIPI DSI"
84 select DRM_DW_MIPI_DSI
86 select GENERIC_PHY_MIPI_DPHY
88 Choose this to enable MIPI DSI controller found in Freescale i.MX93
91 endif # ARCH_MXC || COMPILE_TEST