1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright(c) 2016, Analogix Semiconductor.
6 * Based on anx7808 driver obtained from chromeos with copyright:
7 * Copyright(c) 2013, Google Inc.
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/i2c.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/of_platform.h>
17 #include <linux/regmap.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/types.h>
21 #include <drm/display/drm_dp_helper.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_bridge.h>
24 #include <drm/drm_crtc.h>
25 #include <drm/drm_edid.h>
26 #include <drm/drm_of.h>
27 #include <drm/drm_panel.h>
28 #include <drm/drm_print.h>
29 #include <drm/drm_probe_helper.h>
31 #include "analogix-i2c-dptx.h"
32 #include "analogix-i2c-txcommon.h"
34 #define POLL_DELAY 50000 /* us */
35 #define POLL_TIMEOUT 5000000 /* us */
37 #define I2C_IDX_DPTX 0
38 #define I2C_IDX_TXCOM 1
40 static const u8 anx6345_i2c_addresses[] = {
41 [I2C_IDX_DPTX] = 0x70,
42 [I2C_IDX_TXCOM] = 0x72,
44 #define I2C_NUM_ADDRESSES ARRAY_SIZE(anx6345_i2c_addresses)
47 struct drm_dp_aux aux;
48 struct drm_bridge bridge;
49 struct i2c_client *client;
50 const struct drm_edid *drm_edid;
51 struct drm_connector connector;
52 struct drm_panel *panel;
53 struct regulator *dvdd12;
54 struct regulator *dvdd25;
55 struct gpio_desc *gpiod_reset;
56 struct mutex lock; /* protect EDID access */
58 /* I2C Slave addresses of ANX6345 are mapped as DPTX and SYS */
59 struct i2c_client *i2c_clients[I2C_NUM_ADDRESSES];
60 struct regmap *map[I2C_NUM_ADDRESSES];
63 u8 dpcd[DP_RECEIVER_CAP_SIZE];
68 static inline struct anx6345 *connector_to_anx6345(struct drm_connector *c)
70 return container_of(c, struct anx6345, connector);
73 static inline struct anx6345 *bridge_to_anx6345(struct drm_bridge *bridge)
75 return container_of(bridge, struct anx6345, bridge);
78 static int anx6345_set_bits(struct regmap *map, u8 reg, u8 mask)
80 return regmap_update_bits(map, reg, mask, mask);
83 static int anx6345_clear_bits(struct regmap *map, u8 reg, u8 mask)
85 return regmap_update_bits(map, reg, mask, 0);
88 static ssize_t anx6345_aux_transfer(struct drm_dp_aux *aux,
89 struct drm_dp_aux_msg *msg)
91 struct anx6345 *anx6345 = container_of(aux, struct anx6345, aux);
93 return anx_dp_aux_transfer(anx6345->map[I2C_IDX_DPTX], msg);
96 static int anx6345_dp_link_training(struct anx6345 *anx6345)
102 err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
103 SP_POWERDOWN_CTRL_REG,
108 err = drm_dp_dpcd_readb(&anx6345->aux, DP_MAX_LINK_RATE, &dp_bw);
113 case DP_LINK_BW_1_62:
118 DRM_DEBUG_KMS("DP bandwidth (%#02x) not supported\n", dp_bw);
122 err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
127 err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
128 SP_VID_CTRL1_REG, SP_VIDEO_EN);
133 err = drm_dp_dpcd_read(&anx6345->aux, DP_DPCD_REV,
134 &anx6345->dpcd, DP_RECEIVER_CAP_SIZE);
136 DRM_ERROR("Failed to read DPCD: %d\n", err);
140 /* Clear channel x SERDES power down */
141 err = anx6345_clear_bits(anx6345->map[I2C_IDX_DPTX],
142 SP_DP_ANALOG_POWER_DOWN_REG, SP_CH0_PD);
147 * Power up the sink (DP_SET_POWER register is only available on DPCD
150 if (anx6345->dpcd[DP_DPCD_REV] >= 0x11) {
151 err = drm_dp_dpcd_readb(&anx6345->aux, DP_SET_POWER, &dpcd[0]);
153 DRM_ERROR("Failed to read DP_SET_POWER register: %d\n",
158 dpcd[0] &= ~DP_SET_POWER_MASK;
159 dpcd[0] |= DP_SET_POWER_D0;
161 err = drm_dp_dpcd_writeb(&anx6345->aux, DP_SET_POWER, dpcd[0]);
163 DRM_ERROR("Failed to power up DisplayPort link: %d\n",
169 * According to the DP 1.1 specification, a "Sink Device must
170 * exit the power saving state within 1 ms" (Section 2.5.3.1,
171 * Table 5-52, "Sink Control Field" (register 0x600).
173 usleep_range(1000, 2000);
176 /* Possibly enable downspread on the sink */
177 err = regmap_write(anx6345->map[I2C_IDX_DPTX],
178 SP_DP_DOWNSPREAD_CTRL1_REG, 0);
182 if (anx6345->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) {
183 DRM_DEBUG("Enable downspread on the sink\n");
185 err = regmap_write(anx6345->map[I2C_IDX_DPTX],
186 SP_DP_DOWNSPREAD_CTRL1_REG, 8);
190 err = drm_dp_dpcd_writeb(&anx6345->aux, DP_DOWNSPREAD_CTRL,
195 err = drm_dp_dpcd_writeb(&anx6345->aux, DP_DOWNSPREAD_CTRL, 0);
200 /* Set the lane count and the link rate on the sink */
201 if (drm_dp_enhanced_frame_cap(anx6345->dpcd))
202 err = anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
203 SP_DP_SYSTEM_CTRL_BASE + 4,
206 err = anx6345_clear_bits(anx6345->map[I2C_IDX_DPTX],
207 SP_DP_SYSTEM_CTRL_BASE + 4,
213 err = regmap_write(anx6345->map[I2C_IDX_DPTX],
214 SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
218 dpcd[1] = drm_dp_max_lane_count(anx6345->dpcd);
220 err = regmap_write(anx6345->map[I2C_IDX_DPTX],
221 SP_DP_LANE_COUNT_SET_REG, dpcd[1]);
225 if (drm_dp_enhanced_frame_cap(anx6345->dpcd))
226 dpcd[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
228 err = drm_dp_dpcd_write(&anx6345->aux, DP_LINK_BW_SET, dpcd,
232 DRM_ERROR("Failed to configure link: %d\n", err);
236 /* Start training on the source */
237 err = regmap_write(anx6345->map[I2C_IDX_DPTX], SP_DP_LT_CTRL_REG,
242 return regmap_read_poll_timeout(anx6345->map[I2C_IDX_DPTX],
244 value, !(value & SP_DP_LT_INPROGRESS),
245 POLL_DELAY, POLL_TIMEOUT);
248 static int anx6345_tx_initialization(struct anx6345 *anx6345)
252 /* FIXME: colordepth is hardcoded for now */
253 err = regmap_write(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL2_REG,
254 SP_IN_BPC_6BIT << SP_IN_BPC_SHIFT);
258 err = regmap_write(anx6345->map[I2C_IDX_DPTX], SP_DP_PLL_CTRL_REG, 0);
262 err = regmap_write(anx6345->map[I2C_IDX_TXCOM],
263 SP_ANALOG_DEBUG1_REG, 0);
267 err = regmap_write(anx6345->map[I2C_IDX_DPTX],
268 SP_DP_LINK_DEBUG_CTRL_REG,
269 SP_NEW_PRBS7 | SP_M_VID_DEBUG);
273 err = regmap_write(anx6345->map[I2C_IDX_DPTX],
274 SP_DP_ANALOG_POWER_DOWN_REG, 0);
279 err = anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
280 SP_DP_SYSTEM_CTRL_BASE + 3,
281 SP_HPD_FORCE | SP_HPD_CTRL);
285 for (i = 0; i < 4; i++) {
287 err = regmap_write(anx6345->map[I2C_IDX_DPTX],
288 SP_DP_LANE0_LT_CTRL_REG + i, 0);
294 err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM],
295 SP_RESET_CTRL2_REG, SP_AUX_RST);
299 return anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
300 SP_RESET_CTRL2_REG, SP_AUX_RST);
303 static void anx6345_poweron(struct anx6345 *anx6345)
307 /* Ensure reset is asserted before starting power on sequence */
308 gpiod_set_value_cansleep(anx6345->gpiod_reset, 1);
309 usleep_range(1000, 2000);
311 err = regulator_enable(anx6345->dvdd12);
313 DRM_ERROR("Failed to enable dvdd12 regulator: %d\n",
318 /* T1 - delay between VDD12 and VDD25 should be 0-2ms */
319 usleep_range(1000, 2000);
321 err = regulator_enable(anx6345->dvdd25);
323 DRM_ERROR("Failed to enable dvdd25 regulator: %d\n",
328 /* T2 - delay between RESETN and all power rail stable,
331 usleep_range(2000, 5000);
333 gpiod_set_value_cansleep(anx6345->gpiod_reset, 0);
335 /* Power on registers module */
336 anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
337 SP_HDCP_PD | SP_AUDIO_PD | SP_VIDEO_PD | SP_LINK_PD);
338 anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
339 SP_REGISTER_PD | SP_TOTAL_PD);
342 drm_panel_prepare(anx6345->panel);
344 anx6345->powered = true;
347 static void anx6345_poweroff(struct anx6345 *anx6345)
351 gpiod_set_value_cansleep(anx6345->gpiod_reset, 1);
352 usleep_range(1000, 2000);
355 drm_panel_unprepare(anx6345->panel);
357 err = regulator_disable(anx6345->dvdd25);
359 DRM_ERROR("Failed to disable dvdd25 regulator: %d\n",
364 usleep_range(5000, 10000);
366 err = regulator_disable(anx6345->dvdd12);
368 DRM_ERROR("Failed to disable dvdd12 regulator: %d\n",
373 usleep_range(1000, 2000);
375 anx6345->powered = false;
378 static int anx6345_start(struct anx6345 *anx6345)
382 if (!anx6345->powered)
383 anx6345_poweron(anx6345);
385 /* Power on needed modules */
386 err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM],
387 SP_POWERDOWN_CTRL_REG,
388 SP_VIDEO_PD | SP_LINK_PD);
390 err = anx6345_tx_initialization(anx6345);
392 DRM_ERROR("Failed eDP transmitter initialization: %d\n", err);
393 anx6345_poweroff(anx6345);
397 err = anx6345_dp_link_training(anx6345);
399 DRM_ERROR("Failed link training: %d\n", err);
400 anx6345_poweroff(anx6345);
405 * This delay seems to help keep the hardware in a good state. Without
406 * it, there are times where it fails silently.
408 usleep_range(10000, 15000);
413 static int anx6345_config_dp_output(struct anx6345 *anx6345)
417 err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
422 /* Enable DP output */
423 err = anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG,
428 /* Force stream valid */
429 return anx6345_set_bits(anx6345->map[I2C_IDX_DPTX],
430 SP_DP_SYSTEM_CTRL_BASE + 3,
431 SP_STRM_FORCE | SP_STRM_CTRL);
434 static int anx6345_get_downstream_info(struct anx6345 *anx6345)
439 err = drm_dp_dpcd_readb(&anx6345->aux, DP_SINK_COUNT, &value);
441 DRM_ERROR("Get sink count failed %d\n", err);
445 if (!DP_GET_SINK_COUNT(value)) {
446 DRM_ERROR("Downstream disconnected\n");
453 static int anx6345_get_modes(struct drm_connector *connector)
455 struct anx6345 *anx6345 = connector_to_anx6345(connector);
456 int err, num_modes = 0;
457 bool power_off = false;
459 mutex_lock(&anx6345->lock);
461 if (!anx6345->drm_edid) {
462 if (!anx6345->powered) {
463 anx6345_poweron(anx6345);
467 err = anx6345_get_downstream_info(anx6345);
469 DRM_ERROR("Failed to get downstream info: %d\n", err);
473 anx6345->drm_edid = drm_edid_read_ddc(connector, &anx6345->aux.ddc);
474 if (!anx6345->drm_edid)
475 DRM_ERROR("Failed to read EDID from panel\n");
477 err = drm_edid_connector_update(connector, anx6345->drm_edid);
479 DRM_ERROR("Failed to update EDID property: %d\n", err);
484 num_modes += drm_edid_connector_add_modes(connector);
486 /* Driver currently supports only 6bpc */
487 connector->display_info.bpc = 6;
491 anx6345_poweroff(anx6345);
493 mutex_unlock(&anx6345->lock);
495 if (!num_modes && anx6345->panel)
496 num_modes += drm_panel_get_modes(anx6345->panel, connector);
501 static const struct drm_connector_helper_funcs anx6345_connector_helper_funcs = {
502 .get_modes = anx6345_get_modes,
506 anx6345_connector_destroy(struct drm_connector *connector)
508 drm_connector_cleanup(connector);
511 static const struct drm_connector_funcs anx6345_connector_funcs = {
512 .fill_modes = drm_helper_probe_single_connector_modes,
513 .destroy = anx6345_connector_destroy,
514 .reset = drm_atomic_helper_connector_reset,
515 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
516 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
519 static int anx6345_bridge_attach(struct drm_bridge *bridge,
520 enum drm_bridge_attach_flags flags)
522 struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
525 if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) {
526 DRM_ERROR("Fix bridge driver to make connector optional!");
530 /* Register aux channel */
531 anx6345->aux.name = "DP-AUX";
532 anx6345->aux.dev = &anx6345->client->dev;
533 anx6345->aux.drm_dev = bridge->dev;
534 anx6345->aux.transfer = anx6345_aux_transfer;
536 err = drm_dp_aux_register(&anx6345->aux);
538 DRM_ERROR("Failed to register aux channel: %d\n", err);
542 err = drm_connector_init(bridge->dev, &anx6345->connector,
543 &anx6345_connector_funcs,
544 DRM_MODE_CONNECTOR_eDP);
546 DRM_ERROR("Failed to initialize connector: %d\n", err);
550 drm_connector_helper_add(&anx6345->connector,
551 &anx6345_connector_helper_funcs);
553 anx6345->connector.polled = DRM_CONNECTOR_POLL_HPD;
555 err = drm_connector_attach_encoder(&anx6345->connector,
558 DRM_ERROR("Failed to link up connector to encoder: %d\n", err);
559 goto connector_cleanup;
562 err = drm_connector_register(&anx6345->connector);
564 DRM_ERROR("Failed to register connector: %d\n", err);
565 goto connector_cleanup;
570 drm_connector_cleanup(&anx6345->connector);
572 drm_dp_aux_unregister(&anx6345->aux);
576 static void anx6345_bridge_detach(struct drm_bridge *bridge)
578 drm_dp_aux_unregister(&bridge_to_anx6345(bridge)->aux);
581 static enum drm_mode_status
582 anx6345_bridge_mode_valid(struct drm_bridge *bridge,
583 const struct drm_display_info *info,
584 const struct drm_display_mode *mode)
586 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
587 return MODE_NO_INTERLACE;
589 /* Max 1200p at 5.4 Ghz, one lane */
590 if (mode->clock > 154000)
591 return MODE_CLOCK_HIGH;
596 static void anx6345_bridge_disable(struct drm_bridge *bridge)
598 struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
600 /* Power off all modules except configuration registers access */
601 anx6345_set_bits(anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG,
602 SP_HDCP_PD | SP_AUDIO_PD | SP_VIDEO_PD | SP_LINK_PD);
604 drm_panel_disable(anx6345->panel);
606 if (anx6345->powered)
607 anx6345_poweroff(anx6345);
610 static void anx6345_bridge_enable(struct drm_bridge *bridge)
612 struct anx6345 *anx6345 = bridge_to_anx6345(bridge);
616 drm_panel_enable(anx6345->panel);
618 err = anx6345_start(anx6345);
620 DRM_ERROR("Failed to initialize: %d\n", err);
624 err = anx6345_config_dp_output(anx6345);
626 DRM_ERROR("Failed to enable DP output: %d\n", err);
629 static const struct drm_bridge_funcs anx6345_bridge_funcs = {
630 .attach = anx6345_bridge_attach,
631 .detach = anx6345_bridge_detach,
632 .mode_valid = anx6345_bridge_mode_valid,
633 .disable = anx6345_bridge_disable,
634 .enable = anx6345_bridge_enable,
637 static void unregister_i2c_dummy_clients(struct anx6345 *anx6345)
641 for (i = 1; i < ARRAY_SIZE(anx6345->i2c_clients); i++)
642 if (anx6345->i2c_clients[i] &&
643 anx6345->i2c_clients[i]->addr != anx6345->client->addr)
644 i2c_unregister_device(anx6345->i2c_clients[i]);
647 static const struct regmap_config anx6345_regmap_config = {
650 .max_register = 0xff,
651 .cache_type = REGCACHE_NONE,
654 static const u16 anx6345_chipid_list[] = {
658 static bool anx6345_get_chip_id(struct anx6345 *anx6345)
660 unsigned int i, idl, idh, version;
662 if (regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_IDL_REG, &idl))
665 if (regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_IDH_REG, &idh))
668 anx6345->chipid = (u8)idl | ((u8)idh << 8);
670 if (regmap_read(anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_VERSION_REG,
674 for (i = 0; i < ARRAY_SIZE(anx6345_chipid_list); i++) {
675 if (anx6345->chipid == anx6345_chipid_list[i]) {
676 DRM_INFO("Found ANX%x (ver. %d) eDP Transmitter\n",
677 anx6345->chipid, version);
682 DRM_ERROR("ANX%x (ver. %d) not supported by this driver\n",
683 anx6345->chipid, version);
688 static int anx6345_i2c_probe(struct i2c_client *client)
690 struct anx6345 *anx6345;
694 anx6345 = devm_kzalloc(&client->dev, sizeof(*anx6345), GFP_KERNEL);
698 mutex_init(&anx6345->lock);
700 anx6345->bridge.of_node = client->dev.of_node;
702 anx6345->client = client;
703 i2c_set_clientdata(client, anx6345);
705 dev = &anx6345->client->dev;
707 err = drm_of_find_panel_or_bridge(client->dev.of_node, 1, 0,
708 &anx6345->panel, NULL);
709 if (err == -EPROBE_DEFER)
713 DRM_DEBUG("No panel found\n");
715 /* 1.2V digital core power regulator */
716 anx6345->dvdd12 = devm_regulator_get(dev, "dvdd12");
717 if (IS_ERR(anx6345->dvdd12)) {
718 if (PTR_ERR(anx6345->dvdd12) != -EPROBE_DEFER)
719 DRM_ERROR("Failed to get dvdd12 supply (%ld)\n",
720 PTR_ERR(anx6345->dvdd12));
721 return PTR_ERR(anx6345->dvdd12);
724 /* 2.5V digital core power regulator */
725 anx6345->dvdd25 = devm_regulator_get(dev, "dvdd25");
726 if (IS_ERR(anx6345->dvdd25)) {
727 if (PTR_ERR(anx6345->dvdd25) != -EPROBE_DEFER)
728 DRM_ERROR("Failed to get dvdd25 supply (%ld)\n",
729 PTR_ERR(anx6345->dvdd25));
730 return PTR_ERR(anx6345->dvdd25);
733 /* GPIO for chip reset */
734 anx6345->gpiod_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
735 if (IS_ERR(anx6345->gpiod_reset)) {
736 DRM_ERROR("Reset gpio not found\n");
737 return PTR_ERR(anx6345->gpiod_reset);
740 /* Map slave addresses of ANX6345 */
741 for (i = 0; i < I2C_NUM_ADDRESSES; i++) {
742 if (anx6345_i2c_addresses[i] >> 1 != client->addr)
743 anx6345->i2c_clients[i] = i2c_new_dummy_device(client->adapter,
744 anx6345_i2c_addresses[i] >> 1);
746 anx6345->i2c_clients[i] = client;
748 if (IS_ERR(anx6345->i2c_clients[i])) {
749 err = PTR_ERR(anx6345->i2c_clients[i]);
750 DRM_ERROR("Failed to reserve I2C bus %02x\n",
751 anx6345_i2c_addresses[i]);
752 goto err_unregister_i2c;
755 anx6345->map[i] = devm_regmap_init_i2c(anx6345->i2c_clients[i],
756 &anx6345_regmap_config);
757 if (IS_ERR(anx6345->map[i])) {
758 err = PTR_ERR(anx6345->map[i]);
759 DRM_ERROR("Failed regmap initialization %02x\n",
760 anx6345_i2c_addresses[i]);
761 goto err_unregister_i2c;
765 /* Look for supported chip ID */
766 anx6345_poweron(anx6345);
767 if (anx6345_get_chip_id(anx6345)) {
768 anx6345->bridge.funcs = &anx6345_bridge_funcs;
769 drm_bridge_add(&anx6345->bridge);
773 anx6345_poweroff(anx6345);
778 unregister_i2c_dummy_clients(anx6345);
782 static void anx6345_i2c_remove(struct i2c_client *client)
784 struct anx6345 *anx6345 = i2c_get_clientdata(client);
786 drm_bridge_remove(&anx6345->bridge);
788 unregister_i2c_dummy_clients(anx6345);
790 drm_edid_free(anx6345->drm_edid);
792 mutex_destroy(&anx6345->lock);
795 static const struct i2c_device_id anx6345_id[] = {
799 MODULE_DEVICE_TABLE(i2c, anx6345_id);
801 static const struct of_device_id anx6345_match_table[] = {
802 { .compatible = "analogix,anx6345", },
805 MODULE_DEVICE_TABLE(of, anx6345_match_table);
807 static struct i2c_driver anx6345_driver = {
810 .of_match_table = anx6345_match_table,
812 .probe = anx6345_i2c_probe,
813 .remove = anx6345_i2c_remove,
814 .id_table = anx6345_id,
816 module_i2c_driver(anx6345_driver);
818 MODULE_DESCRIPTION("ANX6345 eDP Transmitter driver");
820 MODULE_LICENSE("GPL v2");