1 // SPDX-License-Identifier: GPL-2.0
3 * System Control and Management Interface (SCMI) Clock Protocol
5 * Copyright (C) 2018-2022 ARM Ltd.
8 #include <linux/module.h>
9 #include <linux/limits.h>
10 #include <linux/sort.h>
12 #include "protocols.h"
15 /* Updated only after ALL the mandatory features for that version are merged */
16 #define SCMI_PROTOCOL_SUPPORTED_VERSION 0x30000
18 enum scmi_clock_protocol_cmd {
19 CLOCK_ATTRIBUTES = 0x3,
20 CLOCK_DESCRIBE_RATES = 0x4,
23 CLOCK_CONFIG_SET = 0x7,
25 CLOCK_RATE_NOTIFY = 0x9,
26 CLOCK_RATE_CHANGE_REQUESTED_NOTIFY = 0xA,
27 CLOCK_CONFIG_GET = 0xB,
28 CLOCK_POSSIBLE_PARENTS_GET = 0xC,
29 CLOCK_PARENT_SET = 0xD,
30 CLOCK_PARENT_GET = 0xE,
31 CLOCK_GET_PERMISSIONS = 0xF,
34 #define CLOCK_STATE_CONTROL_ALLOWED BIT(31)
35 #define CLOCK_PARENT_CONTROL_ALLOWED BIT(30)
36 #define CLOCK_RATE_CONTROL_ALLOWED BIT(29)
45 struct scmi_msg_resp_clock_protocol_attributes {
51 struct scmi_msg_resp_clock_attributes {
53 #define SUPPORTS_RATE_CHANGED_NOTIF(x) ((x) & BIT(31))
54 #define SUPPORTS_RATE_CHANGE_REQUESTED_NOTIF(x) ((x) & BIT(30))
55 #define SUPPORTS_EXTENDED_NAMES(x) ((x) & BIT(29))
56 #define SUPPORTS_PARENT_CLOCK(x) ((x) & BIT(28))
57 #define SUPPORTS_EXTENDED_CONFIG(x) ((x) & BIT(27))
58 #define SUPPORTS_GET_PERMISSIONS(x) ((x) & BIT(1))
59 u8 name[SCMI_SHORT_NAME_MAX_SIZE];
60 __le32 clock_enable_latency;
63 struct scmi_msg_clock_possible_parents {
68 struct scmi_msg_resp_clock_possible_parents {
69 __le32 num_parent_flags;
70 #define NUM_PARENTS_RETURNED(x) ((x) & 0xff)
71 #define NUM_PARENTS_REMAINING(x) ((x) >> 24)
72 __le32 possible_parents[];
75 struct scmi_msg_clock_set_parent {
80 struct scmi_msg_clock_config_set {
85 /* Valid only from SCMI clock v2.1 */
86 struct scmi_msg_clock_config_set_v2 {
89 #define NULL_OEM_TYPE 0
90 #define REGMASK_OEM_TYPE_SET GENMASK(23, 16)
91 #define REGMASK_CLK_STATE GENMASK(1, 0)
92 __le32 oem_config_val;
95 struct scmi_msg_clock_config_get {
98 #define REGMASK_OEM_TYPE_GET GENMASK(7, 0)
101 struct scmi_msg_resp_clock_config_get {
104 #define IS_CLK_ENABLED(x) le32_get_bits((x), BIT(0))
105 __le32 oem_config_val;
108 struct scmi_msg_clock_describe_rates {
113 struct scmi_msg_resp_clock_describe_rates {
114 __le32 num_rates_flags;
115 #define NUM_RETURNED(x) ((x) & 0xfff)
116 #define RATE_DISCRETE(x) !((x) & BIT(12))
117 #define NUM_REMAINING(x) ((x) >> 16)
122 #define RATE_TO_U64(X) \
125 le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \
129 struct scmi_clock_set_rate {
131 #define CLOCK_SET_ASYNC BIT(0)
132 #define CLOCK_SET_IGNORE_RESP BIT(1)
133 #define CLOCK_SET_ROUND_UP BIT(2)
134 #define CLOCK_SET_ROUND_AUTO BIT(3)
140 struct scmi_msg_resp_set_rate_complete {
146 struct scmi_msg_clock_rate_notify {
148 __le32 notify_enable;
151 struct scmi_clock_rate_notify_payld {
162 bool notify_rate_changed_cmd;
163 bool notify_rate_change_requested_cmd;
164 atomic_t cur_async_req;
165 struct scmi_clock_info *clk;
166 int (*clock_config_set)(const struct scmi_protocol_handle *ph,
167 u32 clk_id, enum clk_state state,
168 enum scmi_clock_oem_config oem_type,
169 u32 oem_val, bool atomic);
170 int (*clock_config_get)(const struct scmi_protocol_handle *ph,
171 u32 clk_id, enum scmi_clock_oem_config oem_type,
172 u32 *attributes, bool *enabled, u32 *oem_val,
176 static enum scmi_clock_protocol_cmd evt_2_cmd[] = {
178 CLOCK_RATE_CHANGE_REQUESTED_NOTIFY,
181 static inline struct scmi_clock_info *
182 scmi_clock_domain_lookup(struct clock_info *ci, u32 clk_id)
184 if (clk_id >= ci->num_clocks)
185 return ERR_PTR(-EINVAL);
187 return ci->clk + clk_id;
191 scmi_clock_protocol_attributes_get(const struct scmi_protocol_handle *ph,
192 struct clock_info *ci)
196 struct scmi_msg_resp_clock_protocol_attributes *attr;
198 ret = ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES,
199 0, sizeof(*attr), &t);
205 ret = ph->xops->do_xfer(ph, t);
207 ci->num_clocks = le16_to_cpu(attr->num_clocks);
208 ci->max_async_req = attr->max_async_req;
211 ph->xops->xfer_put(ph, t);
214 if (!ph->hops->protocol_msg_check(ph, CLOCK_RATE_NOTIFY, NULL))
215 ci->notify_rate_changed_cmd = true;
217 if (!ph->hops->protocol_msg_check(ph,
218 CLOCK_RATE_CHANGE_REQUESTED_NOTIFY,
220 ci->notify_rate_change_requested_cmd = true;
226 struct scmi_clk_ipriv {
229 struct scmi_clock_info *clk;
232 static void iter_clk_possible_parents_prepare_message(void *message, unsigned int desc_index,
235 struct scmi_msg_clock_possible_parents *msg = message;
236 const struct scmi_clk_ipriv *p = priv;
238 msg->id = cpu_to_le32(p->clk_id);
239 /* Set the number of OPPs to be skipped/already read */
240 msg->skip_parents = cpu_to_le32(desc_index);
243 static int iter_clk_possible_parents_update_state(struct scmi_iterator_state *st,
244 const void *response, void *priv)
246 const struct scmi_msg_resp_clock_possible_parents *r = response;
247 struct scmi_clk_ipriv *p = priv;
248 struct device *dev = ((struct scmi_clk_ipriv *)p)->dev;
251 flags = le32_to_cpu(r->num_parent_flags);
252 st->num_returned = NUM_PARENTS_RETURNED(flags);
253 st->num_remaining = NUM_PARENTS_REMAINING(flags);
256 * num parents is not declared previously anywhere so we
257 * assume it's returned+remaining on first call.
259 if (!st->max_resources) {
260 p->clk->num_parents = st->num_returned + st->num_remaining;
261 p->clk->parents = devm_kcalloc(dev, p->clk->num_parents,
262 sizeof(*p->clk->parents),
264 if (!p->clk->parents) {
265 p->clk->num_parents = 0;
268 st->max_resources = st->num_returned + st->num_remaining;
274 static int iter_clk_possible_parents_process_response(const struct scmi_protocol_handle *ph,
275 const void *response,
276 struct scmi_iterator_state *st,
279 const struct scmi_msg_resp_clock_possible_parents *r = response;
280 struct scmi_clk_ipriv *p = priv;
282 u32 *parent = &p->clk->parents[st->desc_index + st->loop_idx];
284 *parent = le32_to_cpu(r->possible_parents[st->loop_idx]);
289 static int scmi_clock_possible_parents(const struct scmi_protocol_handle *ph, u32 clk_id,
290 struct scmi_clock_info *clk)
292 struct scmi_iterator_ops ops = {
293 .prepare_message = iter_clk_possible_parents_prepare_message,
294 .update_state = iter_clk_possible_parents_update_state,
295 .process_response = iter_clk_possible_parents_process_response,
298 struct scmi_clk_ipriv ppriv = {
306 iter = ph->hops->iter_response_init(ph, &ops, 0,
307 CLOCK_POSSIBLE_PARENTS_GET,
308 sizeof(struct scmi_msg_clock_possible_parents),
311 return PTR_ERR(iter);
313 ret = ph->hops->iter_response_run(iter);
319 scmi_clock_get_permissions(const struct scmi_protocol_handle *ph, u32 clk_id,
320 struct scmi_clock_info *clk)
326 ret = ph->xops->xfer_get_init(ph, CLOCK_GET_PERMISSIONS,
327 sizeof(clk_id), sizeof(perm), &t);
331 put_unaligned_le32(clk_id, t->tx.buf);
333 ret = ph->xops->do_xfer(ph, t);
335 perm = get_unaligned_le32(t->rx.buf);
337 clk->state_ctrl_forbidden = !(perm & CLOCK_STATE_CONTROL_ALLOWED);
338 clk->rate_ctrl_forbidden = !(perm & CLOCK_RATE_CONTROL_ALLOWED);
339 clk->parent_ctrl_forbidden = !(perm & CLOCK_PARENT_CONTROL_ALLOWED);
342 ph->xops->xfer_put(ph, t);
347 static int scmi_clock_attributes_get(const struct scmi_protocol_handle *ph,
348 u32 clk_id, struct clock_info *cinfo,
354 struct scmi_msg_resp_clock_attributes *attr;
355 struct scmi_clock_info *clk = cinfo->clk + clk_id;
357 ret = ph->xops->xfer_get_init(ph, CLOCK_ATTRIBUTES,
358 sizeof(clk_id), sizeof(*attr), &t);
362 put_unaligned_le32(clk_id, t->tx.buf);
365 ret = ph->xops->do_xfer(ph, t);
369 attributes = le32_to_cpu(attr->attributes);
370 strscpy(clk->name, attr->name, SCMI_SHORT_NAME_MAX_SIZE);
371 /* clock_enable_latency field is present only since SCMI v3.1 */
372 if (PROTOCOL_REV_MAJOR(version) >= 0x2)
373 latency = le32_to_cpu(attr->clock_enable_latency);
374 clk->enable_latency = latency ? : U32_MAX;
377 ph->xops->xfer_put(ph, t);
380 * If supported overwrite short name with the extended one;
381 * on error just carry on and use already provided short name.
383 if (!ret && PROTOCOL_REV_MAJOR(version) >= 0x2) {
384 if (SUPPORTS_EXTENDED_NAMES(attributes))
385 ph->hops->extended_name_get(ph, CLOCK_NAME_GET, clk_id,
389 if (cinfo->notify_rate_changed_cmd &&
390 SUPPORTS_RATE_CHANGED_NOTIF(attributes))
391 clk->rate_changed_notifications = true;
392 if (cinfo->notify_rate_change_requested_cmd &&
393 SUPPORTS_RATE_CHANGE_REQUESTED_NOTIF(attributes))
394 clk->rate_change_requested_notifications = true;
395 if (PROTOCOL_REV_MAJOR(version) >= 0x3) {
396 if (SUPPORTS_PARENT_CLOCK(attributes))
397 scmi_clock_possible_parents(ph, clk_id, clk);
398 if (SUPPORTS_GET_PERMISSIONS(attributes))
399 scmi_clock_get_permissions(ph, clk_id, clk);
400 if (SUPPORTS_EXTENDED_CONFIG(attributes))
401 clk->extended_config = true;
408 static int rate_cmp_func(const void *_r1, const void *_r2)
410 const u64 *r1 = _r1, *r2 = _r2;
420 static void iter_clk_describe_prepare_message(void *message,
421 const unsigned int desc_index,
424 struct scmi_msg_clock_describe_rates *msg = message;
425 const struct scmi_clk_ipriv *p = priv;
427 msg->id = cpu_to_le32(p->clk_id);
428 /* Set the number of rates to be skipped/already read */
429 msg->rate_index = cpu_to_le32(desc_index);
433 iter_clk_describe_update_state(struct scmi_iterator_state *st,
434 const void *response, void *priv)
437 struct scmi_clk_ipriv *p = priv;
438 const struct scmi_msg_resp_clock_describe_rates *r = response;
440 flags = le32_to_cpu(r->num_rates_flags);
441 st->num_remaining = NUM_REMAINING(flags);
442 st->num_returned = NUM_RETURNED(flags);
443 p->clk->rate_discrete = RATE_DISCRETE(flags);
445 /* Warn about out of spec replies ... */
446 if (!p->clk->rate_discrete &&
447 (st->num_returned != 3 || st->num_remaining != 0)) {
449 "Out-of-spec CLOCK_DESCRIBE_RATES reply for %s - returned:%d remaining:%d rx_len:%zd\n",
450 p->clk->name, st->num_returned, st->num_remaining,
454 * A known quirk: a triplet is returned but num_returned != 3
455 * Check for a safe payload size and fix.
457 if (st->num_returned != 3 && st->num_remaining == 0 &&
458 st->rx_len == sizeof(*r) + sizeof(__le32) * 2 * 3) {
459 st->num_returned = 3;
460 st->num_remaining = 0;
463 "Cannot fix out-of-spec reply !\n");
472 iter_clk_describe_process_response(const struct scmi_protocol_handle *ph,
473 const void *response,
474 struct scmi_iterator_state *st, void *priv)
477 struct scmi_clk_ipriv *p = priv;
478 const struct scmi_msg_resp_clock_describe_rates *r = response;
480 if (!p->clk->rate_discrete) {
481 switch (st->desc_index + st->loop_idx) {
483 p->clk->range.min_rate = RATE_TO_U64(r->rate[0]);
486 p->clk->range.max_rate = RATE_TO_U64(r->rate[1]);
489 p->clk->range.step_size = RATE_TO_U64(r->rate[2]);
496 u64 *rate = &p->clk->list.rates[st->desc_index + st->loop_idx];
498 *rate = RATE_TO_U64(r->rate[st->loop_idx]);
499 p->clk->list.num_rates++;
506 scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
507 struct scmi_clock_info *clk)
511 struct scmi_iterator_ops ops = {
512 .prepare_message = iter_clk_describe_prepare_message,
513 .update_state = iter_clk_describe_update_state,
514 .process_response = iter_clk_describe_process_response,
516 struct scmi_clk_ipriv cpriv = {
522 iter = ph->hops->iter_response_init(ph, &ops, SCMI_MAX_NUM_RATES,
523 CLOCK_DESCRIBE_RATES,
524 sizeof(struct scmi_msg_clock_describe_rates),
527 return PTR_ERR(iter);
529 ret = ph->hops->iter_response_run(iter);
533 if (!clk->rate_discrete) {
534 dev_dbg(ph->dev, "Min %llu Max %llu Step %llu Hz\n",
535 clk->range.min_rate, clk->range.max_rate,
536 clk->range.step_size);
537 } else if (clk->list.num_rates) {
538 sort(clk->list.rates, clk->list.num_rates,
539 sizeof(clk->list.rates[0]), rate_cmp_func, NULL);
546 scmi_clock_rate_get(const struct scmi_protocol_handle *ph,
547 u32 clk_id, u64 *value)
552 ret = ph->xops->xfer_get_init(ph, CLOCK_RATE_GET,
553 sizeof(__le32), sizeof(u64), &t);
557 put_unaligned_le32(clk_id, t->tx.buf);
559 ret = ph->xops->do_xfer(ph, t);
561 *value = get_unaligned_le64(t->rx.buf);
563 ph->xops->xfer_put(ph, t);
567 static int scmi_clock_rate_set(const struct scmi_protocol_handle *ph,
568 u32 clk_id, u64 rate)
573 struct scmi_clock_set_rate *cfg;
574 struct clock_info *ci = ph->get_priv(ph);
575 struct scmi_clock_info *clk;
577 clk = scmi_clock_domain_lookup(ci, clk_id);
581 if (clk->rate_ctrl_forbidden)
584 ret = ph->xops->xfer_get_init(ph, CLOCK_RATE_SET, sizeof(*cfg), 0, &t);
588 if (ci->max_async_req &&
589 atomic_inc_return(&ci->cur_async_req) < ci->max_async_req)
590 flags |= CLOCK_SET_ASYNC;
593 cfg->flags = cpu_to_le32(flags);
594 cfg->id = cpu_to_le32(clk_id);
595 cfg->value_low = cpu_to_le32(rate & 0xffffffff);
596 cfg->value_high = cpu_to_le32(rate >> 32);
598 if (flags & CLOCK_SET_ASYNC) {
599 ret = ph->xops->do_xfer_with_response(ph, t);
601 struct scmi_msg_resp_set_rate_complete *resp;
604 if (le32_to_cpu(resp->id) == clk_id)
606 "Clk ID %d set async to %llu\n", clk_id,
607 get_unaligned_le64(&resp->rate_low));
612 ret = ph->xops->do_xfer(ph, t);
615 if (ci->max_async_req)
616 atomic_dec(&ci->cur_async_req);
618 ph->xops->xfer_put(ph, t);
623 scmi_clock_config_set(const struct scmi_protocol_handle *ph, u32 clk_id,
624 enum clk_state state,
625 enum scmi_clock_oem_config __unused0, u32 __unused1,
630 struct scmi_msg_clock_config_set *cfg;
632 if (state >= CLK_STATE_RESERVED)
635 ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_SET,
636 sizeof(*cfg), 0, &t);
640 t->hdr.poll_completion = atomic;
643 cfg->id = cpu_to_le32(clk_id);
644 cfg->attributes = cpu_to_le32(state);
646 ret = ph->xops->do_xfer(ph, t);
648 ph->xops->xfer_put(ph, t);
653 scmi_clock_set_parent(const struct scmi_protocol_handle *ph, u32 clk_id,
658 struct scmi_msg_clock_set_parent *cfg;
659 struct clock_info *ci = ph->get_priv(ph);
660 struct scmi_clock_info *clk;
662 clk = scmi_clock_domain_lookup(ci, clk_id);
666 if (parent_id >= clk->num_parents)
669 if (clk->parent_ctrl_forbidden)
672 ret = ph->xops->xfer_get_init(ph, CLOCK_PARENT_SET,
673 sizeof(*cfg), 0, &t);
677 t->hdr.poll_completion = false;
680 cfg->id = cpu_to_le32(clk_id);
681 cfg->parent_id = cpu_to_le32(clk->parents[parent_id]);
683 ret = ph->xops->do_xfer(ph, t);
685 ph->xops->xfer_put(ph, t);
691 scmi_clock_get_parent(const struct scmi_protocol_handle *ph, u32 clk_id,
697 ret = ph->xops->xfer_get_init(ph, CLOCK_PARENT_GET,
698 sizeof(__le32), sizeof(u32), &t);
702 put_unaligned_le32(clk_id, t->tx.buf);
704 ret = ph->xops->do_xfer(ph, t);
706 *parent_id = get_unaligned_le32(t->rx.buf);
708 ph->xops->xfer_put(ph, t);
712 /* For SCMI clock v3.0 and onwards */
714 scmi_clock_config_set_v2(const struct scmi_protocol_handle *ph, u32 clk_id,
715 enum clk_state state,
716 enum scmi_clock_oem_config oem_type, u32 oem_val,
722 struct scmi_msg_clock_config_set_v2 *cfg;
724 if (state == CLK_STATE_RESERVED ||
725 (!oem_type && state == CLK_STATE_UNCHANGED))
728 ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_SET,
729 sizeof(*cfg), 0, &t);
733 t->hdr.poll_completion = atomic;
735 attrs = FIELD_PREP(REGMASK_OEM_TYPE_SET, oem_type) |
736 FIELD_PREP(REGMASK_CLK_STATE, state);
739 cfg->id = cpu_to_le32(clk_id);
740 cfg->attributes = cpu_to_le32(attrs);
741 /* Clear in any case */
742 cfg->oem_config_val = cpu_to_le32(0);
744 cfg->oem_config_val = cpu_to_le32(oem_val);
746 ret = ph->xops->do_xfer(ph, t);
748 ph->xops->xfer_put(ph, t);
752 static int scmi_clock_enable(const struct scmi_protocol_handle *ph, u32 clk_id,
755 struct clock_info *ci = ph->get_priv(ph);
756 struct scmi_clock_info *clk;
758 clk = scmi_clock_domain_lookup(ci, clk_id);
762 if (clk->state_ctrl_forbidden)
765 return ci->clock_config_set(ph, clk_id, CLK_STATE_ENABLE,
766 NULL_OEM_TYPE, 0, atomic);
769 static int scmi_clock_disable(const struct scmi_protocol_handle *ph, u32 clk_id,
772 struct clock_info *ci = ph->get_priv(ph);
773 struct scmi_clock_info *clk;
775 clk = scmi_clock_domain_lookup(ci, clk_id);
779 if (clk->state_ctrl_forbidden)
782 return ci->clock_config_set(ph, clk_id, CLK_STATE_DISABLE,
783 NULL_OEM_TYPE, 0, atomic);
786 /* For SCMI clock v3.0 and onwards */
788 scmi_clock_config_get_v2(const struct scmi_protocol_handle *ph, u32 clk_id,
789 enum scmi_clock_oem_config oem_type, u32 *attributes,
790 bool *enabled, u32 *oem_val, bool atomic)
795 struct scmi_msg_clock_config_get *cfg;
797 ret = ph->xops->xfer_get_init(ph, CLOCK_CONFIG_GET,
798 sizeof(*cfg), 0, &t);
802 t->hdr.poll_completion = atomic;
804 flags = FIELD_PREP(REGMASK_OEM_TYPE_GET, oem_type);
807 cfg->id = cpu_to_le32(clk_id);
808 cfg->flags = cpu_to_le32(flags);
810 ret = ph->xops->do_xfer(ph, t);
812 struct scmi_msg_resp_clock_config_get *resp = t->rx.buf;
815 *attributes = le32_to_cpu(resp->attributes);
818 *enabled = IS_CLK_ENABLED(resp->config);
820 if (oem_val && oem_type)
821 *oem_val = le32_to_cpu(resp->oem_config_val);
824 ph->xops->xfer_put(ph, t);
830 scmi_clock_config_get(const struct scmi_protocol_handle *ph, u32 clk_id,
831 enum scmi_clock_oem_config oem_type, u32 *attributes,
832 bool *enabled, u32 *oem_val, bool atomic)
836 struct scmi_msg_resp_clock_attributes *resp;
841 ret = ph->xops->xfer_get_init(ph, CLOCK_ATTRIBUTES,
842 sizeof(clk_id), sizeof(*resp), &t);
846 t->hdr.poll_completion = atomic;
847 put_unaligned_le32(clk_id, t->tx.buf);
850 ret = ph->xops->do_xfer(ph, t);
852 *enabled = IS_CLK_ENABLED(resp->attributes);
854 ph->xops->xfer_put(ph, t);
859 static int scmi_clock_state_get(const struct scmi_protocol_handle *ph,
860 u32 clk_id, bool *enabled, bool atomic)
862 struct clock_info *ci = ph->get_priv(ph);
864 return ci->clock_config_get(ph, clk_id, NULL_OEM_TYPE, NULL,
865 enabled, NULL, atomic);
868 static int scmi_clock_config_oem_set(const struct scmi_protocol_handle *ph,
870 enum scmi_clock_oem_config oem_type,
871 u32 oem_val, bool atomic)
873 struct clock_info *ci = ph->get_priv(ph);
874 struct scmi_clock_info *clk;
876 clk = scmi_clock_domain_lookup(ci, clk_id);
880 if (!clk->extended_config)
883 return ci->clock_config_set(ph, clk_id, CLK_STATE_UNCHANGED,
884 oem_type, oem_val, atomic);
887 static int scmi_clock_config_oem_get(const struct scmi_protocol_handle *ph,
889 enum scmi_clock_oem_config oem_type,
890 u32 *oem_val, u32 *attributes, bool atomic)
892 struct clock_info *ci = ph->get_priv(ph);
893 struct scmi_clock_info *clk;
895 clk = scmi_clock_domain_lookup(ci, clk_id);
899 if (!clk->extended_config)
902 return ci->clock_config_get(ph, clk_id, oem_type, attributes,
903 NULL, oem_val, atomic);
906 static int scmi_clock_count_get(const struct scmi_protocol_handle *ph)
908 struct clock_info *ci = ph->get_priv(ph);
910 return ci->num_clocks;
913 static const struct scmi_clock_info *
914 scmi_clock_info_get(const struct scmi_protocol_handle *ph, u32 clk_id)
916 struct scmi_clock_info *clk;
917 struct clock_info *ci = ph->get_priv(ph);
919 clk = scmi_clock_domain_lookup(ci, clk_id);
929 static const struct scmi_clk_proto_ops clk_proto_ops = {
930 .count_get = scmi_clock_count_get,
931 .info_get = scmi_clock_info_get,
932 .rate_get = scmi_clock_rate_get,
933 .rate_set = scmi_clock_rate_set,
934 .enable = scmi_clock_enable,
935 .disable = scmi_clock_disable,
936 .state_get = scmi_clock_state_get,
937 .config_oem_get = scmi_clock_config_oem_get,
938 .config_oem_set = scmi_clock_config_oem_set,
939 .parent_set = scmi_clock_set_parent,
940 .parent_get = scmi_clock_get_parent,
943 static bool scmi_clk_notify_supported(const struct scmi_protocol_handle *ph,
944 u8 evt_id, u32 src_id)
947 struct scmi_clock_info *clk;
948 struct clock_info *ci = ph->get_priv(ph);
950 if (evt_id >= ARRAY_SIZE(evt_2_cmd))
953 clk = scmi_clock_domain_lookup(ci, src_id);
957 if (evt_id == SCMI_EVENT_CLOCK_RATE_CHANGED)
958 supported = clk->rate_changed_notifications;
960 supported = clk->rate_change_requested_notifications;
965 static int scmi_clk_rate_notify(const struct scmi_protocol_handle *ph,
966 u32 clk_id, int message_id, bool enable)
970 struct scmi_msg_clock_rate_notify *notify;
972 ret = ph->xops->xfer_get_init(ph, message_id, sizeof(*notify), 0, &t);
977 notify->clk_id = cpu_to_le32(clk_id);
978 notify->notify_enable = enable ? cpu_to_le32(BIT(0)) : 0;
980 ret = ph->xops->do_xfer(ph, t);
982 ph->xops->xfer_put(ph, t);
986 static int scmi_clk_set_notify_enabled(const struct scmi_protocol_handle *ph,
987 u8 evt_id, u32 src_id, bool enable)
991 if (evt_id >= ARRAY_SIZE(evt_2_cmd))
994 cmd_id = evt_2_cmd[evt_id];
995 ret = scmi_clk_rate_notify(ph, src_id, cmd_id, enable);
997 pr_debug("FAIL_ENABLED - evt[%X] dom[%d] - ret:%d\n",
998 evt_id, src_id, ret);
1003 static void *scmi_clk_fill_custom_report(const struct scmi_protocol_handle *ph,
1004 u8 evt_id, ktime_t timestamp,
1005 const void *payld, size_t payld_sz,
1006 void *report, u32 *src_id)
1008 const struct scmi_clock_rate_notify_payld *p = payld;
1009 struct scmi_clock_rate_notif_report *r = report;
1011 if (sizeof(*p) != payld_sz ||
1012 (evt_id != SCMI_EVENT_CLOCK_RATE_CHANGED &&
1013 evt_id != SCMI_EVENT_CLOCK_RATE_CHANGE_REQUESTED))
1016 r->timestamp = timestamp;
1017 r->agent_id = le32_to_cpu(p->agent_id);
1018 r->clock_id = le32_to_cpu(p->clock_id);
1019 r->rate = get_unaligned_le64(&p->rate_low);
1020 *src_id = r->clock_id;
1025 static int scmi_clk_get_num_sources(const struct scmi_protocol_handle *ph)
1027 struct clock_info *ci = ph->get_priv(ph);
1032 return ci->num_clocks;
1035 static const struct scmi_event clk_events[] = {
1037 .id = SCMI_EVENT_CLOCK_RATE_CHANGED,
1038 .max_payld_sz = sizeof(struct scmi_clock_rate_notify_payld),
1039 .max_report_sz = sizeof(struct scmi_clock_rate_notif_report),
1042 .id = SCMI_EVENT_CLOCK_RATE_CHANGE_REQUESTED,
1043 .max_payld_sz = sizeof(struct scmi_clock_rate_notify_payld),
1044 .max_report_sz = sizeof(struct scmi_clock_rate_notif_report),
1048 static const struct scmi_event_ops clk_event_ops = {
1049 .is_notify_supported = scmi_clk_notify_supported,
1050 .get_num_sources = scmi_clk_get_num_sources,
1051 .set_notify_enabled = scmi_clk_set_notify_enabled,
1052 .fill_custom_report = scmi_clk_fill_custom_report,
1055 static const struct scmi_protocol_events clk_protocol_events = {
1056 .queue_sz = SCMI_PROTO_QUEUE_SZ,
1057 .ops = &clk_event_ops,
1059 .num_events = ARRAY_SIZE(clk_events),
1062 static int scmi_clock_protocol_init(const struct scmi_protocol_handle *ph)
1066 struct clock_info *cinfo;
1068 ret = ph->xops->version_get(ph, &version);
1072 dev_dbg(ph->dev, "Clock Version %d.%d\n",
1073 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
1075 cinfo = devm_kzalloc(ph->dev, sizeof(*cinfo), GFP_KERNEL);
1079 ret = scmi_clock_protocol_attributes_get(ph, cinfo);
1083 cinfo->clk = devm_kcalloc(ph->dev, cinfo->num_clocks,
1084 sizeof(*cinfo->clk), GFP_KERNEL);
1088 for (clkid = 0; clkid < cinfo->num_clocks; clkid++) {
1089 struct scmi_clock_info *clk = cinfo->clk + clkid;
1091 ret = scmi_clock_attributes_get(ph, clkid, cinfo, version);
1093 scmi_clock_describe_rates_get(ph, clkid, clk);
1096 if (PROTOCOL_REV_MAJOR(version) >= 0x3) {
1097 cinfo->clock_config_set = scmi_clock_config_set_v2;
1098 cinfo->clock_config_get = scmi_clock_config_get_v2;
1100 cinfo->clock_config_set = scmi_clock_config_set;
1101 cinfo->clock_config_get = scmi_clock_config_get;
1104 cinfo->version = version;
1105 return ph->set_priv(ph, cinfo, version);
1108 static const struct scmi_protocol scmi_clock = {
1109 .id = SCMI_PROTOCOL_CLOCK,
1110 .owner = THIS_MODULE,
1111 .instance_init = &scmi_clock_protocol_init,
1112 .ops = &clk_proto_ops,
1113 .events = &clk_protocol_events,
1114 .supported_version = SCMI_PROTOCOL_SUPPORTED_VERSION,
1117 DEFINE_SCMI_PROTOCOL_REGISTER_UNREGISTER(clock, scmi_clock)