1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments, Inc.
10 #include <linux/cleanup.h>
11 #include <linux/clk.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clkdev.h>
14 #include <linux/clk/ti.h>
17 #include <linux/of_address.h>
18 #include <linux/list.h>
19 #include <linux/minmax.h>
20 #include <linux/regmap.h>
21 #include <linux/string_helpers.h>
22 #include <linux/memblock.h>
23 #include <linux/device.h>
28 #define pr_fmt(fmt) "%s: " fmt, __func__
30 static LIST_HEAD(clk_hw_omap_clocks);
31 struct ti_clk_ll_ops *ti_clk_ll_ops;
32 static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
34 struct ti_clk_features ti_clk_features;
37 struct regmap *regmap;
41 static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
43 static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)
45 struct clk_iomap *io = clk_memmaps[reg->index];
48 writel_relaxed(val, reg->ptr);
50 regmap_write(io->regmap, reg->offset, val);
52 writel_relaxed(val, io->mem + reg->offset);
55 static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr)
59 v = readl_relaxed(ptr);
62 writel_relaxed(v, ptr);
65 static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg)
67 struct clk_iomap *io = clk_memmaps[reg->index];
70 _clk_rmw(val, mask, reg->ptr);
71 } else if (io->regmap) {
72 regmap_update_bits(io->regmap, reg->offset, mask, val);
74 _clk_rmw(val, mask, io->mem + reg->offset);
78 static u32 clk_memmap_readl(const struct clk_omap_reg *reg)
81 struct clk_iomap *io = clk_memmaps[reg->index];
84 val = readl_relaxed(reg->ptr);
86 regmap_read(io->regmap, reg->offset, &val);
88 val = readl_relaxed(io->mem + reg->offset);
94 * ti_clk_setup_ll_ops - setup low level clock operations
95 * @ops: low level clock ops descriptor
97 * Sets up low level clock operations for TI clock driver. This is used
98 * to provide various callbacks for the clock driver towards platform
99 * specific code. Returns 0 on success, -EBUSY if ll_ops have been
100 * registered already.
102 int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
105 pr_err("Attempt to register ll_ops multiple times.\n");
110 ops->clk_readl = clk_memmap_readl;
111 ops->clk_writel = clk_memmap_writel;
112 ops->clk_rmw = clk_memmap_rmw;
118 * Eventually we could standardize to using '_' for clk-*.c files to follow the
121 static struct device_node *ti_find_clock_provider(struct device_node *from,
124 char *tmp __free(kfree) = NULL;
125 struct device_node *np;
130 tmp = kstrdup_and_replace(name, '-', '_', GFP_KERNEL);
134 /* Ignore a possible address for the node name */
135 p = strchr(tmp, '@');
139 /* Node named "clock" with "clock-output-names" */
140 for_each_of_allnodes_from(from, np) {
141 if (of_property_read_string_index(np, "clock-output-names",
145 if (!strncmp(n, tmp, strlen(tmp))) {
157 /* Fall back to using old node name base provider name */
158 return of_find_node_by_name(from, tmp);
162 * ti_dt_clocks_register - register DT alias clocks during boot
163 * @oclks: list of clocks to register
165 * Register alias or non-standard DT clock entries during boot. By
166 * default, DT clocks are found based on their clock-output-names
167 * property, or the clock node name for legacy cases. If any
168 * additional con-id / dev-id -> clock mapping is required, use this
169 * function to list these.
171 void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
174 struct device_node *node, *parent, *child;
176 struct of_phandle_args clkspec;
183 static bool clkctrl_nodes_missing;
184 static bool has_clkctrl_data;
185 static bool compat_mode;
187 compat_mode = ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT;
189 for (c = oclks; c->node_name != NULL; c++) {
190 strcpy(buf, c->node_name);
192 for (i = 0; i < 2; i++)
198 pr_warn("Bad number of tags on %s\n",
202 tags[num_args++] = ptr + 1;
208 if (num_args && clkctrl_nodes_missing)
211 node = ti_find_clock_provider(NULL, buf);
212 if (num_args && compat_mode) {
214 child = of_get_child_by_name(parent, "clock");
216 child = of_get_child_by_name(parent, "clk");
224 clkspec.args_count = num_args;
225 for (i = 0; i < num_args; i++) {
226 ret = kstrtoint(tags[i], i ? 10 : 16, clkspec.args + i);
228 pr_warn("Bad tag in %s at %d: %s\n",
229 c->node_name, i, tags[i]);
234 clk = of_clk_get_from_provider(&clkspec);
240 if (num_args && !has_clkctrl_data) {
241 struct device_node *np;
243 np = of_find_compatible_node(NULL, NULL,
246 has_clkctrl_data = true;
249 clkctrl_nodes_missing = true;
251 pr_warn("missing clkctrl nodes, please update your dts.\n");
256 pr_warn("failed to lookup clock node %s, ret=%ld\n",
257 c->node_name, PTR_ERR(clk));
262 struct clk_init_item {
263 struct device_node *node;
265 ti_of_clk_init_cb_t func;
266 struct list_head link;
269 static LIST_HEAD(retry_list);
272 * ti_clk_retry_init - retries a failed clock init at later phase
273 * @node: device node for the clock
274 * @user: user data pointer
275 * @func: init function to be called for the clock
277 * Adds a failed clock init to the retry list. The retry list is parsed
278 * once all the other clocks have been initialized.
280 int __init ti_clk_retry_init(struct device_node *node, void *user,
281 ti_of_clk_init_cb_t func)
283 struct clk_init_item *retry;
285 pr_debug("%pOFn: adding to retry list...\n", node);
286 retry = kzalloc(sizeof(*retry), GFP_KERNEL);
293 list_add(&retry->link, &retry_list);
299 * ti_clk_get_reg_addr - get register address for a clock register
300 * @node: device node for the clock
301 * @index: register index from the clock node
302 * @reg: pointer to target register struct
304 * Builds clock register address from device tree information, and returns
305 * the data via the provided output pointer @reg. Returns 0 on success,
306 * negative error value on failure.
308 int ti_clk_get_reg_addr(struct device_node *node, int index,
309 struct clk_omap_reg *reg)
311 u32 clksel_addr, val;
312 bool is_clksel = false;
315 for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
316 if (clocks_node_ptr[i] == node->parent)
318 if (clocks_node_ptr[i] == node->parent->parent)
322 if (i == CLK_MAX_MEMMAPS) {
323 pr_err("clk-provider not found for %pOFn!\n", node);
329 if (of_device_is_compatible(node->parent, "ti,clksel")) {
330 err = of_property_read_u32_index(node->parent, "reg", index, &clksel_addr);
332 pr_err("%pOFn parent clksel must have reg[%d]!\n", node, index);
338 err = of_property_read_u32_index(node, "reg", index, &val);
339 if (err && is_clksel) {
340 /* Legacy clksel with no reg and a possible ti,bit-shift property */
341 reg->offset = clksel_addr;
342 reg->bit = ti_clk_get_legacy_bit_shift(node);
348 /* Updated clksel clock with a proper reg property */
350 reg->offset = clksel_addr;
356 /* Other clocks that may or may not have ti,bit-shift property */
358 reg->bit = ti_clk_get_legacy_bit_shift(node);
365 * ti_clk_get_legacy_bit_shift - get bit shift for a clock register
366 * @node: device node for the clock
368 * Gets the clock register bit shift using the legacy ti,bit-shift
369 * property. Only needed for legacy clock, and can be eventually
370 * dropped once all the composite clocks use a clksel node with a
371 * proper reg property.
373 int ti_clk_get_legacy_bit_shift(struct device_node *node)
378 err = of_property_read_u32(node, "ti,bit-shift", &val);
379 if (!err && in_range(val, 0, 32))
385 void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)
394 ti_clk_ll_ops->clk_rmw(latch, latch, reg);
395 ti_clk_ll_ops->clk_rmw(0, latch, reg);
396 ti_clk_ll_ops->clk_readl(reg); /* OCP barrier */
400 * omap2_clk_provider_init - init master clock provider
401 * @parent: master node
402 * @index: internal index for clk_reg_ops
403 * @syscon: syscon regmap pointer for accessing clock registers
404 * @mem: iomem pointer for the clock provider memory area, only used if
405 * syscon is not provided
407 * Initializes a master clock IP block. This basically sets up the
408 * mapping from clocks node to the memory map index. All the clocks
409 * are then initialized through the common of_clk_init call, and the
410 * clocks will access their memory maps based on the node layout.
411 * Returns 0 in success.
413 int __init omap2_clk_provider_init(struct device_node *parent, int index,
414 struct regmap *syscon, void __iomem *mem)
416 struct device_node *clocks;
417 struct clk_iomap *io;
419 /* get clocks for this parent */
420 clocks = of_get_child_by_name(parent, "clocks");
422 pr_err("%pOFn missing 'clocks' child node.\n", parent);
426 /* add clocks node info */
427 clocks_node_ptr[index] = clocks;
429 io = kzalloc(sizeof(*io), GFP_KERNEL);
436 clk_memmaps[index] = io;
442 * omap2_clk_legacy_provider_init - initialize a legacy clock provider
443 * @index: index for the clock provider
444 * @mem: iomem pointer for the clock provider memory area
446 * Initializes a legacy clock provider memory mapping.
448 void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
450 struct clk_iomap *io;
452 io = memblock_alloc(sizeof(*io), SMP_CACHE_BYTES);
454 panic("%s: Failed to allocate %zu bytes\n", __func__,
459 clk_memmaps[index] = io;
463 * ti_dt_clk_init_retry_clks - init clocks from the retry list
465 * Initializes any clocks that have failed to initialize before,
466 * reasons being missing parent node(s) during earlier init. This
467 * typically happens only for DPLLs which need to have both of their
468 * parent clocks ready during init.
470 void ti_dt_clk_init_retry_clks(void)
472 struct clk_init_item *retry;
473 struct clk_init_item *tmp;
476 while (!list_empty(&retry_list) && retries) {
477 list_for_each_entry_safe(retry, tmp, &retry_list, link) {
478 pr_debug("retry-init: %pOFn\n", retry->node);
479 retry->func(retry->user, retry->node);
480 list_del(&retry->link);
487 static const struct of_device_id simple_clk_match_table[] __initconst = {
488 { .compatible = "fixed-clock" },
489 { .compatible = "fixed-factor-clock" },
494 * ti_dt_clk_name - init clock name from first output name or node name
497 * Use the first clock-output-name for the clock name if found. Fall back
498 * to legacy naming based on node name.
500 const char *ti_dt_clk_name(struct device_node *np)
504 if (!of_property_read_string_index(np, "clock-output-names", 0,
512 * ti_clk_add_aliases - setup clock aliases
514 * Sets up any missing clock aliases. No return value.
516 void __init ti_clk_add_aliases(void)
518 struct device_node *np;
521 for_each_matching_node(np, simple_clk_match_table) {
522 struct of_phandle_args clkspec;
525 clk = of_clk_get_from_provider(&clkspec);
527 ti_clk_add_alias(clk, ti_dt_clk_name(np));
532 * ti_clk_setup_features - setup clock features flags
533 * @features: features definition to use
535 * Initializes the clock driver features flags based on platform
536 * provided data. No return value.
538 void __init ti_clk_setup_features(struct ti_clk_features *features)
540 memcpy(&ti_clk_features, features, sizeof(*features));
544 * ti_clk_get_features - get clock driver features flags
546 * Get TI clock driver features description. Returns a pointer
547 * to the current feature setup.
549 const struct ti_clk_features *ti_clk_get_features(void)
551 return &ti_clk_features;
555 * omap2_clk_enable_init_clocks - prepare & enable a list of clocks
556 * @clk_names: ptr to an array of strings of clock names to enable
557 * @num_clocks: number of clock names in @clk_names
559 * Prepare and enable a list of clocks, named by @clk_names. No
560 * return value. XXX Deprecated; only needed until these clocks are
561 * properly claimed and enabled by the drivers or core code that uses
562 * them. XXX What code disables & calls clk_put on these clocks?
564 void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
566 struct clk *init_clk;
569 for (i = 0; i < num_clocks; i++) {
570 init_clk = clk_get(NULL, clk_names[i]);
571 if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
574 clk_prepare_enable(init_clk);
579 * ti_clk_add_alias - add a clock alias for a TI clock
580 * @clk: clock handle to create alias for
581 * @con: connection ID for this clock
583 * Creates a clock alias for a TI clock. Allocates the clock lookup entry
584 * and assigns the data to it. Returns 0 if successful, negative error
587 int ti_clk_add_alias(struct clk *clk, const char *con)
589 struct clk_lookup *cl;
597 cl = kzalloc(sizeof(*cl), GFP_KERNEL);
610 * of_ti_clk_register - register a TI clock to the common clock framework
611 * @node: device node for this clock
612 * @hw: hardware clock handle
613 * @con: connection ID for this clock
615 * Registers a TI clock to the common clock framework, and adds a clock
616 * alias for it. Returns a handle to the registered clock if successful,
617 * ERR_PTR value in failure.
619 struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,
625 ret = of_clk_hw_register(node, hw);
630 ret = ti_clk_add_alias(clk, con);
640 * of_ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework
641 * @node: device node for this clock
642 * @hw: hardware clock handle
643 * @con: connection ID for this clock
645 * Registers a clk_hw_omap clock to the clock framewor, adds a clock alias
646 * for it, and adds the list to the available clk_hw_omap type clocks.
647 * Returns a handle to the registered clock if successful, ERR_PTR value
650 struct clk *of_ti_clk_register_omap_hw(struct device_node *node,
651 struct clk_hw *hw, const char *con)
654 struct clk_hw_omap *oclk;
656 clk = of_ti_clk_register(node, hw, con);
660 oclk = to_clk_hw_omap(hw);
662 list_add(&oclk->node, &clk_hw_omap_clocks);
668 * omap2_clk_for_each - call function for each registered clk_hw_omap
669 * @fn: pointer to a callback function
671 * Call @fn for each registered clk_hw_omap, passing @hw to each
672 * function. @fn must return 0 for success or any other value for
673 * failure. If @fn returns non-zero, the iteration across clocks
674 * will stop and the non-zero return value will be passed to the
675 * caller of omap2_clk_for_each().
677 int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw))
680 struct clk_hw_omap *hw;
682 list_for_each_entry(hw, &clk_hw_omap_clocks, node) {
692 * omap2_clk_is_hw_omap - check if the provided clk_hw is OMAP clock
693 * @hw: clk_hw to check if it is an omap clock or not
695 * Checks if the provided clk_hw is OMAP clock or not. Returns true if
696 * it is, false otherwise.
698 bool omap2_clk_is_hw_omap(struct clk_hw *hw)
700 struct clk_hw_omap *oclk;
702 list_for_each_entry(oclk, &clk_hw_omap_clocks, node) {