1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Bluetooth supports for Qualcomm Atheros ROME chips
5 * Copyright (c) 2015 The Linux Foundation. All rights reserved.
8 #define EDL_PATCH_CMD_OPCODE 0xFC00
9 #define EDL_NVM_ACCESS_OPCODE 0xFC0B
10 #define EDL_WRITE_BD_ADDR_OPCODE 0xFC14
11 #define EDL_PATCH_CMD_LEN 1
12 #define EDL_PATCH_VER_REQ_CMD 0x19
13 #define EDL_PATCH_TLV_REQ_CMD 0x1E
14 #define EDL_GET_BUILD_INFO_CMD 0x20
15 #define EDL_GET_BID_REQ_CMD 0x23
16 #define EDL_NVM_ACCESS_SET_REQ_CMD 0x01
17 #define EDL_PATCH_CONFIG_CMD 0x28
18 #define MAX_SIZE_PER_TLV_SEGMENT 243
19 #define QCA_PRE_SHUTDOWN_CMD 0xFC08
20 #define QCA_DISABLE_LOGGING 0xFC17
22 #define EDL_CMD_REQ_RES_EVT 0x00
23 #define EDL_PATCH_VER_RES_EVT 0x19
24 #define EDL_APP_VER_RES_EVT 0x02
25 #define EDL_TVL_DNLD_RES_EVT 0x04
26 #define EDL_CMD_EXE_STATUS_EVT 0x00
27 #define EDL_SET_BAUDRATE_RSP_EVT 0x92
28 #define EDL_NVM_ACCESS_CODE_EVT 0x0B
29 #define EDL_PATCH_CONFIG_RES_EVT 0x00
30 #define QCA_DISABLE_LOGGING_SUB_OP 0x14
32 #define EDL_TAG_ID_BD_ADDR 2
33 #define EDL_TAG_ID_HCI 17
34 #define EDL_TAG_ID_DEEP_SLEEP 27
36 #define QCA_WCN3990_POWERON_PULSE 0xFC
37 #define QCA_WCN3990_POWEROFF_PULSE 0xC0
39 #define QCA_HCI_CC_OPCODE 0xFC00
40 #define QCA_HCI_CC_SUCCESS 0x00
42 #define QCA_WCN3991_SOC_ID 0x40014320
44 /* QCA chipset version can be decided by patch and SoC
45 * version, combination with upper 2 bytes from SoC
46 * and lower 2 bytes from patch will be used.
48 #define get_soc_ver(soc_id, rom_ver) \
49 ((le32_to_cpu(soc_id) << 16) | (le16_to_cpu(rom_ver)))
51 #define QCA_HSP_GF_SOC_ID 0x1200
52 #define QCA_HSP_GF_SOC_MASK 0x0000ff00
55 QCA_BAUDRATE_115200 = 0,
74 QCA_BAUDRATE_AUTO = 0xFE,
78 enum qca_tlv_dnld_mode {
91 struct qca_fw_config {
94 uint8_t user_baud_rate;
95 enum qca_tlv_dnld_mode dnld_mode;
96 enum qca_tlv_dnld_mode dnld_type;
100 struct edl_event_hdr {
106 struct qca_btsoc_version {
113 struct tlv_seg_resp {
117 struct tlv_type_patch {
126 __le16 patch_version;
131 struct tlv_type_nvm {
139 struct tlv_type_hdr {
144 enum qca_btsoc_type {
159 #if IS_ENABLED(CONFIG_BT_QCA)
161 int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr);
162 int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
163 enum qca_btsoc_type soc_type, struct qca_btsoc_version ver,
164 const char *firmware_name);
165 int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver,
166 enum qca_btsoc_type);
167 int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
168 int qca_send_pre_shutdown_cmd(struct hci_dev *hdev);
171 static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr)
176 static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
177 enum qca_btsoc_type soc_type,
178 struct qca_btsoc_version ver,
179 const char *firmware_name)
184 static inline int qca_read_soc_version(struct hci_dev *hdev,
185 struct qca_btsoc_version *ver,
191 static inline int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
196 static inline int qca_send_pre_shutdown_cmd(struct hci_dev *hdev)