drivers/accel/ivpu/ivpu_jsm_msg.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2020-2024 Intel Corporation
   4  */
   5
   6 #ifndef __IVPU_JSM_MSG_H__
   7 #define __IVPU_JSM_MSG_H__
   8
   9 #include "vpu_jsm_api.h"
  10
  11 const char *ivpu_jsm_msg_type_to_str(enum vpu_ipc_msg_type type);
  12
  13 int ivpu_jsm_register_db(struct ivpu_device *vdev, u32 ctx_id, u32 db_id,
  14                          u64 jobq_base, u32 jobq_size);
  15 int ivpu_jsm_unregister_db(struct ivpu_device *vdev, u32 db_id);
  16 int ivpu_jsm_get_heartbeat(struct ivpu_device *vdev, u32 engine, u64 *heartbeat);
  17 int ivpu_jsm_reset_engine(struct ivpu_device *vdev, u32 engine);
  18 int ivpu_jsm_preempt_engine(struct ivpu_device *vdev, u32 engine, u32 preempt_id);
  19 int ivpu_jsm_dyndbg_control(struct ivpu_device *vdev, char *command, size_t size);
  20 int ivpu_jsm_trace_get_capability(struct ivpu_device *vdev, u32 *trace_destination_mask,
  21                                   u64 *trace_hw_component_mask);
  22 int ivpu_jsm_trace_set_config(struct ivpu_device *vdev, u32 trace_level, u32 trace_destination_mask,
  23                               u64 trace_hw_component_mask);
  24 int ivpu_jsm_context_release(struct ivpu_device *vdev, u32 host_ssid);
  25 int ivpu_jsm_pwr_d0i3_enter(struct ivpu_device *vdev);
  26 int ivpu_jsm_hws_create_cmdq(struct ivpu_device *vdev, u32 ctx_id, u32 cmdq_group, u32 cmdq_id,
  27                              u32 pid, u32 engine, u64 cmdq_base, u32 cmdq_size);
  28 int ivpu_jsm_hws_destroy_cmdq(struct ivpu_device *vdev, u32 ctx_id, u32 cmdq_id);
  29 int ivpu_jsm_hws_register_db(struct ivpu_device *vdev, u32 ctx_id, u32 cmdq_id, u32 db_id,
  30                              u64 cmdq_base, u32 cmdq_size);
  31 int ivpu_jsm_hws_resume_engine(struct ivpu_device *vdev, u32 engine);
  32 int ivpu_jsm_hws_set_context_sched_properties(struct ivpu_device *vdev, u32 ctx_id, u32 cmdq_id,
  33                                               u32 priority);
  34 int ivpu_jsm_hws_set_scheduling_log(struct ivpu_device *vdev, u32 engine_idx, u32 host_ssid,
  35                                     u64 vpu_log_buffer_va);
  36 int ivpu_jsm_hws_setup_priority_bands(struct ivpu_device *vdev);
  37 int ivpu_jsm_metric_streamer_start(struct ivpu_device *vdev, u64 metric_group_mask,
  38                                    u64 sampling_rate, u64 buffer_addr, u64 buffer_size);
  39 int ivpu_jsm_metric_streamer_stop(struct ivpu_device *vdev, u64 metric_group_mask);
  40 int ivpu_jsm_metric_streamer_update(struct ivpu_device *vdev, u64 metric_group_mask,
  41                                     u64 buffer_addr, u64 buffer_size, u64 *bytes_written);
  42 int ivpu_jsm_metric_streamer_info(struct ivpu_device *vdev, u64 metric_group_mask, u64 buffer_addr,
  43                                   u64 buffer_size, u32 *sample_size, u64 *info_size);
  44 int ivpu_jsm_dct_enable(struct ivpu_device *vdev, u32 active_us, u32 inactive_us);
  45 int ivpu_jsm_dct_disable(struct ivpu_device *vdev);
  46 int ivpu_jsm_state_dump(struct ivpu_device *vdev);
  47
  48 #endif