arch/s390/kernel/smp.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  SMP related functions
   4  *
   5  *    Copyright IBM Corp. 1999, 2012
   6  *    Author(s): Denis Joseph Barrow,
   7  *               Martin Schwidefsky <[email protected]>,
   8  *
   9  *  based on other smp stuff by
  10  *    (c) 1995 Alan Cox, CymruNET Ltd  <[email protected]>
  11  *    (c) 1998 Ingo Molnar
  12  *
  13  * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14  * the translation of logical to physical cpu ids. All new code that
  15  * operates on physical cpu numbers needs to go into smp.c.
  16  */
  17
  18 #define KMSG_COMPONENT "cpu"
  19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  20
  21 #include <linux/workqueue.h>
  22 #include <linux/memblock.h>
  23 #include <linux/export.h>
  24 #include <linux/init.h>
  25 #include <linux/mm.h>
  26 #include <linux/err.h>
  27 #include <linux/spinlock.h>
  28 #include <linux/kernel_stat.h>
  29 #include <linux/delay.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/irqflags.h>
  32 #include <linux/irq_work.h>
  33 #include <linux/cpu.h>
  34 #include <linux/slab.h>
  35 #include <linux/sched/hotplug.h>
  36 #include <linux/sched/task_stack.h>
  37 #include <linux/crash_dump.h>
  38 #include <linux/kprobes.h>
  39 #include <asm/access-regs.h>
  40 #include <asm/asm-offsets.h>
  41 #include <asm/ctlreg.h>
  42 #include <asm/pfault.h>
  43 #include <asm/diag.h>
  44 #include <asm/facility.h>
  45 #include <asm/fpu.h>
  46 #include <asm/ipl.h>
  47 #include <asm/setup.h>
  48 #include <asm/irq.h>
  49 #include <asm/tlbflush.h>
  50 #include <asm/vtimer.h>
  51 #include <asm/abs_lowcore.h>
  52 #include <asm/sclp.h>
  53 #include <asm/debug.h>
  54 #include <asm/os_info.h>
  55 #include <asm/sigp.h>
  56 #include <asm/idle.h>
  57 #include <asm/nmi.h>
  58 #include <asm/stacktrace.h>
  59 #include <asm/topology.h>
  60 #include <asm/vdso.h>
  61 #include <asm/maccess.h>
  62 #include "entry.h"
  63
  64 enum {
  65         ec_schedule = 0,
  66         ec_call_function_single,
  67         ec_stop_cpu,
  68         ec_mcck_pending,
  69         ec_irq_work,
  70 };
  71
  72 enum {
  73         CPU_STATE_STANDBY,
  74         CPU_STATE_CONFIGURED,
  75 };
  76
  77 static u8 boot_core_type;
  78 DEFINE_PER_CPU(struct pcpu, pcpu_devices);
  79 /*
  80  * Pointer to the pcpu area of the boot CPU. This is required when a restart
  81  * interrupt is triggered on an offline CPU. For that case accessing percpu
  82  * data with the common primitives does not work, since the percpu offset is
  83  * stored in a non existent lowcore.
  84  */
  85 static struct pcpu *ipl_pcpu;
  86
  87 unsigned int smp_cpu_mt_shift;
  88 EXPORT_SYMBOL(smp_cpu_mt_shift);
  89
  90 unsigned int smp_cpu_mtid;
  91 EXPORT_SYMBOL(smp_cpu_mtid);
  92
  93 #ifdef CONFIG_CRASH_DUMP
  94 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
  95 #endif
  96
  97 static unsigned int smp_max_threads __initdata = -1U;
  98 cpumask_t cpu_setup_mask;
  99
 100 static int __init early_nosmt(char *s)
 101 {
 102         smp_max_threads = 1;
 103         return 0;
 104 }
 105 early_param("nosmt", early_nosmt);
 106
 107 static int __init early_smt(char *s)
 108 {
 109         get_option(&s, &smp_max_threads);
 110         return 0;
 111 }
 112 early_param("smt", early_smt);
 113
 114 /*
 115  * The smp_cpu_state_mutex must be held when changing the state or polarization
 116  * member of a pcpu data structure within the pcpu_devices array.
 117  */
 118 DEFINE_MUTEX(smp_cpu_state_mutex);
 119
 120 /*
 121  * Signal processor helper functions.
 122  */
 123 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
 124 {
 125         int cc;
 126
 127         while (1) {
 128                 cc = __pcpu_sigp(addr, order, parm, NULL);
 129                 if (cc != SIGP_CC_BUSY)
 130                         return cc;
 131                 cpu_relax();
 132         }
 133 }
 134
 135 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
 136 {
 137         int cc, retry;
 138
 139         for (retry = 0; ; retry++) {
 140                 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
 141                 if (cc != SIGP_CC_BUSY)
 142                         break;
 143                 if (retry >= 3)
 144                         udelay(10);
 145         }
 146         return cc;
 147 }
 148
 149 static inline int pcpu_stopped(struct pcpu *pcpu)
 150 {
 151         u32 status;
 152
 153         if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
 154                         0, &status) != SIGP_CC_STATUS_STORED)
 155                 return 0;
 156         return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
 157 }
 158
 159 static inline int pcpu_running(struct pcpu *pcpu)
 160 {
 161         if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
 162                         0, NULL) != SIGP_CC_STATUS_STORED)
 163                 return 1;
 164         /* Status stored condition code is equivalent to cpu not running. */
 165         return 0;
 166 }
 167
 168 /*
 169  * Find struct pcpu by cpu address.
 170  */
 171 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
 172 {
 173         int cpu;
 174
 175         for_each_cpu(cpu, mask)
 176                 if (per_cpu(pcpu_devices, cpu).address == address)
 177                         return &per_cpu(pcpu_devices, cpu);
 178         return NULL;
 179 }
 180
 181 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
 182 {
 183         int order;
 184
 185         if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
 186                 return;
 187         order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
 188         pcpu->ec_clk = get_tod_clock_fast();
 189         pcpu_sigp_retry(pcpu, order, 0);
 190 }
 191
 192 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
 193 {
 194         unsigned long async_stack, nodat_stack, mcck_stack;
 195         struct lowcore *lc;
 196
 197         lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
 198         nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
 199         async_stack = stack_alloc();
 200         mcck_stack = stack_alloc();
 201         if (!lc || !nodat_stack || !async_stack || !mcck_stack)
 202                 goto out;
 203         memcpy(lc, get_lowcore(), 512);
 204         memset((char *) lc + 512, 0, sizeof(*lc) - 512);
 205         lc->async_stack = async_stack + STACK_INIT_OFFSET;
 206         lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
 207         lc->mcck_stack = mcck_stack + STACK_INIT_OFFSET;
 208         lc->cpu_nr = cpu;
 209         lc->spinlock_lockval = arch_spin_lockval(cpu);
 210         lc->spinlock_index = 0;
 211         lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
 212         lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
 213         lc->preempt_count = PREEMPT_DISABLED;
 214         if (nmi_alloc_mcesa(&lc->mcesad))
 215                 goto out;
 216         if (abs_lowcore_map(cpu, lc, true))
 217                 goto out_mcesa;
 218         lowcore_ptr[cpu] = lc;
 219         pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, __pa(lc));
 220         return 0;
 221
 222 out_mcesa:
 223         nmi_free_mcesa(&lc->mcesad);
 224 out:
 225         stack_free(mcck_stack);
 226         stack_free(async_stack);
 227         free_pages(nodat_stack, THREAD_SIZE_ORDER);
 228         free_pages((unsigned long) lc, LC_ORDER);
 229         return -ENOMEM;
 230 }
 231
 232 static void pcpu_free_lowcore(struct pcpu *pcpu, int cpu)
 233 {
 234         unsigned long async_stack, nodat_stack, mcck_stack;
 235         struct lowcore *lc;
 236
 237         lc = lowcore_ptr[cpu];
 238         nodat_stack = lc->nodat_stack - STACK_INIT_OFFSET;
 239         async_stack = lc->async_stack - STACK_INIT_OFFSET;
 240         mcck_stack = lc->mcck_stack - STACK_INIT_OFFSET;
 241         pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
 242         lowcore_ptr[cpu] = NULL;
 243         abs_lowcore_unmap(cpu);
 244         nmi_free_mcesa(&lc->mcesad);
 245         stack_free(async_stack);
 246         stack_free(mcck_stack);
 247         free_pages(nodat_stack, THREAD_SIZE_ORDER);
 248         free_pages((unsigned long) lc, LC_ORDER);
 249 }
 250
 251 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
 252 {
 253         struct lowcore *lc, *abs_lc;
 254
 255         lc = lowcore_ptr[cpu];
 256         cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
 257         cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
 258         lc->cpu_nr = cpu;
 259         lc->pcpu = (unsigned long)pcpu;
 260         lc->restart_flags = RESTART_FLAG_CTLREGS;
 261         lc->spinlock_lockval = arch_spin_lockval(cpu);
 262         lc->spinlock_index = 0;
 263         lc->percpu_offset = __per_cpu_offset[cpu];
 264         lc->kernel_asce = get_lowcore()->kernel_asce;
 265         lc->user_asce = s390_invalid_asce;
 266         lc->machine_flags = get_lowcore()->machine_flags;
 267         lc->user_timer = lc->system_timer =
 268                 lc->steal_timer = lc->avg_steal_timer = 0;
 269         abs_lc = get_abs_lowcore();
 270         memcpy(lc->cregs_save_area, abs_lc->cregs_save_area, sizeof(lc->cregs_save_area));
 271         put_abs_lowcore(abs_lc);
 272         lc->cregs_save_area[1] = lc->kernel_asce;
 273         lc->cregs_save_area[7] = lc->user_asce;
 274         save_access_regs((unsigned int *) lc->access_regs_save_area);
 275         arch_spin_lock_setup(cpu);
 276 }
 277
 278 static void pcpu_attach_task(int cpu, struct task_struct *tsk)
 279 {
 280         struct lowcore *lc;
 281
 282         lc = lowcore_ptr[cpu];
 283         lc->kernel_stack = (unsigned long)task_stack_page(tsk) + STACK_INIT_OFFSET;
 284         lc->current_task = (unsigned long)tsk;
 285         lc->lpp = LPP_MAGIC;
 286         lc->current_pid = tsk->pid;
 287         lc->user_timer = tsk->thread.user_timer;
 288         lc->guest_timer = tsk->thread.guest_timer;
 289         lc->system_timer = tsk->thread.system_timer;
 290         lc->hardirq_timer = tsk->thread.hardirq_timer;
 291         lc->softirq_timer = tsk->thread.softirq_timer;
 292         lc->steal_timer = 0;
 293 }
 294
 295 static void pcpu_start_fn(int cpu, void (*func)(void *), void *data)
 296 {
 297         struct lowcore *lc;
 298
 299         lc = lowcore_ptr[cpu];
 300         lc->restart_stack = lc->kernel_stack;
 301         lc->restart_fn = (unsigned long) func;
 302         lc->restart_data = (unsigned long) data;
 303         lc->restart_source = -1U;
 304         pcpu_sigp_retry(per_cpu_ptr(&pcpu_devices, cpu), SIGP_RESTART, 0);
 305 }
 306
 307 typedef void (pcpu_delegate_fn)(void *);
 308
 309 /*
 310  * Call function via PSW restart on pcpu and stop the current cpu.
 311  */
 312 static void __pcpu_delegate(pcpu_delegate_fn *func, void *data)
 313 {
 314         func(data);     /* should not return */
 315 }
 316
 317 static void pcpu_delegate(struct pcpu *pcpu, int cpu,
 318                           pcpu_delegate_fn *func,
 319                           void *data, unsigned long stack)
 320 {
 321         struct lowcore *lc, *abs_lc;
 322         unsigned int source_cpu;
 323
 324         lc = lowcore_ptr[cpu];
 325         source_cpu = stap();
 326
 327         if (pcpu->address == source_cpu) {
 328                 call_on_stack(2, stack, void, __pcpu_delegate,
 329                               pcpu_delegate_fn *, func, void *, data);
 330         }
 331         /* Stop target cpu (if func returns this stops the current cpu). */
 332         pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
 333         pcpu_sigp_retry(pcpu, SIGP_CPU_RESET, 0);
 334         /* Restart func on the target cpu and stop the current cpu. */
 335         if (lc) {
 336                 lc->restart_stack = stack;
 337                 lc->restart_fn = (unsigned long)func;
 338                 lc->restart_data = (unsigned long)data;
 339                 lc->restart_source = source_cpu;
 340         } else {
 341                 abs_lc = get_abs_lowcore();
 342                 abs_lc->restart_stack = stack;
 343                 abs_lc->restart_fn = (unsigned long)func;
 344                 abs_lc->restart_data = (unsigned long)data;
 345                 abs_lc->restart_source = source_cpu;
 346                 put_abs_lowcore(abs_lc);
 347         }
 348         asm volatile(
 349                 "0:     sigp    0,%0,%2 # sigp restart to target cpu\n"
 350                 "       brc     2,0b    # busy, try again\n"
 351                 "1:     sigp    0,%1,%3 # sigp stop to current cpu\n"
 352                 "       brc     2,1b    # busy, try again\n"
 353                 : : "d" (pcpu->address), "d" (source_cpu),
 354                     "K" (SIGP_RESTART), "K" (SIGP_STOP)
 355                 : "0", "1", "cc");
 356         for (;;) ;
 357 }
 358
 359 /*
 360  * Enable additional logical cpus for multi-threading.
 361  */
 362 static int pcpu_set_smt(unsigned int mtid)
 363 {
 364         int cc;
 365
 366         if (smp_cpu_mtid == mtid)
 367                 return 0;
 368         cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
 369         if (cc == 0) {
 370                 smp_cpu_mtid = mtid;
 371                 smp_cpu_mt_shift = 0;
 372                 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
 373                         smp_cpu_mt_shift++;
 374                 per_cpu(pcpu_devices, 0).address = stap();
 375         }
 376         return cc;
 377 }
 378
 379 /*
 380  * Call function on the ipl CPU.
 381  */
 382 void smp_call_ipl_cpu(void (*func)(void *), void *data)
 383 {
 384         struct lowcore *lc = lowcore_ptr[0];
 385
 386         if (ipl_pcpu->address == stap())
 387                 lc = get_lowcore();
 388
 389         pcpu_delegate(ipl_pcpu, 0, func, data, lc->nodat_stack);
 390 }
 391
 392 int smp_find_processor_id(u16 address)
 393 {
 394         int cpu;
 395
 396         for_each_present_cpu(cpu)
 397                 if (per_cpu(pcpu_devices, cpu).address == address)
 398                         return cpu;
 399         return -1;
 400 }
 401
 402 void schedule_mcck_handler(void)
 403 {
 404         pcpu_ec_call(this_cpu_ptr(&pcpu_devices), ec_mcck_pending);
 405 }
 406
 407 bool notrace arch_vcpu_is_preempted(int cpu)
 408 {
 409         if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
 410                 return false;
 411         if (pcpu_running(per_cpu_ptr(&pcpu_devices, cpu)))
 412                 return false;
 413         return true;
 414 }
 415 EXPORT_SYMBOL(arch_vcpu_is_preempted);
 416
 417 void notrace smp_yield_cpu(int cpu)
 418 {
 419         if (!MACHINE_HAS_DIAG9C)
 420                 return;
 421         diag_stat_inc_norecursion(DIAG_STAT_X09C);
 422         asm volatile("diag %0,0,0x9c"
 423                      : : "d" (per_cpu(pcpu_devices, cpu).address));
 424 }
 425 EXPORT_SYMBOL_GPL(smp_yield_cpu);
 426
 427 /*
 428  * Send cpus emergency shutdown signal. This gives the cpus the
 429  * opportunity to complete outstanding interrupts.
 430  */
 431 void notrace smp_emergency_stop(void)
 432 {
 433         static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
 434         static cpumask_t cpumask;
 435         u64 end;
 436         int cpu;
 437
 438         arch_spin_lock(&lock);
 439         cpumask_copy(&cpumask, cpu_online_mask);
 440         cpumask_clear_cpu(smp_processor_id(), &cpumask);
 441
 442         end = get_tod_clock() + (1000000UL << 12);
 443         for_each_cpu(cpu, &cpumask) {
 444                 struct pcpu *pcpu = per_cpu_ptr(&pcpu_devices, cpu);
 445                 set_bit(ec_stop_cpu, &pcpu->ec_mask);
 446                 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
 447                                    0, NULL) == SIGP_CC_BUSY &&
 448                        get_tod_clock() < end)
 449                         cpu_relax();
 450         }
 451         while (get_tod_clock() < end) {
 452                 for_each_cpu(cpu, &cpumask)
 453                         if (pcpu_stopped(per_cpu_ptr(&pcpu_devices, cpu)))
 454                                 cpumask_clear_cpu(cpu, &cpumask);
 455                 if (cpumask_empty(&cpumask))
 456                         break;
 457                 cpu_relax();
 458         }
 459         arch_spin_unlock(&lock);
 460 }
 461 NOKPROBE_SYMBOL(smp_emergency_stop);
 462
 463 /*
 464  * Stop all cpus but the current one.
 465  */
 466 void smp_send_stop(void)
 467 {
 468         struct pcpu *pcpu;
 469         int cpu;
 470
 471         /* Disable all interrupts/machine checks */
 472         __load_psw_mask(PSW_KERNEL_BITS);
 473         trace_hardirqs_off();
 474
 475         debug_set_critical();
 476
 477         if (oops_in_progress)
 478                 smp_emergency_stop();
 479
 480         /* stop all processors */
 481         for_each_online_cpu(cpu) {
 482                 if (cpu == smp_processor_id())
 483                         continue;
 484                 pcpu = per_cpu_ptr(&pcpu_devices, cpu);
 485                 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
 486                 while (!pcpu_stopped(pcpu))
 487                         cpu_relax();
 488         }
 489 }
 490
 491 /*
 492  * This is the main routine where commands issued by other
 493  * cpus are handled.
 494  */
 495 static void smp_handle_ext_call(void)
 496 {
 497         unsigned long bits;
 498
 499         /* handle bit signal external calls */
 500         bits = this_cpu_xchg(pcpu_devices.ec_mask, 0);
 501         if (test_bit(ec_stop_cpu, &bits))
 502                 smp_stop_cpu();
 503         if (test_bit(ec_schedule, &bits))
 504                 scheduler_ipi();
 505         if (test_bit(ec_call_function_single, &bits))
 506                 generic_smp_call_function_single_interrupt();
 507         if (test_bit(ec_mcck_pending, &bits))
 508                 s390_handle_mcck();
 509         if (test_bit(ec_irq_work, &bits))
 510                 irq_work_run();
 511 }
 512
 513 static void do_ext_call_interrupt(struct ext_code ext_code,
 514                                   unsigned int param32, unsigned long param64)
 515 {
 516         inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
 517         smp_handle_ext_call();
 518 }
 519
 520 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 521 {
 522         int cpu;
 523
 524         for_each_cpu(cpu, mask)
 525                 pcpu_ec_call(per_cpu_ptr(&pcpu_devices, cpu), ec_call_function_single);
 526 }
 527
 528 void arch_send_call_function_single_ipi(int cpu)
 529 {
 530         pcpu_ec_call(per_cpu_ptr(&pcpu_devices, cpu), ec_call_function_single);
 531 }
 532
 533 /*
 534  * this function sends a 'reschedule' IPI to another CPU.
 535  * it goes straight through and wastes no time serializing
 536  * anything. Worst case is that we lose a reschedule ...
 537  */
 538 void arch_smp_send_reschedule(int cpu)
 539 {
 540         pcpu_ec_call(per_cpu_ptr(&pcpu_devices, cpu), ec_schedule);
 541 }
 542
 543 #ifdef CONFIG_IRQ_WORK
 544 void arch_irq_work_raise(void)
 545 {
 546         pcpu_ec_call(this_cpu_ptr(&pcpu_devices), ec_irq_work);
 547 }
 548 #endif
 549
 550 #ifdef CONFIG_CRASH_DUMP
 551
 552 int smp_store_status(int cpu)
 553 {
 554         struct lowcore *lc;
 555         struct pcpu *pcpu;
 556         unsigned long pa;
 557
 558         pcpu = per_cpu_ptr(&pcpu_devices, cpu);
 559         lc = lowcore_ptr[cpu];
 560         pa = __pa(&lc->floating_pt_save_area);
 561         if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
 562                               pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
 563                 return -EIO;
 564         if (!cpu_has_vx() && !MACHINE_HAS_GS)
 565                 return 0;
 566         pa = lc->mcesad & MCESA_ORIGIN_MASK;
 567         if (MACHINE_HAS_GS)
 568                 pa |= lc->mcesad & MCESA_LC_MASK;
 569         if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
 570                               pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
 571                 return -EIO;
 572         return 0;
 573 }
 574
 575 /*
 576  * Collect CPU state of the previous, crashed system.
 577  * There are three cases:
 578  * 1) standard zfcp/nvme dump
 579  *    condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true
 580  *    The state for all CPUs except the boot CPU needs to be collected
 581  *    with sigp stop-and-store-status. The boot CPU state is located in
 582  *    the absolute lowcore of the memory stored in the HSA. The zcore code
 583  *    will copy the boot CPU state from the HSA.
 584  * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory)
 585  *    condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true
 586  *    The state for all CPUs except the boot CPU needs to be collected
 587  *    with sigp stop-and-store-status. The firmware or the boot-loader
 588  *    stored the registers of the boot CPU in the absolute lowcore in the
 589  *    memory of the old system.
 590  * 3) kdump or stand-alone kdump for DASD
 591  *    condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == false
 592  *    The state for all CPUs except the boot CPU needs to be collected
 593  *    with sigp stop-and-store-status. The kexec code or the boot-loader
 594  *    stored the registers of the boot CPU in the memory of the old system.
 595  *
 596  * Note that the legacy kdump mode where the old kernel stored the CPU states
 597  * does no longer exist: setup_arch() explicitly deactivates the elfcorehdr=
 598  * kernel parameter. The is_kdump_kernel() implementation on s390 is independent
 599  * of the elfcorehdr= parameter.
 600  */
 601 static bool dump_available(void)
 602 {
 603         return oldmem_data.start || is_ipl_type_dump();
 604 }
 605
 606 void __init smp_save_dump_ipl_cpu(void)
 607 {
 608         struct save_area *sa;
 609         void *regs;
 610
 611         if (!dump_available())
 612                 return;
 613         sa = save_area_alloc(true);
 614         regs = memblock_alloc(512, 8);
 615         if (!sa || !regs)
 616                 panic("could not allocate memory for boot CPU save area\n");
 617         copy_oldmem_kernel(regs, __LC_FPREGS_SAVE_AREA, 512);
 618         save_area_add_regs(sa, regs);
 619         memblock_free(regs, 512);
 620         if (cpu_has_vx())
 621                 save_area_add_vxrs(sa, boot_cpu_vector_save_area);
 622 }
 623
 624 void __init smp_save_dump_secondary_cpus(void)
 625 {
 626         int addr, boot_cpu_addr, max_cpu_addr;
 627         struct save_area *sa;
 628         void *page;
 629
 630         if (!dump_available())
 631                 return;
 632         /* Allocate a page as dumping area for the store status sigps */
 633         page = memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);
 634         if (!page)
 635                 panic("ERROR: Failed to allocate %lx bytes below %lx\n",
 636                       PAGE_SIZE, 1UL << 31);
 637
 638         /* Set multi-threading state to the previous system. */
 639         pcpu_set_smt(sclp.mtid_prev);
 640         boot_cpu_addr = stap();
 641         max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
 642         for (addr = 0; addr <= max_cpu_addr; addr++) {
 643                 if (addr == boot_cpu_addr)
 644                         continue;
 645                 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
 646                     SIGP_CC_NOT_OPERATIONAL)
 647                         continue;
 648                 sa = save_area_alloc(false);
 649                 if (!sa)
 650                         panic("could not allocate memory for save area\n");
 651                 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, __pa(page));
 652                 save_area_add_regs(sa, page);
 653                 if (cpu_has_vx()) {
 654                         __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, __pa(page));
 655                         save_area_add_vxrs(sa, page);
 656                 }
 657         }
 658         memblock_free(page, PAGE_SIZE);
 659         diag_amode31_ops.diag308_reset();
 660         pcpu_set_smt(0);
 661 }
 662 #endif /* CONFIG_CRASH_DUMP */
 663
 664 void smp_cpu_set_polarization(int cpu, int val)
 665 {
 666         per_cpu(pcpu_devices, cpu).polarization = val;
 667 }
 668
 669 int smp_cpu_get_polarization(int cpu)
 670 {
 671         return per_cpu(pcpu_devices, cpu).polarization;
 672 }
 673
 674 void smp_cpu_set_capacity(int cpu, unsigned long val)
 675 {
 676         per_cpu(pcpu_devices, cpu).capacity = val;
 677 }
 678
 679 unsigned long smp_cpu_get_capacity(int cpu)
 680 {
 681         return per_cpu(pcpu_devices, cpu).capacity;
 682 }
 683
 684 void smp_set_core_capacity(int cpu, unsigned long val)
 685 {
 686         int i;
 687
 688         cpu = smp_get_base_cpu(cpu);
 689         for (i = cpu; (i <= cpu + smp_cpu_mtid) && (i < nr_cpu_ids); i++)
 690                 smp_cpu_set_capacity(i, val);
 691 }
 692
 693 int smp_cpu_get_cpu_address(int cpu)
 694 {
 695         return per_cpu(pcpu_devices, cpu).address;
 696 }
 697
 698 static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
 699 {
 700         static int use_sigp_detection;
 701         int address;
 702
 703         if (use_sigp_detection || sclp_get_core_info(info, early)) {
 704                 use_sigp_detection = 1;
 705                 for (address = 0;
 706                      address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
 707                      address += (1U << smp_cpu_mt_shift)) {
 708                         if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
 709                             SIGP_CC_NOT_OPERATIONAL)
 710                                 continue;
 711                         info->core[info->configured].core_id =
 712                                 address >> smp_cpu_mt_shift;
 713                         info->configured++;
 714                 }
 715                 info->combined = info->configured;
 716         }
 717 }
 718
 719 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
 720                         bool configured, bool early)
 721 {
 722         struct pcpu *pcpu;
 723         int cpu, nr, i;
 724         u16 address;
 725
 726         nr = 0;
 727         if (sclp.has_core_type && core->type != boot_core_type)
 728                 return nr;
 729         cpu = cpumask_first(avail);
 730         address = core->core_id << smp_cpu_mt_shift;
 731         for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
 732                 if (pcpu_find_address(cpu_present_mask, address + i))
 733                         continue;
 734                 pcpu = per_cpu_ptr(&pcpu_devices, cpu);
 735                 pcpu->address = address + i;
 736                 if (configured)
 737                         pcpu->state = CPU_STATE_CONFIGURED;
 738                 else
 739                         pcpu->state = CPU_STATE_STANDBY;
 740                 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
 741                 smp_cpu_set_capacity(cpu, CPU_CAPACITY_HIGH);
 742                 set_cpu_present(cpu, true);
 743                 if (!early && arch_register_cpu(cpu))
 744                         set_cpu_present(cpu, false);
 745                 else
 746                         nr++;
 747                 cpumask_clear_cpu(cpu, avail);
 748                 cpu = cpumask_next(cpu, avail);
 749         }
 750         return nr;
 751 }
 752
 753 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
 754 {
 755         struct sclp_core_entry *core;
 756         static cpumask_t avail;
 757         bool configured;
 758         u16 core_id;
 759         int nr, i;
 760
 761         cpus_read_lock();
 762         mutex_lock(&smp_cpu_state_mutex);
 763         nr = 0;
 764         cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
 765         /*
 766          * Add IPL core first (which got logical CPU number 0) to make sure
 767          * that all SMT threads get subsequent logical CPU numbers.
 768          */
 769         if (early) {
 770                 core_id = per_cpu(pcpu_devices, 0).address >> smp_cpu_mt_shift;
 771                 for (i = 0; i < info->configured; i++) {
 772                         core = &info->core[i];
 773                         if (core->core_id == core_id) {
 774                                 nr += smp_add_core(core, &avail, true, early);
 775                                 break;
 776                         }
 777                 }
 778         }
 779         for (i = 0; i < info->combined; i++) {
 780                 configured = i < info->configured;
 781                 nr += smp_add_core(&info->core[i], &avail, configured, early);
 782         }
 783         mutex_unlock(&smp_cpu_state_mutex);
 784         cpus_read_unlock();
 785         return nr;
 786 }
 787
 788 void __init smp_detect_cpus(void)
 789 {
 790         unsigned int cpu, mtid, c_cpus, s_cpus;
 791         struct sclp_core_info *info;
 792         u16 address;
 793
 794         /* Get CPU information */
 795         info = memblock_alloc(sizeof(*info), 8);
 796         if (!info)
 797                 panic("%s: Failed to allocate %zu bytes align=0x%x\n",
 798                       __func__, sizeof(*info), 8);
 799         smp_get_core_info(info, 1);
 800         /* Find boot CPU type */
 801         if (sclp.has_core_type) {
 802                 address = stap();
 803                 for (cpu = 0; cpu < info->combined; cpu++)
 804                         if (info->core[cpu].core_id == address) {
 805                                 /* The boot cpu dictates the cpu type. */
 806                                 boot_core_type = info->core[cpu].type;
 807                                 break;
 808                         }
 809                 if (cpu >= info->combined)
 810                         panic("Could not find boot CPU type");
 811         }
 812
 813         /* Set multi-threading state for the current system */
 814         mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
 815         mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
 816         pcpu_set_smt(mtid);
 817
 818         /* Print number of CPUs */
 819         c_cpus = s_cpus = 0;
 820         for (cpu = 0; cpu < info->combined; cpu++) {
 821                 if (sclp.has_core_type &&
 822                     info->core[cpu].type != boot_core_type)
 823                         continue;
 824                 if (cpu < info->configured)
 825                         c_cpus += smp_cpu_mtid + 1;
 826                 else
 827                         s_cpus += smp_cpu_mtid + 1;
 828         }
 829         pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
 830         memblock_free(info, sizeof(*info));
 831 }
 832
 833 /*
 834  *      Activate a secondary processor.
 835  */
 836 static void smp_start_secondary(void *cpuvoid)
 837 {
 838         struct lowcore *lc = get_lowcore();
 839         int cpu = raw_smp_processor_id();
 840
 841         lc->last_update_clock = get_tod_clock();
 842         lc->restart_stack = (unsigned long)restart_stack;
 843         lc->restart_fn = (unsigned long)do_restart;
 844         lc->restart_data = 0;
 845         lc->restart_source = -1U;
 846         lc->restart_flags = 0;
 847         restore_access_regs(lc->access_regs_save_area);
 848         cpu_init();
 849         rcutree_report_cpu_starting(cpu);
 850         init_cpu_timer();
 851         vtime_init();
 852         vdso_getcpu_init();
 853         pfault_init();
 854         cpumask_set_cpu(cpu, &cpu_setup_mask);
 855         update_cpu_masks();
 856         notify_cpu_starting(cpu);
 857         if (topology_cpu_dedicated(cpu))
 858                 set_cpu_flag(CIF_DEDICATED_CPU);
 859         else
 860                 clear_cpu_flag(CIF_DEDICATED_CPU);
 861         set_cpu_online(cpu, true);
 862         inc_irq_stat(CPU_RST);
 863         local_irq_enable();
 864         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 865 }
 866
 867 /* Upping and downing of CPUs */
 868 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 869 {
 870         struct pcpu *pcpu = per_cpu_ptr(&pcpu_devices, cpu);
 871         int rc;
 872
 873         if (pcpu->state != CPU_STATE_CONFIGURED)
 874                 return -EIO;
 875         if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
 876             SIGP_CC_ORDER_CODE_ACCEPTED)
 877                 return -EIO;
 878
 879         rc = pcpu_alloc_lowcore(pcpu, cpu);
 880         if (rc)
 881                 return rc;
 882         /*
 883          * Make sure global control register contents do not change
 884          * until new CPU has initialized control registers.
 885          */
 886         system_ctlreg_lock();
 887         pcpu_prepare_secondary(pcpu, cpu);
 888         pcpu_attach_task(cpu, tidle);
 889         pcpu_start_fn(cpu, smp_start_secondary, NULL);
 890         /* Wait until cpu puts itself in the online & active maps */
 891         while (!cpu_online(cpu))
 892                 cpu_relax();
 893         system_ctlreg_unlock();
 894         return 0;
 895 }
 896
 897 static unsigned int setup_possible_cpus __initdata;
 898
 899 static int __init _setup_possible_cpus(char *s)
 900 {
 901         get_option(&s, &setup_possible_cpus);
 902         return 0;
 903 }
 904 early_param("possible_cpus", _setup_possible_cpus);
 905
 906 int __cpu_disable(void)
 907 {
 908         struct ctlreg cregs[16];
 909         int cpu;
 910
 911         /* Handle possible pending IPIs */
 912         smp_handle_ext_call();
 913         cpu = smp_processor_id();
 914         set_cpu_online(cpu, false);
 915         cpumask_clear_cpu(cpu, &cpu_setup_mask);
 916         update_cpu_masks();
 917         /* Disable pseudo page faults on this cpu. */
 918         pfault_fini();
 919         /* Disable interrupt sources via control register. */
 920         __local_ctl_store(0, 15, cregs);
 921         cregs[0].val  &= ~0x0000ee70UL; /* disable all external interrupts */
 922         cregs[6].val  &= ~0xff000000UL; /* disable all I/O interrupts */
 923         cregs[14].val &= ~0x1f000000UL; /* disable most machine checks */
 924         __local_ctl_load(0, 15, cregs);
 925         clear_cpu_flag(CIF_NOHZ_DELAY);
 926         return 0;
 927 }
 928
 929 void __cpu_die(unsigned int cpu)
 930 {
 931         struct pcpu *pcpu;
 932
 933         /* Wait until target cpu is down */
 934         pcpu = per_cpu_ptr(&pcpu_devices, cpu);
 935         while (!pcpu_stopped(pcpu))
 936                 cpu_relax();
 937         pcpu_free_lowcore(pcpu, cpu);
 938         cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
 939         cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
 940         pcpu->flags = 0;
 941 }
 942
 943 void __noreturn cpu_die(void)
 944 {
 945         idle_task_exit();
 946         pcpu_sigp_retry(this_cpu_ptr(&pcpu_devices), SIGP_STOP, 0);
 947         for (;;) ;
 948 }
 949
 950 void __init smp_fill_possible_mask(void)
 951 {
 952         unsigned int possible, sclp_max, cpu;
 953
 954         sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
 955         sclp_max = min(smp_max_threads, sclp_max);
 956         sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
 957         possible = setup_possible_cpus ?: nr_cpu_ids;
 958         possible = min(possible, sclp_max);
 959         for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
 960                 set_cpu_possible(cpu, true);
 961 }
 962
 963 void __init smp_prepare_cpus(unsigned int max_cpus)
 964 {
 965         if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
 966                 panic("Couldn't request external interrupt 0x1201");
 967         system_ctl_set_bit(0, 14);
 968         if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
 969                 panic("Couldn't request external interrupt 0x1202");
 970         system_ctl_set_bit(0, 13);
 971         smp_rescan_cpus(true);
 972 }
 973
 974 void __init smp_prepare_boot_cpu(void)
 975 {
 976         struct lowcore *lc = get_lowcore();
 977
 978         WARN_ON(!cpu_present(0) || !cpu_online(0));
 979         lc->percpu_offset = __per_cpu_offset[0];
 980         ipl_pcpu = per_cpu_ptr(&pcpu_devices, 0);
 981         ipl_pcpu->state = CPU_STATE_CONFIGURED;
 982         lc->pcpu = (unsigned long)ipl_pcpu;
 983         smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
 984         smp_cpu_set_capacity(0, CPU_CAPACITY_HIGH);
 985 }
 986
 987 void __init smp_setup_processor_id(void)
 988 {
 989         struct lowcore *lc = get_lowcore();
 990
 991         lc->cpu_nr = 0;
 992         per_cpu(pcpu_devices, 0).address = stap();
 993         lc->spinlock_lockval = arch_spin_lockval(0);
 994         lc->spinlock_index = 0;
 995 }
 996
 997 /*
 998  * the frequency of the profiling timer can be changed
 999  * by writing a multiplier value into /proc/profile.
1000  *
1001  * usually you want to run this on all CPUs ;)
1002  */
1003 int setup_profiling_timer(unsigned int multiplier)
1004 {
1005         return 0;
1006 }
1007
1008 static ssize_t cpu_configure_show(struct device *dev,
1009                                   struct device_attribute *attr, char *buf)
1010 {
1011         ssize_t count;
1012
1013         mutex_lock(&smp_cpu_state_mutex);
1014         count = sysfs_emit(buf, "%d\n", per_cpu(pcpu_devices, dev->id).state);
1015         mutex_unlock(&smp_cpu_state_mutex);
1016         return count;
1017 }
1018
1019 static ssize_t cpu_configure_store(struct device *dev,
1020                                    struct device_attribute *attr,
1021                                    const char *buf, size_t count)
1022 {
1023         struct pcpu *pcpu;
1024         int cpu, val, rc, i;
1025         char delim;
1026
1027         if (sscanf(buf, "%d %c", &val, &delim) != 1)
1028                 return -EINVAL;
1029         if (val != 0 && val != 1)
1030                 return -EINVAL;
1031         cpus_read_lock();
1032         mutex_lock(&smp_cpu_state_mutex);
1033         rc = -EBUSY;
1034         /* disallow configuration changes of online cpus */
1035         cpu = dev->id;
1036         cpu = smp_get_base_cpu(cpu);
1037         for (i = 0; i <= smp_cpu_mtid; i++)
1038                 if (cpu_online(cpu + i))
1039                         goto out;
1040         pcpu = per_cpu_ptr(&pcpu_devices, cpu);
1041         rc = 0;
1042         switch (val) {
1043         case 0:
1044                 if (pcpu->state != CPU_STATE_CONFIGURED)
1045                         break;
1046                 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1047                 if (rc)
1048                         break;
1049                 for (i = 0; i <= smp_cpu_mtid; i++) {
1050                         if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1051                                 continue;
1052                         per_cpu(pcpu_devices, cpu + i).state = CPU_STATE_STANDBY;
1053                         smp_cpu_set_polarization(cpu + i,
1054                                                  POLARIZATION_UNKNOWN);
1055                 }
1056                 topology_expect_change();
1057                 break;
1058         case 1:
1059                 if (pcpu->state != CPU_STATE_STANDBY)
1060                         break;
1061                 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1062                 if (rc)
1063                         break;
1064                 for (i = 0; i <= smp_cpu_mtid; i++) {
1065                         if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1066                                 continue;
1067                         per_cpu(pcpu_devices, cpu + i).state = CPU_STATE_CONFIGURED;
1068                         smp_cpu_set_polarization(cpu + i,
1069                                                  POLARIZATION_UNKNOWN);
1070                 }
1071                 topology_expect_change();
1072                 break;
1073         default:
1074                 break;
1075         }
1076 out:
1077         mutex_unlock(&smp_cpu_state_mutex);
1078         cpus_read_unlock();
1079         return rc ? rc : count;
1080 }
1081 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1082
1083 static ssize_t show_cpu_address(struct device *dev,
1084                                 struct device_attribute *attr, char *buf)
1085 {
1086         return sysfs_emit(buf, "%d\n", per_cpu(pcpu_devices, dev->id).address);
1087 }
1088 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1089
1090 static struct attribute *cpu_common_attrs[] = {
1091         &dev_attr_configure.attr,
1092         &dev_attr_address.attr,
1093         NULL,
1094 };
1095
1096 static struct attribute_group cpu_common_attr_group = {
1097         .attrs = cpu_common_attrs,
1098 };
1099
1100 static struct attribute *cpu_online_attrs[] = {
1101         &dev_attr_idle_count.attr,
1102         &dev_attr_idle_time_us.attr,
1103         NULL,
1104 };
1105
1106 static struct attribute_group cpu_online_attr_group = {
1107         .attrs = cpu_online_attrs,
1108 };
1109
1110 static int smp_cpu_online(unsigned int cpu)
1111 {
1112         struct cpu *c = per_cpu_ptr(&cpu_devices, cpu);
1113
1114         return sysfs_create_group(&c->dev.kobj, &cpu_online_attr_group);
1115 }
1116
1117 static int smp_cpu_pre_down(unsigned int cpu)
1118 {
1119         struct cpu *c = per_cpu_ptr(&cpu_devices, cpu);
1120
1121         sysfs_remove_group(&c->dev.kobj, &cpu_online_attr_group);
1122         return 0;
1123 }
1124
1125 bool arch_cpu_is_hotpluggable(int cpu)
1126 {
1127         return !!cpu;
1128 }
1129
1130 int arch_register_cpu(int cpu)
1131 {
1132         struct cpu *c = per_cpu_ptr(&cpu_devices, cpu);
1133         int rc;
1134
1135         c->hotpluggable = arch_cpu_is_hotpluggable(cpu);
1136         rc = register_cpu(c, cpu);
1137         if (rc)
1138                 goto out;
1139         rc = sysfs_create_group(&c->dev.kobj, &cpu_common_attr_group);
1140         if (rc)
1141                 goto out_cpu;
1142         rc = topology_cpu_init(c);
1143         if (rc)
1144                 goto out_topology;
1145         return 0;
1146
1147 out_topology:
1148         sysfs_remove_group(&c->dev.kobj, &cpu_common_attr_group);
1149 out_cpu:
1150         unregister_cpu(c);
1151 out:
1152         return rc;
1153 }
1154
1155 int __ref smp_rescan_cpus(bool early)
1156 {
1157         struct sclp_core_info *info;
1158         int nr;
1159
1160         info = kzalloc(sizeof(*info), GFP_KERNEL);
1161         if (!info)
1162                 return -ENOMEM;
1163         smp_get_core_info(info, 0);
1164         nr = __smp_rescan_cpus(info, early);
1165         kfree(info);
1166         if (nr)
1167                 topology_schedule_update();
1168         return 0;
1169 }
1170
1171 static ssize_t __ref rescan_store(struct device *dev,
1172                                   struct device_attribute *attr,
1173                                   const char *buf,
1174                                   size_t count)
1175 {
1176         int rc;
1177
1178         rc = lock_device_hotplug_sysfs();
1179         if (rc)
1180                 return rc;
1181         rc = smp_rescan_cpus(false);
1182         unlock_device_hotplug();
1183         return rc ? rc : count;
1184 }
1185 static DEVICE_ATTR_WO(rescan);
1186
1187 static int __init s390_smp_init(void)
1188 {
1189         struct device *dev_root;
1190         int rc;
1191
1192         dev_root = bus_get_dev_root(&cpu_subsys);
1193         if (dev_root) {
1194                 rc = device_create_file(dev_root, &dev_attr_rescan);
1195                 put_device(dev_root);
1196                 if (rc)
1197                         return rc;
1198         }
1199         rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1200                                smp_cpu_online, smp_cpu_pre_down);
1201         rc = rc <= 0 ? rc : 0;
1202         return rc;
1203 }
1204 subsys_initcall(s390_smp_init);