1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2015-2016, Aneesh Kumar K.V, IBM Corporation.
6 #include <linux/sched.h>
7 #include <linux/mm_types.h>
8 #include <linux/memblock.h>
9 #include <linux/memremap.h>
10 #include <linux/pkeys.h>
11 #include <linux/debugfs.h>
12 #include <linux/proc_fs.h>
13 #include <misc/cxl-base.h>
15 #include <asm/pgalloc.h>
17 #include <asm/trace.h>
18 #include <asm/powernv.h>
19 #include <asm/firmware.h>
20 #include <asm/ultravisor.h>
21 #include <asm/kexec.h>
23 #include <mm/mmu_decl.h>
24 #include <trace/events/thp.h>
28 struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
29 EXPORT_SYMBOL_GPL(mmu_psize_defs);
31 #ifdef CONFIG_SPARSEMEM_VMEMMAP
32 int mmu_vmemmap_psize = MMU_PAGE_4K;
35 unsigned long __pmd_frag_nr;
36 EXPORT_SYMBOL(__pmd_frag_nr);
37 unsigned long __pmd_frag_size_shift;
38 EXPORT_SYMBOL(__pmd_frag_size_shift);
41 extern bool kfence_early_init;
42 static int __init parse_kfence_early_init(char *arg)
46 if (get_option(&arg, &val))
47 kfence_early_init = !!val;
50 early_param("kfence.sample_interval", parse_kfence_early_init);
53 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
55 * This is called when relaxing access to a hugepage. It's also called in the page
56 * fault path when we don't hit any of the major fault cases, ie, a minor
57 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
58 * handled those two for us, we additionally deal with missing execute
59 * permission here on some processors
61 int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
62 pmd_t *pmdp, pmd_t entry, int dirty)
65 #ifdef CONFIG_DEBUG_VM
66 WARN_ON(!pmd_trans_huge(*pmdp) && !pmd_devmap(*pmdp));
67 assert_spin_locked(pmd_lockptr(vma->vm_mm, pmdp));
69 changed = !pmd_same(*(pmdp), entry);
72 * We can use MMU_PAGE_2M here, because only radix
73 * path look at the psize.
75 __ptep_set_access_flags(vma, pmdp_ptep(pmdp),
76 pmd_pte(entry), address, MMU_PAGE_2M);
81 int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
82 pud_t *pudp, pud_t entry, int dirty)
85 #ifdef CONFIG_DEBUG_VM
86 WARN_ON(!pud_devmap(*pudp));
87 assert_spin_locked(pud_lockptr(vma->vm_mm, pudp));
89 changed = !pud_same(*(pudp), entry);
92 * We can use MMU_PAGE_1G here, because only radix
93 * path look at the psize.
95 __ptep_set_access_flags(vma, pudp_ptep(pudp),
96 pud_pte(entry), address, MMU_PAGE_1G);
102 int pmdp_test_and_clear_young(struct vm_area_struct *vma,
103 unsigned long address, pmd_t *pmdp)
105 return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
108 int pudp_test_and_clear_young(struct vm_area_struct *vma,
109 unsigned long address, pud_t *pudp)
111 return __pudp_test_and_clear_young(vma->vm_mm, address, pudp);
115 * set a new huge pmd. We should not be called for updating
116 * an existing pmd entry. That should go via pmd_hugepage_update.
118 void set_pmd_at(struct mm_struct *mm, unsigned long addr,
119 pmd_t *pmdp, pmd_t pmd)
121 #ifdef CONFIG_DEBUG_VM
123 * Make sure hardware valid bit is not set. We don't do
124 * tlb flush for this update.
127 WARN_ON(pte_hw_valid(pmd_pte(*pmdp)) && !pte_protnone(pmd_pte(*pmdp)));
128 assert_spin_locked(pmd_lockptr(mm, pmdp));
129 WARN_ON(!(pmd_leaf(pmd)));
131 trace_hugepage_set_pmd(addr, pmd_val(pmd));
132 return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));
135 void set_pud_at(struct mm_struct *mm, unsigned long addr,
136 pud_t *pudp, pud_t pud)
138 #ifdef CONFIG_DEBUG_VM
140 * Make sure hardware valid bit is not set. We don't do
141 * tlb flush for this update.
144 WARN_ON(pte_hw_valid(pud_pte(*pudp)));
145 assert_spin_locked(pud_lockptr(mm, pudp));
146 WARN_ON(!(pud_leaf(pud)));
148 trace_hugepage_set_pud(addr, pud_val(pud));
149 return set_pte_at(mm, addr, pudp_ptep(pudp), pud_pte(pud));
152 static void do_serialize(void *arg)
154 /* We've taken the IPI, so try to trim the mask while here */
155 if (radix_enabled()) {
156 struct mm_struct *mm = arg;
157 exit_lazy_flush_tlb(mm, false);
162 * Serialize against __find_linux_pte() which does lock-less
163 * lookup in page tables with local interrupts disabled. For huge pages
164 * it casts pmd_t to pte_t. Since format of pte_t is different from
165 * pmd_t we want to prevent transit from pmd pointing to page table
166 * to pmd pointing to huge page (and back) while interrupts are disabled.
167 * We clear pmd to possibly replace it with page table pointer in
168 * different code paths. So make sure we wait for the parallel
169 * __find_linux_pte() to finish.
171 void serialize_against_pte_lookup(struct mm_struct *mm)
174 smp_call_function_many(mm_cpumask(mm), do_serialize, mm, 1);
178 * We use this to invalidate a pmdp entry before switching from a
179 * hugepte to regular pmd entry.
181 pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
184 unsigned long old_pmd;
186 VM_WARN_ON_ONCE(!pmd_present(*pmdp));
187 old_pmd = pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, _PAGE_INVALID);
188 flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
189 return __pmd(old_pmd);
192 pud_t pudp_invalidate(struct vm_area_struct *vma, unsigned long address,
195 unsigned long old_pud;
197 VM_WARN_ON_ONCE(!pud_present(*pudp));
198 old_pud = pud_hugepage_update(vma->vm_mm, address, pudp, _PAGE_PRESENT, _PAGE_INVALID);
199 flush_pud_tlb_range(vma, address, address + HPAGE_PUD_SIZE);
200 return __pud(old_pud);
203 pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
204 unsigned long addr, pmd_t *pmdp, int full)
207 VM_BUG_ON(addr & ~HPAGE_PMD_MASK);
208 VM_BUG_ON((pmd_present(*pmdp) && !pmd_trans_huge(*pmdp) &&
209 !pmd_devmap(*pmdp)) || !pmd_present(*pmdp));
210 pmd = pmdp_huge_get_and_clear(vma->vm_mm, addr, pmdp);
212 * if it not a fullmm flush, then we can possibly end up converting
213 * this PMD pte entry to a regular level 0 PTE by a parallel page fault.
214 * Make sure we flush the tlb in this case.
217 flush_pmd_tlb_range(vma, addr, addr + HPAGE_PMD_SIZE);
221 pud_t pudp_huge_get_and_clear_full(struct vm_area_struct *vma,
222 unsigned long addr, pud_t *pudp, int full)
226 VM_BUG_ON(addr & ~HPAGE_PMD_MASK);
227 VM_BUG_ON((pud_present(*pudp) && !pud_devmap(*pudp)) ||
228 !pud_present(*pudp));
229 pud = pudp_huge_get_and_clear(vma->vm_mm, addr, pudp);
231 * if it not a fullmm flush, then we can possibly end up converting
232 * this PMD pte entry to a regular level 0 PTE by a parallel page fault.
233 * Make sure we flush the tlb in this case.
236 flush_pud_tlb_range(vma, addr, addr + HPAGE_PUD_SIZE);
240 static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot)
242 return __pmd(pmd_val(pmd) | pgprot_val(pgprot));
245 static pud_t pud_set_protbits(pud_t pud, pgprot_t pgprot)
247 return __pud(pud_val(pud) | pgprot_val(pgprot));
251 * At some point we should be able to get rid of
252 * pmd_mkhuge() and mk_huge_pmd() when we update all the
253 * other archs to mark the pmd huge in pfn_pmd()
255 pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
259 pmdv = (pfn << PAGE_SHIFT) & PTE_RPN_MASK;
261 return __pmd_mkhuge(pmd_set_protbits(__pmd(pmdv), pgprot));
264 pud_t pfn_pud(unsigned long pfn, pgprot_t pgprot)
268 pudv = (pfn << PAGE_SHIFT) & PTE_RPN_MASK;
270 return __pud_mkhuge(pud_set_protbits(__pud(pudv), pgprot));
273 pmd_t mk_pmd(struct page *page, pgprot_t pgprot)
275 return pfn_pmd(page_to_pfn(page), pgprot);
278 pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
283 pmdv &= _HPAGE_CHG_MASK;
284 return pmd_set_protbits(__pmd(pmdv), newprot);
287 pud_t pud_modify(pud_t pud, pgprot_t newprot)
292 pudv &= _HPAGE_CHG_MASK;
293 return pud_set_protbits(__pud(pudv), newprot);
295 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
297 /* For use by kexec, called with MMU off */
298 notrace void mmu_cleanup_all(void)
301 radix__mmu_cleanup_all();
302 else if (mmu_hash_ops.hpte_clear_all)
303 mmu_hash_ops.hpte_clear_all();
308 #ifdef CONFIG_MEMORY_HOTPLUG
309 int __meminit create_section_mapping(unsigned long start, unsigned long end,
310 int nid, pgprot_t prot)
313 return radix__create_section_mapping(start, end, nid, prot);
315 return hash__create_section_mapping(start, end, nid, prot);
318 int __meminit remove_section_mapping(unsigned long start, unsigned long end)
321 return radix__remove_section_mapping(start, end);
323 return hash__remove_section_mapping(start, end);
325 #endif /* CONFIG_MEMORY_HOTPLUG */
327 void __init mmu_partition_table_init(void)
329 unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;
332 /* Initialize the Partition Table with no entries */
333 partition_tb = memblock_alloc(patb_size, patb_size);
335 panic("%s: Failed to allocate %lu bytes align=0x%lx\n",
336 __func__, patb_size, patb_size);
338 ptcr = __pa(partition_tb) | (PATB_SIZE_SHIFT - 12);
339 set_ptcr_when_no_uv(ptcr);
340 powernv_set_nmmu_ptcr(ptcr);
343 static void flush_partition(unsigned int lpid, bool radix)
346 radix__flush_all_lpid(lpid);
347 radix__flush_all_lpid_guest(lpid);
349 asm volatile("ptesync" : : : "memory");
350 asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
351 "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
352 /* do we need fixup here ?*/
353 asm volatile("eieio; tlbsync; ptesync" : : : "memory");
354 trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 0);
358 void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
359 unsigned long dw1, bool flush)
361 unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
364 * When ultravisor is enabled, the partition table is stored in secure
365 * memory and can only be accessed doing an ultravisor call. However, we
366 * maintain a copy of the partition table in normal memory to allow Nest
367 * MMU translations to occur (for normal VMs).
369 * Therefore, here we always update partition_tb, regardless of whether
370 * we are running under an ultravisor or not.
372 partition_tb[lpid].patb0 = cpu_to_be64(dw0);
373 partition_tb[lpid].patb1 = cpu_to_be64(dw1);
376 * If ultravisor is enabled, we do an ultravisor call to register the
377 * partition table entry (PATE), which also do a global flush of TLBs
378 * and partition table caches for the lpid. Otherwise, just do the
379 * flush. The type of flush (hash or radix) depends on what the previous
380 * use of the partition ID was, not the new use.
382 if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) {
383 uv_register_pate(lpid, dw0, dw1);
384 pr_info("PATE registered by ultravisor: dw0 = 0x%lx, dw1 = 0x%lx\n",
388 * Boot does not need to flush, because MMU is off and each
389 * CPU does a tlbiel_all() before switching them on, which
390 * flushes everything.
392 flush_partition(lpid, (old & PATB_HR));
395 EXPORT_SYMBOL_GPL(mmu_partition_table_set_entry);
397 static pmd_t *get_pmd_from_cache(struct mm_struct *mm)
399 void *pmd_frag, *ret;
401 if (PMD_FRAG_NR == 1)
404 spin_lock(&mm->page_table_lock);
405 ret = mm->context.pmd_frag;
407 pmd_frag = ret + PMD_FRAG_SIZE;
409 * If we have taken up all the fragments mark PTE page NULL
411 if (((unsigned long)pmd_frag & ~PAGE_MASK) == 0)
413 mm->context.pmd_frag = pmd_frag;
415 spin_unlock(&mm->page_table_lock);
419 static pmd_t *__alloc_for_pmdcache(struct mm_struct *mm)
422 struct ptdesc *ptdesc;
423 gfp_t gfp = GFP_KERNEL_ACCOUNT | __GFP_ZERO;
426 gfp &= ~__GFP_ACCOUNT;
427 ptdesc = pagetable_alloc(gfp, 0);
430 if (!pagetable_pmd_ctor(ptdesc)) {
431 pagetable_free(ptdesc);
435 atomic_set(&ptdesc->pt_frag_refcount, 1);
437 ret = ptdesc_address(ptdesc);
439 * if we support only one fragment just return the
442 if (PMD_FRAG_NR == 1)
445 spin_lock(&mm->page_table_lock);
447 * If we find ptdesc_page set, we return
448 * the allocated page with single fragment
451 if (likely(!mm->context.pmd_frag)) {
452 atomic_set(&ptdesc->pt_frag_refcount, PMD_FRAG_NR);
453 mm->context.pmd_frag = ret + PMD_FRAG_SIZE;
455 spin_unlock(&mm->page_table_lock);
460 pmd_t *pmd_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr)
464 pmd = get_pmd_from_cache(mm);
468 return __alloc_for_pmdcache(mm);
471 void pmd_fragment_free(unsigned long *pmd)
473 struct ptdesc *ptdesc = virt_to_ptdesc(pmd);
475 if (pagetable_is_reserved(ptdesc))
476 return free_reserved_ptdesc(ptdesc);
478 BUG_ON(atomic_read(&ptdesc->pt_frag_refcount) <= 0);
479 if (atomic_dec_and_test(&ptdesc->pt_frag_refcount)) {
480 pagetable_pmd_dtor(ptdesc);
481 pagetable_free(ptdesc);
485 static inline void pgtable_free(void *table, int index)
489 pte_fragment_free(table, 0);
492 pmd_fragment_free(table);
497 /* We don't free pgd table via RCU callback */
503 void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int index)
505 unsigned long pgf = (unsigned long)table;
507 BUG_ON(index > MAX_PGTABLE_INDEX_SIZE);
509 tlb_remove_table(tlb, (void *)pgf);
512 void __tlb_remove_table(void *_table)
514 void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
515 unsigned int index = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
517 return pgtable_free(table, index);
520 #ifdef CONFIG_PROC_FS
521 atomic_long_t direct_pages_count[MMU_PAGE_COUNT];
523 void arch_report_meminfo(struct seq_file *m)
526 * Hash maps the memory with one size mmu_linear_psize.
527 * So don't bother to print these on hash
529 if (!radix_enabled())
531 seq_printf(m, "DirectMap4k: %8lu kB\n",
532 atomic_long_read(&direct_pages_count[MMU_PAGE_4K]) << 2);
533 seq_printf(m, "DirectMap64k: %8lu kB\n",
534 atomic_long_read(&direct_pages_count[MMU_PAGE_64K]) << 6);
535 seq_printf(m, "DirectMap2M: %8lu kB\n",
536 atomic_long_read(&direct_pages_count[MMU_PAGE_2M]) << 11);
537 seq_printf(m, "DirectMap1G: %8lu kB\n",
538 atomic_long_read(&direct_pages_count[MMU_PAGE_1G]) << 20);
540 #endif /* CONFIG_PROC_FS */
542 pte_t ptep_modify_prot_start(struct vm_area_struct *vma, unsigned long addr,
545 unsigned long pte_val;
548 * Clear the _PAGE_PRESENT so that no hardware parallel update is
549 * possible. Also keep the pte_present true so that we don't take
552 pte_val = pte_update(vma->vm_mm, addr, ptep, _PAGE_PRESENT, _PAGE_INVALID, 0);
554 return __pte(pte_val);
558 void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
559 pte_t *ptep, pte_t old_pte, pte_t pte)
562 return radix__ptep_modify_prot_commit(vma, addr,
564 set_pte_at(vma->vm_mm, addr, ptep, pte);
567 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
569 * For hash translation mode, we use the deposited table to store hash slot
570 * information and they are stored at PTRS_PER_PMD offset from related pmd
571 * location. Hence a pmd move requires deposit and withdraw.
573 * For radix translation with split pmd ptl, we store the deposited table in the
574 * pmd page. Hence if we have different pmd page we need to withdraw during pmd
577 * With hash we use deposited table always irrespective of anon or not.
578 * With radix we use deposited table only for anonymous mapping.
580 int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
581 struct spinlock *old_pmd_ptl,
582 struct vm_area_struct *vma)
585 return (new_pmd_ptl != old_pmd_ptl) && vma_is_anonymous(vma);
592 * Does the CPU support tlbie?
594 bool tlbie_capable __read_mostly = true;
595 EXPORT_SYMBOL(tlbie_capable);
598 * Should tlbie be used for management of CPU TLBs, for kernel and process
599 * address spaces? tlbie may still be used for nMMU accelerators, and for KVM
600 * guest address spaces.
602 bool tlbie_enabled __read_mostly = true;
604 static int __init setup_disable_tlbie(char *str)
606 if (!radix_enabled()) {
607 pr_err("disable_tlbie: Unable to disable TLBIE with Hash MMU.\n");
611 tlbie_capable = false;
612 tlbie_enabled = false;
616 __setup("disable_tlbie", setup_disable_tlbie);
618 static int __init pgtable_debugfs_setup(void)
624 * There is no locking vs tlb flushing when changing this value.
625 * The tlb flushers will see one value or another, and use either
626 * tlbie or tlbiel with IPIs. In both cases the TLBs will be
627 * invalidated as expected.
629 debugfs_create_bool("tlbie_enabled", 0600,
635 arch_initcall(pgtable_debugfs_setup);
637 #if defined(CONFIG_ZONE_DEVICE) && defined(CONFIG_ARCH_HAS_MEMREMAP_COMPAT_ALIGN)
639 * Override the generic version in mm/memremap.c.
641 * With hash translation, the direct-map range is mapped with just one
642 * page size selected by htab_init_page_sizes(). Consult
643 * mmu_psize_defs[] to determine the minimum page size alignment.
645 unsigned long memremap_compat_align(void)
647 if (!radix_enabled()) {
648 unsigned int shift = mmu_psize_defs[mmu_linear_psize].shift;
649 return max(SUBSECTION_SIZE, 1UL << shift);
652 return SUBSECTION_SIZE;
654 EXPORT_SYMBOL_GPL(memremap_compat_align);
657 pgprot_t vm_get_page_prot(unsigned long vm_flags)
661 /* Radix supports execute-only, but protection_map maps X -> RX */
662 if (!radix_enabled() && ((vm_flags & VM_ACCESS_FLAGS) == VM_EXEC))
665 prot = pgprot_val(protection_map[vm_flags & (VM_ACCESS_FLAGS | VM_SHARED)]);
667 if (vm_flags & VM_SAO)
670 #ifdef CONFIG_PPC_MEM_KEYS
671 prot |= vmflag_to_pte_pkey_bits(vm_flags);
674 return __pgprot(prot);
676 EXPORT_SYMBOL(vm_get_page_prot);