1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1995, 1996, 2001 Ralf Baechle
4 * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
5 * Copyright (C) 2004 Maciej W. Rozycki
7 #include <linux/delay.h>
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/seq_file.h>
11 #include <asm/bootinfo.h>
13 #include <asm/cpu-features.h>
15 #include <asm/mipsregs.h>
16 #include <asm/processor.h>
19 unsigned int vced_count, vcei_count;
22 * No lock; only written during early bootup by CPU 0.
24 static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);
26 int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)
28 return raw_notifier_chain_register(&proc_cpuinfo_chain, nb);
31 int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v)
33 return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v);
36 static int show_cpuinfo(struct seq_file *m, void *v)
38 struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args;
39 unsigned long n = (unsigned long) v - 1;
40 unsigned int version = cpu_data[n].processor_id;
41 unsigned int fp_vers = cpu_data[n].fpu_id;
51 * For the first processor also print the system type
54 seq_printf(m, "system type\t\t: %s\n", get_system_type());
55 if (mips_get_machine_name())
56 seq_printf(m, "machine\t\t\t: %s\n",
57 mips_get_machine_name());
60 seq_printf(m, "processor\t\t: %ld\n", n);
61 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
62 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
63 seq_printf(m, fmt, __cpu_name[n],
64 (version >> 4) & 0x0f, version & 0x0f,
65 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
66 seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
67 cpu_data[n].udelay_val / (500000/HZ),
68 (cpu_data[n].udelay_val / (5000/HZ)) % 100);
69 seq_printf(m, "wait instruction\t: %s\n", str_yes_no(cpu_wait));
70 seq_printf(m, "microsecond timers\t: %s\n",
71 str_yes_no(cpu_has_counter));
72 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
73 seq_printf(m, "extra interrupt vector\t: %s\n",
74 str_yes_no(cpu_has_divec));
75 seq_printf(m, "hardware watchpoint\t: %s", str_yes_no(cpu_has_watch));
77 seq_printf(m, ", count: %d, address/irw mask: [",
78 cpu_data[n].watch_reg_count);
79 for (i = 0; i < cpu_data[n].watch_reg_count; i++)
80 seq_printf(m, "%s0x%04x", i ? ", " : "",
81 cpu_data[n].watch_reg_masks[i]);
85 seq_puts(m, "\nisa\t\t\t:");
87 seq_puts(m, " mips1");
89 seq_puts(m, " mips2");
91 seq_puts(m, " mips3");
93 seq_puts(m, " mips4");
95 seq_puts(m, " mips5");
97 seq_puts(m, " mips32r1");
99 seq_puts(m, " mips32r2");
100 if (cpu_has_mips32r5)
101 seq_puts(m, " mips32r5");
102 if (cpu_has_mips32r6)
103 seq_puts(m, " mips32r6");
104 if (cpu_has_mips64r1)
105 seq_puts(m, " mips64r1");
106 if (cpu_has_mips64r2)
107 seq_puts(m, " mips64r2");
108 if (cpu_has_mips64r5)
109 seq_puts(m, " mips64r5");
110 if (cpu_has_mips64r6)
111 seq_puts(m, " mips64r6");
114 seq_puts(m, "ASEs implemented\t:");
116 seq_puts(m, " mips16");
117 if (cpu_has_mips16e2)
118 seq_puts(m, " mips16e2");
120 seq_puts(m, " mdmx");
122 seq_puts(m, " mips3d");
123 if (cpu_has_smartmips)
124 seq_puts(m, " smartmips");
128 seq_puts(m, " dsp2");
130 seq_puts(m, " dsp3");
134 seq_puts(m, " micromips");
145 if (cpu_has_loongson_mmi)
146 seq_puts(m, " loongson-mmi");
147 if (cpu_has_loongson_cam)
148 seq_puts(m, " loongson-cam");
149 if (cpu_has_loongson_ext)
150 seq_puts(m, " loongson-ext");
151 if (cpu_has_loongson_ext2)
152 seq_puts(m, " loongson-ext2");
156 seq_printf(m, "micromips kernel\t: %s\n",
157 str_yes_no(read_c0_config3() & MIPS_CONF3_ISA_OE));
160 seq_puts(m, "Options implemented\t:");
164 seq_puts(m, " ftlb");
166 seq_puts(m, " tlbinv");
167 if (cpu_has_segments)
168 seq_puts(m, " segments");
170 seq_puts(m, " rixiex");
172 seq_puts(m, " ldpte");
174 seq_puts(m, " maar");
176 seq_puts(m, " rw_llb");
178 seq_puts(m, " 4kex");
179 if (cpu_has_3k_cache)
180 seq_puts(m, " 3k_cache");
181 if (cpu_has_4k_cache)
182 seq_puts(m, " 4k_cache");
183 if (cpu_has_octeon_cache)
184 seq_puts(m, " octeon_cache");
188 seq_puts(m, " 32fpr");
189 if (cpu_has_cache_cdex_p)
190 seq_puts(m, " cache_cdex_p");
191 if (cpu_has_cache_cdex_s)
192 seq_puts(m, " cache_cdex_s");
193 if (cpu_has_prefetch)
194 seq_puts(m, " prefetch");
196 seq_puts(m, " mcheck");
198 seq_puts(m, " ejtag");
200 seq_puts(m, " llsc");
201 if (cpu_has_guestctl0ext)
202 seq_puts(m, " guestctl0ext");
203 if (cpu_has_guestctl1)
204 seq_puts(m, " guestctl1");
205 if (cpu_has_guestctl2)
206 seq_puts(m, " guestctl2");
208 seq_puts(m, " guestid");
212 seq_puts(m, " rixi");
217 if (cpu_has_vtag_icache)
218 seq_puts(m, " vtag_icache");
219 if (cpu_has_dc_aliases)
220 seq_puts(m, " dc_aliases");
221 if (cpu_has_ic_fills_f_dc)
222 seq_puts(m, " ic_fills_f_dc");
223 if (cpu_has_pindexed_dcache)
224 seq_puts(m, " pindexed_dcache");
225 if (cpu_has_userlocal)
226 seq_puts(m, " userlocal");
228 seq_puts(m, " nofpuex");
230 seq_puts(m, " vint");
232 seq_puts(m, " veic");
233 if (cpu_has_inclusive_pcaches)
234 seq_puts(m, " inclusive_pcaches");
235 if (cpu_has_perf_cntr_intr_bit)
236 seq_puts(m, " perf_cntr_intr_bit");
242 seq_puts(m, " cdmm");
243 if (cpu_has_small_pages)
244 seq_puts(m, " small_pages");
245 if (cpu_has_nan_legacy)
246 seq_puts(m, " nan_legacy");
247 if (cpu_has_nan_2008)
248 seq_puts(m, " nan_2008");
249 if (cpu_has_ebase_wg)
250 seq_puts(m, " ebase_wg");
251 if (cpu_has_badinstr)
252 seq_puts(m, " badinstr");
253 if (cpu_has_badinstrp)
254 seq_puts(m, " badinstrp");
255 if (cpu_has_contextconfig)
256 seq_puts(m, " contextconfig");
258 seq_puts(m, " perf");
259 if (cpu_has_mac2008_only)
260 seq_puts(m, " mac2008_only");
261 if (cpu_has_ftlbparex)
262 seq_puts(m, " ftlbparex");
264 seq_puts(m, " gsexcex");
265 if (cpu_has_shared_ftlb_ram)
266 seq_puts(m, " shared_ftlb_ram");
267 if (cpu_has_shared_ftlb_entries)
268 seq_puts(m, " shared_ftlb_entries");
269 if (cpu_has_mipsmt_pertccounters)
270 seq_puts(m, " mipsmt_pertccounters");
272 seq_puts(m, " mmid");
273 if (cpu_has_mm_sysad)
274 seq_puts(m, " mm_sysad");
276 seq_puts(m, " mm_full");
279 seq_printf(m, "shadow register sets\t: %d\n",
281 seq_printf(m, "kscratch registers\t: %d\n",
282 hweight8(cpu_data[n].kscratch_mask));
283 seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package);
284 seq_printf(m, "core\t\t\t: %d\n", cpu_core(&cpu_data[n]));
286 #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
288 seq_printf(m, "VPE\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
290 seq_printf(m, "VP\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
293 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
294 cpu_has_vce ? "%u" : "not available");
295 seq_printf(m, fmt, 'D', vced_count);
296 seq_printf(m, fmt, 'I', vcei_count);
298 proc_cpuinfo_notifier_args.m = m;
299 proc_cpuinfo_notifier_args.n = n;
301 raw_notifier_call_chain(&proc_cpuinfo_chain, 0,
302 &proc_cpuinfo_notifier_args);
309 static void *c_start(struct seq_file *m, loff_t *pos)
311 unsigned long i = *pos;
313 return i < nr_cpu_ids ? (void *) (i + 1) : NULL;
316 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
319 return c_start(m, pos);
322 static void c_stop(struct seq_file *m, void *v)
326 const struct seq_operations cpuinfo_op = {
330 .show = show_cpuinfo,