1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/kernel.h>
9 #include <asm/compiler.h>
10 #include <asm/machvec.h>
11 #include <asm/hwrpb.h>
13 /* The generic header contains only prototypes. Including it ensures that
14 the implementation we have here matches that interface. */
15 #include <asm-generic/iomap.h>
18 * Virtual -> physical identity mapping starts at this offset
20 #ifdef USE_48_BIT_KSEG
21 #define IDENT_ADDR 0xffff800000000000UL
23 #define IDENT_ADDR 0xfffffc0000000000UL
27 * We try to avoid hae updates (thus the cache), but when we
28 * do need to update the hae, we need to do it atomically, so
29 * that any interrupts wouldn't get confused with the hae
30 * register not being up-to-date with respect to the hardware
33 extern inline void __set_hae(unsigned long new_hae)
35 unsigned long flags = swpipl(IPL_MAX);
39 alpha_mv.hae_cache = new_hae;
40 *alpha_mv.hae_register = new_hae;
42 /* Re-read to make sure it was written. */
43 new_hae = *alpha_mv.hae_register;
49 extern inline void set_hae(unsigned long new_hae)
51 if (new_hae != alpha_mv.hae_cache)
56 * Change virtual addresses to physical addresses and vv.
58 #ifdef USE_48_BIT_KSEG
59 static inline unsigned long virt_to_phys(volatile void *address)
61 return (unsigned long)address - IDENT_ADDR;
64 static inline void * phys_to_virt(unsigned long address)
66 return (void *) (address + IDENT_ADDR);
69 static inline unsigned long virt_to_phys(volatile void *address)
71 unsigned long phys = (unsigned long)address;
73 /* Sign-extend from bit 41. */
75 phys = (long)phys >> (64 - 41);
77 /* Crop to the physical address width of the processor. */
78 phys &= (1ul << hwrpb->pa_bits) - 1;
83 static inline void * phys_to_virt(unsigned long address)
85 return (void *)(IDENT_ADDR + (address & ((1ul << 41) - 1)));
89 #define virt_to_phys virt_to_phys
90 #define phys_to_virt phys_to_virt
92 /* Maximum PIO space address supported? */
93 #define IO_SPACE_LIMIT 0xffff
96 * Change addresses as seen by the kernel (virtual) to addresses as
97 * seen by a device (bus), and vice versa.
99 * Note that this only works for a limited range of kernel addresses,
100 * and very well may not span all memory. Consider this interface
101 * deprecated in favour of the DMA-mapping API.
103 extern unsigned long __direct_map_base;
104 extern unsigned long __direct_map_size;
106 static inline unsigned long __deprecated isa_virt_to_bus(volatile void *address)
108 unsigned long phys = virt_to_phys(address);
109 unsigned long bus = phys + __direct_map_base;
110 return phys <= __direct_map_size ? bus : 0;
112 #define isa_virt_to_bus isa_virt_to_bus
114 static inline void * __deprecated isa_bus_to_virt(unsigned long address)
118 /* This check is a sanity check but also ensures that bus address 0
119 maps to virtual address 0 which is useful to detect null pointers
120 (the NCR driver is much simpler if NULL pointers are preserved). */
121 address -= __direct_map_base;
122 virt = phys_to_virt(address);
123 return (long)address <= 0 ? NULL : virt;
125 #define isa_bus_to_virt isa_bus_to_virt
128 * There are different chipsets to interface the Alpha CPUs to the world.
131 #define IO_CONCAT(a,b) _IO_CONCAT(a,b)
132 #define _IO_CONCAT(a,b) a ## _ ## b
134 #ifdef CONFIG_ALPHA_GENERIC
136 /* In a generic kernel, we always go through the machine vector. */
138 #define REMAP1(TYPE, NAME, QUAL) \
139 static inline TYPE generic_##NAME(QUAL void __iomem *addr) \
141 return alpha_mv.mv_##NAME(addr); \
144 #define REMAP2(TYPE, NAME, QUAL) \
145 static inline void generic_##NAME(TYPE b, QUAL void __iomem *addr) \
147 alpha_mv.mv_##NAME(b, addr); \
150 REMAP1(unsigned int, ioread8, const)
151 REMAP1(unsigned int, ioread16, const)
152 REMAP1(unsigned int, ioread32, const)
153 REMAP1(u64, ioread64, const)
154 REMAP1(u8, readb, const volatile)
155 REMAP1(u16, readw, const volatile)
156 REMAP1(u32, readl, const volatile)
157 REMAP1(u64, readq, const volatile)
159 REMAP2(u8, iowrite8, /**/)
160 REMAP2(u16, iowrite16, /**/)
161 REMAP2(u32, iowrite32, /**/)
162 REMAP2(u64, iowrite64, /**/)
163 REMAP2(u8, writeb, volatile)
164 REMAP2(u16, writew, volatile)
165 REMAP2(u32, writel, volatile)
166 REMAP2(u64, writeq, volatile)
171 extern inline void __iomem *generic_ioportmap(unsigned long a)
173 return alpha_mv.mv_ioportmap(a);
176 static inline void __iomem *generic_ioremap(unsigned long a, unsigned long s)
178 return alpha_mv.mv_ioremap(a, s);
181 static inline void generic_iounmap(volatile void __iomem *a)
183 return alpha_mv.mv_iounmap(a);
186 static inline int generic_is_ioaddr(unsigned long a)
188 return alpha_mv.mv_is_ioaddr(a);
191 static inline int generic_is_mmio(const volatile void __iomem *a)
193 return alpha_mv.mv_is_mmio(a);
196 #define __IO_PREFIX generic
197 #define generic_trivial_rw_bw 0
198 #define generic_trivial_rw_lq 0
199 #define generic_trivial_io_bw 0
200 #define generic_trivial_io_lq 0
201 #define generic_trivial_iounmap 0
205 #if defined(CONFIG_ALPHA_CIA)
206 # include <asm/core_cia.h>
207 #elif defined(CONFIG_ALPHA_IRONGATE)
208 # include <asm/core_irongate.h>
209 #elif defined(CONFIG_ALPHA_MARVEL)
210 # include <asm/core_marvel.h>
211 #elif defined(CONFIG_ALPHA_MCPCIA)
212 # include <asm/core_mcpcia.h>
213 #elif defined(CONFIG_ALPHA_POLARIS)
214 # include <asm/core_polaris.h>
215 #elif defined(CONFIG_ALPHA_T2)
216 # include <asm/core_t2.h>
217 #elif defined(CONFIG_ALPHA_TSUNAMI)
218 # include <asm/core_tsunami.h>
219 #elif defined(CONFIG_ALPHA_TITAN)
220 # include <asm/core_titan.h>
221 #elif defined(CONFIG_ALPHA_WILDFIRE)
222 # include <asm/core_wildfire.h>
224 #error "What system is this?"
230 * We always have external versions of these routines.
232 extern u8 inb(unsigned long port);
233 extern u16 inw(unsigned long port);
234 extern u32 inl(unsigned long port);
235 extern void outb(u8 b, unsigned long port);
236 extern void outw(u16 b, unsigned long port);
237 extern void outl(u32 b, unsigned long port);
245 extern u8 readb(const volatile void __iomem *addr);
246 extern u16 readw(const volatile void __iomem *addr);
247 extern u32 readl(const volatile void __iomem *addr);
248 extern u64 readq(const volatile void __iomem *addr);
249 extern void writeb(u8 b, volatile void __iomem *addr);
250 extern void writew(u16 b, volatile void __iomem *addr);
251 extern void writel(u32 b, volatile void __iomem *addr);
252 extern void writeq(u64 b, volatile void __iomem *addr);
257 #define writeb writeb
258 #define writew writew
259 #define writel writel
260 #define writeq writeq
262 extern u8 __raw_readb(const volatile void __iomem *addr);
263 extern u16 __raw_readw(const volatile void __iomem *addr);
264 extern u32 __raw_readl(const volatile void __iomem *addr);
265 extern u64 __raw_readq(const volatile void __iomem *addr);
266 extern void __raw_writeb(u8 b, volatile void __iomem *addr);
267 extern void __raw_writew(u16 b, volatile void __iomem *addr);
268 extern void __raw_writel(u32 b, volatile void __iomem *addr);
269 extern void __raw_writeq(u64 b, volatile void __iomem *addr);
270 #define __raw_readb __raw_readb
271 #define __raw_readw __raw_readw
272 #define __raw_readl __raw_readl
273 #define __raw_readq __raw_readq
274 #define __raw_writeb __raw_writeb
275 #define __raw_writew __raw_writew
276 #define __raw_writel __raw_writel
277 #define __raw_writeq __raw_writeq
280 * Mapping from port numbers to __iomem space is pretty easy.
283 /* These two have to be extern inline because of the extern prototype from
284 <asm-generic/iomap.h>. It is not legal to mix "extern" and "static" for
285 the same declaration. */
286 extern inline void __iomem *ioport_map(unsigned long port, unsigned int size)
288 return IO_CONCAT(__IO_PREFIX,ioportmap) (port);
291 extern inline void ioport_unmap(void __iomem *addr)
295 #define ioport_map ioport_map
296 #define ioport_unmap ioport_unmap
298 static inline void __iomem *ioremap(unsigned long port, unsigned long size)
300 return IO_CONCAT(__IO_PREFIX,ioremap) (port, size);
303 #define ioremap_wc ioremap
305 static inline void iounmap(volatile void __iomem *addr)
307 IO_CONCAT(__IO_PREFIX,iounmap)(addr);
310 static inline int __is_ioaddr(unsigned long addr)
312 return IO_CONCAT(__IO_PREFIX,is_ioaddr)(addr);
314 #define __is_ioaddr(a) __is_ioaddr((unsigned long)(a))
316 static inline int __is_mmio(const volatile void __iomem *addr)
318 return IO_CONCAT(__IO_PREFIX,is_mmio)(addr);
323 * If the actual I/O bits are sufficiently trivial, then expand inline.
326 #if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
327 extern inline unsigned int ioread8(const void __iomem *addr)
331 ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
336 extern inline unsigned int ioread16(const void __iomem *addr)
340 ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
345 extern inline void iowrite8(u8 b, void __iomem *addr)
348 IO_CONCAT(__IO_PREFIX, iowrite8)(b, addr);
351 extern inline void iowrite16(u16 b, void __iomem *addr)
354 IO_CONCAT(__IO_PREFIX, iowrite16)(b, addr);
357 extern inline u8 inb(unsigned long port)
359 return ioread8(ioport_map(port, 1));
362 extern inline u16 inw(unsigned long port)
364 return ioread16(ioport_map(port, 2));
367 extern inline void outb(u8 b, unsigned long port)
369 iowrite8(b, ioport_map(port, 1));
372 extern inline void outw(u16 b, unsigned long port)
374 iowrite16(b, ioport_map(port, 2));
378 #define ioread8 ioread8
379 #define ioread16 ioread16
380 #define iowrite8 iowrite8
381 #define iowrite16 iowrite16
383 #if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
384 extern inline unsigned int ioread32(const void __iomem *addr)
388 ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
393 extern inline u64 ioread64(const void __iomem *addr)
397 ret = IO_CONCAT(__IO_PREFIX,ioread64)(addr);
402 extern inline void iowrite32(u32 b, void __iomem *addr)
405 IO_CONCAT(__IO_PREFIX, iowrite32)(b, addr);
408 extern inline void iowrite64(u64 b, void __iomem *addr)
411 IO_CONCAT(__IO_PREFIX, iowrite64)(b, addr);
414 extern inline u32 inl(unsigned long port)
416 return ioread32(ioport_map(port, 4));
419 extern inline void outl(u32 b, unsigned long port)
421 iowrite32(b, ioport_map(port, 4));
425 #define ioread32 ioread32
426 #define ioread64 ioread64
427 #define iowrite32 iowrite32
428 #define iowrite64 iowrite64
430 #if IO_CONCAT(__IO_PREFIX,trivial_rw_bw) == 1
431 extern inline u8 __raw_readb(const volatile void __iomem *addr)
433 return IO_CONCAT(__IO_PREFIX,readb)(addr);
436 extern inline u16 __raw_readw(const volatile void __iomem *addr)
438 return IO_CONCAT(__IO_PREFIX,readw)(addr);
441 extern inline void __raw_writeb(u8 b, volatile void __iomem *addr)
443 IO_CONCAT(__IO_PREFIX,writeb)(b, addr);
446 extern inline void __raw_writew(u16 b, volatile void __iomem *addr)
448 IO_CONCAT(__IO_PREFIX,writew)(b, addr);
451 extern inline u8 readb(const volatile void __iomem *addr)
455 ret = __raw_readb(addr);
460 extern inline u16 readw(const volatile void __iomem *addr)
464 ret = __raw_readw(addr);
469 extern inline void writeb(u8 b, volatile void __iomem *addr)
472 __raw_writeb(b, addr);
475 extern inline void writew(u16 b, volatile void __iomem *addr)
478 __raw_writew(b, addr);
482 #if IO_CONCAT(__IO_PREFIX,trivial_rw_lq) == 1
483 extern inline u32 __raw_readl(const volatile void __iomem *addr)
485 return IO_CONCAT(__IO_PREFIX,readl)(addr);
488 extern inline u64 __raw_readq(const volatile void __iomem *addr)
490 return IO_CONCAT(__IO_PREFIX,readq)(addr);
493 extern inline void __raw_writel(u32 b, volatile void __iomem *addr)
495 IO_CONCAT(__IO_PREFIX,writel)(b, addr);
498 extern inline void __raw_writeq(u64 b, volatile void __iomem *addr)
500 IO_CONCAT(__IO_PREFIX,writeq)(b, addr);
503 extern inline u32 readl(const volatile void __iomem *addr)
507 ret = __raw_readl(addr);
512 extern inline u64 readq(const volatile void __iomem *addr)
516 ret = __raw_readq(addr);
521 extern inline void writel(u32 b, volatile void __iomem *addr)
524 __raw_writel(b, addr);
527 extern inline void writeq(u64 b, volatile void __iomem *addr)
530 __raw_writeq(b, addr);
534 #define ioread16be(p) swab16(ioread16(p))
535 #define ioread32be(p) swab32(ioread32(p))
536 #define ioread64be(p) swab64(ioread64(p))
537 #define iowrite16be(v,p) iowrite16(swab16(v), (p))
538 #define iowrite32be(v,p) iowrite32(swab32(v), (p))
539 #define iowrite64be(v,p) iowrite64(swab64(v), (p))
548 extern u8 readb_relaxed(const volatile void __iomem *addr);
549 extern u16 readw_relaxed(const volatile void __iomem *addr);
550 extern u32 readl_relaxed(const volatile void __iomem *addr);
551 extern u64 readq_relaxed(const volatile void __iomem *addr);
552 #define readb_relaxed readb_relaxed
553 #define readw_relaxed readw_relaxed
554 #define readl_relaxed readl_relaxed
555 #define readq_relaxed readq_relaxed
557 #if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
558 extern inline u8 readb_relaxed(const volatile void __iomem *addr)
561 return __raw_readb(addr);
564 extern inline u16 readw_relaxed(const volatile void __iomem *addr)
567 return __raw_readw(addr);
571 #if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
572 extern inline u32 readl_relaxed(const volatile void __iomem *addr)
575 return __raw_readl(addr);
578 extern inline u64 readq_relaxed(const volatile void __iomem *addr)
581 return __raw_readq(addr);
585 #define writeb_relaxed writeb
586 #define writew_relaxed writew
587 #define writel_relaxed writel
588 #define writeq_relaxed writeq
591 * String version of IO memory access ops:
593 extern void memcpy_fromio(void *, const volatile void __iomem *, long);
594 extern void memcpy_toio(volatile void __iomem *, const void *, long);
595 extern void _memset_c_io(volatile void __iomem *, unsigned long, long);
597 static inline void memset_io(volatile void __iomem *addr, u8 c, long len)
599 _memset_c_io(addr, 0x0101010101010101UL * c, len);
602 #define __HAVE_ARCH_MEMSETW_IO
603 static inline void memsetw_io(volatile void __iomem *addr, u16 c, long len)
605 _memset_c_io(addr, 0x0001000100010001UL * c, len);
608 #define memset_io memset_io
609 #define memcpy_fromio memcpy_fromio
610 #define memcpy_toio memcpy_toio
613 * String versions of in/out ops:
615 extern void insb (unsigned long port, void *dst, unsigned long count);
616 extern void insw (unsigned long port, void *dst, unsigned long count);
617 extern void insl (unsigned long port, void *dst, unsigned long count);
618 extern void outsb (unsigned long port, const void *src, unsigned long count);
619 extern void outsw (unsigned long port, const void *src, unsigned long count);
620 extern void outsl (unsigned long port, const void *src, unsigned long count);
629 #define RTC_PORT(x) (0x70 + (x))
630 #define RTC_ALWAYS_BCD 0
633 * These get provided from <asm-generic/iomap.h> since alpha does not
634 * select GENERIC_IOMAP.
636 #define ioread64 ioread64
637 #define iowrite64 iowrite64
638 #define ioread8_rep ioread8_rep
639 #define ioread16_rep ioread16_rep
640 #define ioread32_rep ioread32_rep
641 #define iowrite8_rep iowrite8_rep
642 #define iowrite16_rep iowrite16_rep
643 #define iowrite32_rep iowrite32_rep
644 #define pci_iounmap pci_iounmap
646 #include <asm-generic/io.h>
648 #endif /* __KERNEL__ */
650 #endif /* __ALPHA_IO_H */