1 # SPDX-License-Identifier: GPL-2.0
2 # Intel pin control drivers
3 menu "Intel pinctrl drivers"
4 depends on X86 || COMPILE_TEST
6 config PINCTRL_BAYTRAIL
7 bool "Intel Baytrail GPIO pin control"
11 driver for memory mapped GPIO functionality on Intel Baytrail
12 platforms. Supports 3 banks with 102, 28 and 44 gpios.
13 Most pins are usually muxed to some other functionality by firmware,
14 so only a small amount is available for gpio use.
16 Requires ACPI device enumeration code to set up a platform device.
18 config PINCTRL_CHERRYVIEW
19 tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
23 Cherryview/Braswell pinctrl driver provides an interface that
24 allows configuring of SoC pins and using them as GPIOs.
26 config PINCTRL_LYNXPOINT
27 tristate "Intel Lynxpoint pinctrl and GPIO driver"
31 select GENERIC_PINCONF
33 select GPIOLIB_IRQCHIP
35 Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
36 provides an interface that allows configuring of PCH pins and
39 config PINCTRL_MERRIFIELD
40 tristate "Intel Merrifield pinctrl driver"
41 depends on X86_INTEL_MID
44 select GENERIC_PINCONF
46 Merrifield Family-Level Interface Shim (FLIS) driver provides an
47 interface that allows configuring of SoC pins and using them as
50 config PINCTRL_MOOREFIELD
51 tristate "Intel Moorefield pinctrl driver"
52 depends on X86_INTEL_MID
55 select GENERIC_PINCONF
57 Moorefield Family-Level Interface Shim (FLIS) driver provides an
58 interface that allows configuring of SoC pins and using them as
65 select GENERIC_PINCONF
67 select GPIOLIB_IRQCHIP
69 config PINCTRL_ALDERLAKE
70 tristate "Intel Alder Lake pinctrl and GPIO driver"
74 This pinctrl driver provides an interface that allows configuring
75 of Intel Alder Lake PCH pins and using them as GPIOs.
77 config PINCTRL_BROXTON
78 tristate "Intel Broxton pinctrl and GPIO driver"
82 Broxton pinctrl driver provides an interface that allows
83 configuring of SoC pins and using them as GPIOs.
85 config PINCTRL_CANNONLAKE
86 tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
90 This pinctrl driver provides an interface that allows configuring
91 of Intel Cannon Lake PCH pins and using them as GPIOs.
93 config PINCTRL_CEDARFORK
94 tristate "Intel Cedar Fork pinctrl and GPIO driver"
98 This pinctrl driver provides an interface that allows configuring
99 of Intel Cedar Fork PCH pins and using them as GPIOs.
101 config PINCTRL_DENVERTON
102 tristate "Intel Denverton pinctrl and GPIO driver"
106 This pinctrl driver provides an interface that allows configuring
107 of Intel Denverton SoC pins and using them as GPIOs.
109 config PINCTRL_ELKHARTLAKE
110 tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver"
114 This pinctrl driver provides an interface that allows configuring
115 of Intel Elkhart Lake SoC pins and using them as GPIOs.
117 config PINCTRL_EMMITSBURG
118 tristate "Intel Emmitsburg pinctrl and GPIO driver"
122 This pinctrl driver provides an interface that allows configuring
123 of Intel Emmitsburg pins and using them as GPIOs.
125 config PINCTRL_GEMINILAKE
126 tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
130 This pinctrl driver provides an interface that allows configuring
131 of Intel Gemini Lake SoC pins and using them as GPIOs.
133 config PINCTRL_ICELAKE
134 tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
138 This pinctrl driver provides an interface that allows configuring
139 of Intel Ice Lake PCH pins and using them as GPIOs.
141 config PINCTRL_JASPERLAKE
142 tristate "Intel Jasper Lake PCH pinctrl and GPIO driver"
146 This pinctrl driver provides an interface that allows configuring
147 of Intel Jasper Lake PCH pins and using them as GPIOs.
149 config PINCTRL_LAKEFIELD
150 tristate "Intel Lakefield SoC pinctrl and GPIO driver"
154 This pinctrl driver provides an interface that allows configuring
155 of Intel Lakefield SoC pins and using them as GPIOs.
157 config PINCTRL_LEWISBURG
158 tristate "Intel Lewisburg pinctrl and GPIO driver"
162 This pinctrl driver provides an interface that allows configuring
163 of Intel Lewisburg pins and using them as GPIOs.
165 config PINCTRL_METEORLAKE
166 tristate "Intel Meteor Lake pinctrl and GPIO driver"
170 This pinctrl driver provides an interface that allows configuring
171 of Intel Meteor Lake pins and using them as GPIOs.
173 config PINCTRL_SUNRISEPOINT
174 tristate "Intel Sunrisepoint pinctrl and GPIO driver"
178 Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
179 provides an interface that allows configuring of PCH pins and
182 config PINCTRL_TIGERLAKE
183 tristate "Intel Tiger Lake pinctrl and GPIO driver"
187 This pinctrl driver provides an interface that allows configuring
188 of Intel Tiger Lake PCH pins and using them as GPIOs.