drivers/net/wireless/ath/ath10k/core.c

   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Copyright (c) 2005-2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
   5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/firmware.h>
  10 #include <linux/of.h>
  11 #include <linux/property.h>
  12 #include <linux/dmi.h>
  13 #include <linux/ctype.h>
  14 #include <linux/pm_qos.h>
  15 #include <linux/nvmem-consumer.h>
  16 #include <asm/byteorder.h>
  17
  18 #include "core.h"
  19 #include "mac.h"
  20 #include "htc.h"
  21 #include "hif.h"
  22 #include "wmi.h"
  23 #include "bmi.h"
  24 #include "debug.h"
  25 #include "htt.h"
  26 #include "testmode.h"
  27 #include "wmi-ops.h"
  28 #include "coredump.h"
  29
  30 unsigned int ath10k_debug_mask;
  31 EXPORT_SYMBOL(ath10k_debug_mask);
  32
  33 static unsigned int ath10k_cryptmode_param;
  34 static bool uart_print;
  35 static bool skip_otp;
  36 static bool fw_diag_log;
  37
  38 /* frame mode values are mapped as per enum ath10k_hw_txrx_mode */
  39 unsigned int ath10k_frame_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
  40
  41 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
  42                                      BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
  43
  44 /* FIXME: most of these should be readonly */
  45 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  46 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  47 module_param(uart_print, bool, 0644);
  48 module_param(skip_otp, bool, 0644);
  49 module_param(fw_diag_log, bool, 0644);
  50 module_param_named(frame_mode, ath10k_frame_mode, uint, 0644);
  51 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
  52
  53 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  54 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  55 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  56 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  57 MODULE_PARM_DESC(frame_mode,
  58                  "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
  59 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
  60 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
  61
  62 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  63         {
  64                 .id = QCA988X_HW_2_0_VERSION,
  65                 .dev_id = QCA988X_2_0_DEVICE_ID,
  66                 .bus = ATH10K_BUS_PCI,
  67                 .name = "qca988x hw2.0",
  68                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  69                 .uart_pin = 7,
  70                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  71                 .otp_exe_param = 0,
  72                 .channel_counters_freq_hz = 88000,
  73                 .max_probe_resp_desc_thres = 0,
  74                 .cal_data_len = 2116,
  75                 .fw = {
  76                         .dir = QCA988X_HW_2_0_FW_DIR,
  77                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  78                         .board_size = QCA988X_BOARD_DATA_SZ,
  79                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  80                 },
  81                 .rx_desc_ops = &qca988x_rx_desc_ops,
  82                 .hw_ops = &qca988x_ops,
  83                 .decap_align_bytes = 4,
  84                 .spectral_bin_discard = 0,
  85                 .spectral_bin_offset = 0,
  86                 .vht160_mcs_rx_highest = 0,
  87                 .vht160_mcs_tx_highest = 0,
  88                 .n_cipher_suites = 8,
  89                 .ast_skid_limit = 0x10,
  90                 .num_wds_entries = 0x20,
  91                 .target_64bit = false,
  92                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
  93                 .shadow_reg_support = false,
  94                 .rri_on_ddr = false,
  95                 .hw_filter_reset_required = true,
  96                 .fw_diag_ce_download = false,
  97                 .credit_size_workaround = false,
  98                 .tx_stats_over_pktlog = true,
  99                 .dynamic_sar_support = false,
 100                 .hw_restart_disconnect = false,
 101                 .use_fw_tx_credits = true,
 102                 .delay_unmap_buffer = false,
 103         },
 104         {
 105                 .id = QCA988X_HW_2_0_VERSION,
 106                 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
 107                 .name = "qca988x hw2.0 ubiquiti",
 108                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
 109                 .uart_pin = 7,
 110                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 111                 .otp_exe_param = 0,
 112                 .channel_counters_freq_hz = 88000,
 113                 .max_probe_resp_desc_thres = 0,
 114                 .cal_data_len = 2116,
 115                 .fw = {
 116                         .dir = QCA988X_HW_2_0_FW_DIR,
 117                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
 118                         .board_size = QCA988X_BOARD_DATA_SZ,
 119                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
 120                 },
 121                 .rx_desc_ops = &qca988x_rx_desc_ops,
 122                 .hw_ops = &qca988x_ops,
 123                 .decap_align_bytes = 4,
 124                 .spectral_bin_discard = 0,
 125                 .spectral_bin_offset = 0,
 126                 .vht160_mcs_rx_highest = 0,
 127                 .vht160_mcs_tx_highest = 0,
 128                 .n_cipher_suites = 8,
 129                 .ast_skid_limit = 0x10,
 130                 .num_wds_entries = 0x20,
 131                 .target_64bit = false,
 132                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 133                 .shadow_reg_support = false,
 134                 .rri_on_ddr = false,
 135                 .hw_filter_reset_required = true,
 136                 .fw_diag_ce_download = false,
 137                 .credit_size_workaround = false,
 138                 .tx_stats_over_pktlog = true,
 139                 .dynamic_sar_support = false,
 140                 .hw_restart_disconnect = false,
 141                 .use_fw_tx_credits = true,
 142                 .delay_unmap_buffer = false,
 143         },
 144         {
 145                 .id = QCA9887_HW_1_0_VERSION,
 146                 .dev_id = QCA9887_1_0_DEVICE_ID,
 147                 .bus = ATH10K_BUS_PCI,
 148                 .name = "qca9887 hw1.0",
 149                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
 150                 .uart_pin = 7,
 151                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
 152                 .otp_exe_param = 0,
 153                 .channel_counters_freq_hz = 88000,
 154                 .max_probe_resp_desc_thres = 0,
 155                 .cal_data_len = 2116,
 156                 .fw = {
 157                         .dir = QCA9887_HW_1_0_FW_DIR,
 158                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
 159                         .board_size = QCA9887_BOARD_DATA_SZ,
 160                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
 161                 },
 162                 .rx_desc_ops = &qca988x_rx_desc_ops,
 163                 .hw_ops = &qca988x_ops,
 164                 .decap_align_bytes = 4,
 165                 .spectral_bin_discard = 0,
 166                 .spectral_bin_offset = 0,
 167                 .vht160_mcs_rx_highest = 0,
 168                 .vht160_mcs_tx_highest = 0,
 169                 .n_cipher_suites = 8,
 170                 .ast_skid_limit = 0x10,
 171                 .num_wds_entries = 0x20,
 172                 .target_64bit = false,
 173                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 174                 .shadow_reg_support = false,
 175                 .rri_on_ddr = false,
 176                 .hw_filter_reset_required = true,
 177                 .fw_diag_ce_download = false,
 178                 .credit_size_workaround = false,
 179                 .tx_stats_over_pktlog = false,
 180                 .dynamic_sar_support = false,
 181                 .hw_restart_disconnect = false,
 182                 .use_fw_tx_credits = true,
 183                 .delay_unmap_buffer = false,
 184         },
 185         {
 186                 .id = QCA6174_HW_3_2_VERSION,
 187                 .dev_id = QCA6174_3_2_DEVICE_ID,
 188                 .bus = ATH10K_BUS_SDIO,
 189                 .name = "qca6174 hw3.2 sdio",
 190                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 191                 .uart_pin = 19,
 192                 .otp_exe_param = 0,
 193                 .channel_counters_freq_hz = 88000,
 194                 .max_probe_resp_desc_thres = 0,
 195                 .cal_data_len = 0,
 196                 .fw = {
 197                         .dir = QCA6174_HW_3_0_FW_DIR,
 198                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 199                         .board_size = QCA6174_BOARD_DATA_SZ,
 200                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 201                 },
 202                 .rx_desc_ops = &qca988x_rx_desc_ops,
 203                 .hw_ops = &qca6174_sdio_ops,
 204                 .hw_clk = qca6174_clk,
 205                 .target_cpu_freq = 176000000,
 206                 .decap_align_bytes = 4,
 207                 .n_cipher_suites = 8,
 208                 .num_peers = 10,
 209                 .ast_skid_limit = 0x10,
 210                 .num_wds_entries = 0x20,
 211                 .uart_pin_workaround = true,
 212                 .tx_stats_over_pktlog = false,
 213                 .credit_size_workaround = false,
 214                 .bmi_large_size_download = true,
 215                 .supports_peer_stats_info = true,
 216                 .dynamic_sar_support = true,
 217                 .hw_restart_disconnect = false,
 218                 .use_fw_tx_credits = true,
 219                 .delay_unmap_buffer = false,
 220         },
 221         {
 222                 .id = QCA6174_HW_2_1_VERSION,
 223                 .dev_id = QCA6164_2_1_DEVICE_ID,
 224                 .bus = ATH10K_BUS_PCI,
 225                 .name = "qca6164 hw2.1",
 226                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 227                 .uart_pin = 6,
 228                 .otp_exe_param = 0,
 229                 .channel_counters_freq_hz = 88000,
 230                 .max_probe_resp_desc_thres = 0,
 231                 .cal_data_len = 8124,
 232                 .fw = {
 233                         .dir = QCA6174_HW_2_1_FW_DIR,
 234                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 235                         .board_size = QCA6174_BOARD_DATA_SZ,
 236                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 237                 },
 238                 .rx_desc_ops = &qca988x_rx_desc_ops,
 239                 .hw_ops = &qca988x_ops,
 240                 .decap_align_bytes = 4,
 241                 .spectral_bin_discard = 0,
 242                 .spectral_bin_offset = 0,
 243                 .vht160_mcs_rx_highest = 0,
 244                 .vht160_mcs_tx_highest = 0,
 245                 .n_cipher_suites = 8,
 246                 .ast_skid_limit = 0x10,
 247                 .num_wds_entries = 0x20,
 248                 .target_64bit = false,
 249                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 250                 .shadow_reg_support = false,
 251                 .rri_on_ddr = false,
 252                 .hw_filter_reset_required = true,
 253                 .fw_diag_ce_download = false,
 254                 .credit_size_workaround = false,
 255                 .tx_stats_over_pktlog = false,
 256                 .dynamic_sar_support = false,
 257                 .hw_restart_disconnect = false,
 258                 .use_fw_tx_credits = true,
 259                 .delay_unmap_buffer = false,
 260         },
 261         {
 262                 .id = QCA6174_HW_2_1_VERSION,
 263                 .dev_id = QCA6174_2_1_DEVICE_ID,
 264                 .bus = ATH10K_BUS_PCI,
 265                 .name = "qca6174 hw2.1",
 266                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 267                 .uart_pin = 6,
 268                 .otp_exe_param = 0,
 269                 .channel_counters_freq_hz = 88000,
 270                 .max_probe_resp_desc_thres = 0,
 271                 .cal_data_len = 8124,
 272                 .fw = {
 273                         .dir = QCA6174_HW_2_1_FW_DIR,
 274                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 275                         .board_size = QCA6174_BOARD_DATA_SZ,
 276                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 277                 },
 278                 .rx_desc_ops = &qca988x_rx_desc_ops,
 279                 .hw_ops = &qca988x_ops,
 280                 .decap_align_bytes = 4,
 281                 .spectral_bin_discard = 0,
 282                 .spectral_bin_offset = 0,
 283                 .vht160_mcs_rx_highest = 0,
 284                 .vht160_mcs_tx_highest = 0,
 285                 .n_cipher_suites = 8,
 286                 .ast_skid_limit = 0x10,
 287                 .num_wds_entries = 0x20,
 288                 .target_64bit = false,
 289                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 290                 .shadow_reg_support = false,
 291                 .rri_on_ddr = false,
 292                 .hw_filter_reset_required = true,
 293                 .fw_diag_ce_download = false,
 294                 .credit_size_workaround = false,
 295                 .tx_stats_over_pktlog = false,
 296                 .dynamic_sar_support = false,
 297                 .hw_restart_disconnect = false,
 298                 .use_fw_tx_credits = true,
 299                 .delay_unmap_buffer = false,
 300         },
 301         {
 302                 .id = QCA6174_HW_3_0_VERSION,
 303                 .dev_id = QCA6174_2_1_DEVICE_ID,
 304                 .bus = ATH10K_BUS_PCI,
 305                 .name = "qca6174 hw3.0",
 306                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 307                 .uart_pin = 6,
 308                 .otp_exe_param = 0,
 309                 .channel_counters_freq_hz = 88000,
 310                 .max_probe_resp_desc_thres = 0,
 311                 .cal_data_len = 8124,
 312                 .fw = {
 313                         .dir = QCA6174_HW_3_0_FW_DIR,
 314                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 315                         .board_size = QCA6174_BOARD_DATA_SZ,
 316                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 317                 },
 318                 .rx_desc_ops = &qca988x_rx_desc_ops,
 319                 .hw_ops = &qca988x_ops,
 320                 .decap_align_bytes = 4,
 321                 .spectral_bin_discard = 0,
 322                 .spectral_bin_offset = 0,
 323                 .vht160_mcs_rx_highest = 0,
 324                 .vht160_mcs_tx_highest = 0,
 325                 .n_cipher_suites = 8,
 326                 .ast_skid_limit = 0x10,
 327                 .num_wds_entries = 0x20,
 328                 .target_64bit = false,
 329                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 330                 .shadow_reg_support = false,
 331                 .rri_on_ddr = false,
 332                 .hw_filter_reset_required = true,
 333                 .fw_diag_ce_download = false,
 334                 .credit_size_workaround = false,
 335                 .tx_stats_over_pktlog = false,
 336                 .dynamic_sar_support = false,
 337                 .hw_restart_disconnect = false,
 338                 .use_fw_tx_credits = true,
 339                 .delay_unmap_buffer = false,
 340         },
 341         {
 342                 .id = QCA6174_HW_3_2_VERSION,
 343                 .dev_id = QCA6174_2_1_DEVICE_ID,
 344                 .bus = ATH10K_BUS_PCI,
 345                 .name = "qca6174 hw3.2",
 346                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 347                 .uart_pin = 6,
 348                 .otp_exe_param = 0,
 349                 .channel_counters_freq_hz = 88000,
 350                 .max_probe_resp_desc_thres = 0,
 351                 .cal_data_len = 8124,
 352                 .fw = {
 353                         /* uses same binaries as hw3.0 */
 354                         .dir = QCA6174_HW_3_0_FW_DIR,
 355                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 356                         .board_size = QCA6174_BOARD_DATA_SZ,
 357                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 358                 },
 359                 .rx_desc_ops = &qca988x_rx_desc_ops,
 360                 .hw_ops = &qca6174_ops,
 361                 .hw_clk = qca6174_clk,
 362                 .target_cpu_freq = 176000000,
 363                 .decap_align_bytes = 4,
 364                 .spectral_bin_discard = 0,
 365                 .spectral_bin_offset = 0,
 366                 .vht160_mcs_rx_highest = 0,
 367                 .vht160_mcs_tx_highest = 0,
 368                 .n_cipher_suites = 8,
 369                 .ast_skid_limit = 0x10,
 370                 .num_wds_entries = 0x20,
 371                 .target_64bit = false,
 372                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 373                 .shadow_reg_support = false,
 374                 .rri_on_ddr = false,
 375                 .hw_filter_reset_required = true,
 376                 .fw_diag_ce_download = true,
 377                 .credit_size_workaround = false,
 378                 .tx_stats_over_pktlog = false,
 379                 .supports_peer_stats_info = true,
 380                 .dynamic_sar_support = true,
 381                 .hw_restart_disconnect = false,
 382                 .use_fw_tx_credits = true,
 383                 .delay_unmap_buffer = false,
 384         },
 385         {
 386                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 387                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 388                 .bus = ATH10K_BUS_PCI,
 389                 .name = "qca99x0 hw2.0",
 390                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 391                 .uart_pin = 7,
 392                 .otp_exe_param = 0x00000700,
 393                 .continuous_frag_desc = true,
 394                 .cck_rate_map_rev2 = true,
 395                 .channel_counters_freq_hz = 150000,
 396                 .max_probe_resp_desc_thres = 24,
 397                 .tx_chain_mask = 0xf,
 398                 .rx_chain_mask = 0xf,
 399                 .max_spatial_stream = 4,
 400                 .cal_data_len = 12064,
 401                 .fw = {
 402                         .dir = QCA99X0_HW_2_0_FW_DIR,
 403                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 404                         .board_size = QCA99X0_BOARD_DATA_SZ,
 405                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 406                 },
 407                 .sw_decrypt_mcast_mgmt = true,
 408                 .rx_desc_ops = &qca99x0_rx_desc_ops,
 409                 .hw_ops = &qca99x0_ops,
 410                 .decap_align_bytes = 1,
 411                 .spectral_bin_discard = 4,
 412                 .spectral_bin_offset = 0,
 413                 .vht160_mcs_rx_highest = 0,
 414                 .vht160_mcs_tx_highest = 0,
 415                 .n_cipher_suites = 11,
 416                 .ast_skid_limit = 0x10,
 417                 .num_wds_entries = 0x20,
 418                 .target_64bit = false,
 419                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 420                 .shadow_reg_support = false,
 421                 .rri_on_ddr = false,
 422                 .hw_filter_reset_required = true,
 423                 .fw_diag_ce_download = false,
 424                 .credit_size_workaround = false,
 425                 .tx_stats_over_pktlog = false,
 426                 .dynamic_sar_support = false,
 427                 .hw_restart_disconnect = false,
 428                 .use_fw_tx_credits = true,
 429                 .delay_unmap_buffer = false,
 430         },
 431         {
 432                 .id = QCA9984_HW_1_0_DEV_VERSION,
 433                 .dev_id = QCA9984_1_0_DEVICE_ID,
 434                 .bus = ATH10K_BUS_PCI,
 435                 .name = "qca9984/qca9994 hw1.0",
 436                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 437                 .uart_pin = 7,
 438                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 439                 .otp_exe_param = 0x00000700,
 440                 .continuous_frag_desc = true,
 441                 .cck_rate_map_rev2 = true,
 442                 .channel_counters_freq_hz = 150000,
 443                 .max_probe_resp_desc_thres = 24,
 444                 .tx_chain_mask = 0xf,
 445                 .rx_chain_mask = 0xf,
 446                 .max_spatial_stream = 4,
 447                 .cal_data_len = 12064,
 448                 .fw = {
 449                         .dir = QCA9984_HW_1_0_FW_DIR,
 450                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 451                         .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
 452                         .board_size = QCA99X0_BOARD_DATA_SZ,
 453                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 454                         .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
 455                 },
 456                 .sw_decrypt_mcast_mgmt = true,
 457                 .rx_desc_ops = &qca99x0_rx_desc_ops,
 458                 .hw_ops = &qca99x0_ops,
 459                 .decap_align_bytes = 1,
 460                 .spectral_bin_discard = 12,
 461                 .spectral_bin_offset = 8,
 462
 463                 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
 464                  * or 2x2 160Mhz, long-guard-interval.
 465                  */
 466                 .vht160_mcs_rx_highest = 1560,
 467                 .vht160_mcs_tx_highest = 1560,
 468                 .n_cipher_suites = 11,
 469                 .ast_skid_limit = 0x10,
 470                 .num_wds_entries = 0x20,
 471                 .target_64bit = false,
 472                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 473                 .shadow_reg_support = false,
 474                 .rri_on_ddr = false,
 475                 .hw_filter_reset_required = true,
 476                 .fw_diag_ce_download = false,
 477                 .credit_size_workaround = false,
 478                 .tx_stats_over_pktlog = false,
 479                 .dynamic_sar_support = false,
 480                 .hw_restart_disconnect = false,
 481                 .use_fw_tx_credits = true,
 482                 .delay_unmap_buffer = false,
 483         },
 484         {
 485                 .id = QCA9888_HW_2_0_DEV_VERSION,
 486                 .dev_id = QCA9888_2_0_DEVICE_ID,
 487                 .bus = ATH10K_BUS_PCI,
 488                 .name = "qca9888 hw2.0",
 489                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 490                 .uart_pin = 7,
 491                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 492                 .otp_exe_param = 0x00000700,
 493                 .continuous_frag_desc = true,
 494                 .channel_counters_freq_hz = 150000,
 495                 .max_probe_resp_desc_thres = 24,
 496                 .tx_chain_mask = 3,
 497                 .rx_chain_mask = 3,
 498                 .max_spatial_stream = 2,
 499                 .cal_data_len = 12064,
 500                 .fw = {
 501                         .dir = QCA9888_HW_2_0_FW_DIR,
 502                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 503                         .board_size = QCA99X0_BOARD_DATA_SZ,
 504                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 505                 },
 506                 .sw_decrypt_mcast_mgmt = true,
 507                 .rx_desc_ops = &qca99x0_rx_desc_ops,
 508                 .hw_ops = &qca99x0_ops,
 509                 .decap_align_bytes = 1,
 510                 .spectral_bin_discard = 12,
 511                 .spectral_bin_offset = 8,
 512
 513                 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
 514                  * 1x1 160Mhz, long-guard-interval.
 515                  */
 516                 .vht160_mcs_rx_highest = 780,
 517                 .vht160_mcs_tx_highest = 780,
 518                 .n_cipher_suites = 11,
 519                 .ast_skid_limit = 0x10,
 520                 .num_wds_entries = 0x20,
 521                 .target_64bit = false,
 522                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 523                 .shadow_reg_support = false,
 524                 .rri_on_ddr = false,
 525                 .hw_filter_reset_required = true,
 526                 .fw_diag_ce_download = false,
 527                 .credit_size_workaround = false,
 528                 .tx_stats_over_pktlog = false,
 529                 .dynamic_sar_support = false,
 530                 .hw_restart_disconnect = false,
 531                 .use_fw_tx_credits = true,
 532                 .delay_unmap_buffer = false,
 533         },
 534         {
 535                 .id = QCA9377_HW_1_0_DEV_VERSION,
 536                 .dev_id = QCA9377_1_0_DEVICE_ID,
 537                 .bus = ATH10K_BUS_PCI,
 538                 .name = "qca9377 hw1.0",
 539                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 540                 .uart_pin = 6,
 541                 .otp_exe_param = 0,
 542                 .channel_counters_freq_hz = 88000,
 543                 .max_probe_resp_desc_thres = 0,
 544                 .cal_data_len = 8124,
 545                 .fw = {
 546                         .dir = QCA9377_HW_1_0_FW_DIR,
 547                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 548                         .board_size = QCA9377_BOARD_DATA_SZ,
 549                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 550                 },
 551                 .rx_desc_ops = &qca988x_rx_desc_ops,
 552                 .hw_ops = &qca988x_ops,
 553                 .decap_align_bytes = 4,
 554                 .spectral_bin_discard = 0,
 555                 .spectral_bin_offset = 0,
 556                 .vht160_mcs_rx_highest = 0,
 557                 .vht160_mcs_tx_highest = 0,
 558                 .n_cipher_suites = 8,
 559                 .ast_skid_limit = 0x10,
 560                 .num_wds_entries = 0x20,
 561                 .target_64bit = false,
 562                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 563                 .shadow_reg_support = false,
 564                 .rri_on_ddr = false,
 565                 .hw_filter_reset_required = true,
 566                 .fw_diag_ce_download = false,
 567                 .credit_size_workaround = false,
 568                 .tx_stats_over_pktlog = false,
 569                 .dynamic_sar_support = false,
 570                 .hw_restart_disconnect = false,
 571                 .use_fw_tx_credits = true,
 572                 .delay_unmap_buffer = false,
 573         },
 574         {
 575                 .id = QCA9377_HW_1_1_DEV_VERSION,
 576                 .dev_id = QCA9377_1_0_DEVICE_ID,
 577                 .bus = ATH10K_BUS_PCI,
 578                 .name = "qca9377 hw1.1",
 579                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 580                 .uart_pin = 6,
 581                 .otp_exe_param = 0,
 582                 .channel_counters_freq_hz = 88000,
 583                 .max_probe_resp_desc_thres = 0,
 584                 .cal_data_len = 8124,
 585                 .fw = {
 586                         .dir = QCA9377_HW_1_0_FW_DIR,
 587                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 588                         .board_size = QCA9377_BOARD_DATA_SZ,
 589                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 590                 },
 591                 .rx_desc_ops = &qca988x_rx_desc_ops,
 592                 .hw_ops = &qca6174_ops,
 593                 .hw_clk = qca6174_clk,
 594                 .target_cpu_freq = 176000000,
 595                 .decap_align_bytes = 4,
 596                 .spectral_bin_discard = 0,
 597                 .spectral_bin_offset = 0,
 598                 .vht160_mcs_rx_highest = 0,
 599                 .vht160_mcs_tx_highest = 0,
 600                 .n_cipher_suites = 8,
 601                 .ast_skid_limit = 0x10,
 602                 .num_wds_entries = 0x20,
 603                 .target_64bit = false,
 604                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 605                 .shadow_reg_support = false,
 606                 .rri_on_ddr = false,
 607                 .hw_filter_reset_required = true,
 608                 .fw_diag_ce_download = true,
 609                 .credit_size_workaround = false,
 610                 .tx_stats_over_pktlog = false,
 611                 .dynamic_sar_support = false,
 612                 .hw_restart_disconnect = false,
 613                 .use_fw_tx_credits = true,
 614                 .delay_unmap_buffer = false,
 615         },
 616         {
 617                 .id = QCA9377_HW_1_1_DEV_VERSION,
 618                 .dev_id = QCA9377_1_0_DEVICE_ID,
 619                 .bus = ATH10K_BUS_SDIO,
 620                 .name = "qca9377 hw1.1 sdio",
 621                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 622                 .uart_pin = 19,
 623                 .otp_exe_param = 0,
 624                 .channel_counters_freq_hz = 88000,
 625                 .max_probe_resp_desc_thres = 0,
 626                 .cal_data_len = 8124,
 627                 .fw = {
 628                         .dir = QCA9377_HW_1_0_FW_DIR,
 629                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 630                         .board_size = QCA9377_BOARD_DATA_SZ,
 631                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 632                 },
 633                 .rx_desc_ops = &qca988x_rx_desc_ops,
 634                 .hw_ops = &qca6174_ops,
 635                 .hw_clk = qca6174_clk,
 636                 .target_cpu_freq = 176000000,
 637                 .decap_align_bytes = 4,
 638                 .n_cipher_suites = 8,
 639                 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
 640                 .ast_skid_limit = 0x10,
 641                 .num_wds_entries = 0x20,
 642                 .uart_pin_workaround = true,
 643                 .credit_size_workaround = true,
 644                 .dynamic_sar_support = false,
 645                 .hw_restart_disconnect = false,
 646                 .use_fw_tx_credits = true,
 647                 .delay_unmap_buffer = false,
 648         },
 649         {
 650                 .id = QCA4019_HW_1_0_DEV_VERSION,
 651                 .dev_id = 0,
 652                 .bus = ATH10K_BUS_AHB,
 653                 .name = "qca4019 hw1.0",
 654                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 655                 .uart_pin = 7,
 656                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 657                 .otp_exe_param = 0x0010000,
 658                 .continuous_frag_desc = true,
 659                 .cck_rate_map_rev2 = true,
 660                 .channel_counters_freq_hz = 125000,
 661                 .max_probe_resp_desc_thres = 24,
 662                 .tx_chain_mask = 0x3,
 663                 .rx_chain_mask = 0x3,
 664                 .max_spatial_stream = 2,
 665                 .cal_data_len = 12064,
 666                 .fw = {
 667                         .dir = QCA4019_HW_1_0_FW_DIR,
 668                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 669                         .board_size = QCA4019_BOARD_DATA_SZ,
 670                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 671                 },
 672                 .sw_decrypt_mcast_mgmt = true,
 673                 .rx_desc_ops = &qca99x0_rx_desc_ops,
 674                 .hw_ops = &qca99x0_ops,
 675                 .decap_align_bytes = 1,
 676                 .spectral_bin_discard = 4,
 677                 .spectral_bin_offset = 0,
 678                 .vht160_mcs_rx_highest = 0,
 679                 .vht160_mcs_tx_highest = 0,
 680                 .n_cipher_suites = 11,
 681                 .ast_skid_limit = 0x10,
 682                 .num_wds_entries = 0x20,
 683                 .target_64bit = false,
 684                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
 685                 .shadow_reg_support = false,
 686                 .rri_on_ddr = false,
 687                 .hw_filter_reset_required = true,
 688                 .fw_diag_ce_download = false,
 689                 .credit_size_workaround = false,
 690                 .tx_stats_over_pktlog = false,
 691                 .dynamic_sar_support = false,
 692                 .hw_restart_disconnect = false,
 693                 .use_fw_tx_credits = true,
 694                 .delay_unmap_buffer = false,
 695         },
 696         {
 697                 .id = WCN3990_HW_1_0_DEV_VERSION,
 698                 .dev_id = 0,
 699                 .bus = ATH10K_BUS_SNOC,
 700                 .name = "wcn3990 hw1.0",
 701                 .continuous_frag_desc = true,
 702                 .tx_chain_mask = 0x7,
 703                 .rx_chain_mask = 0x7,
 704                 .max_spatial_stream = 4,
 705                 .fw = {
 706                         .dir = WCN3990_HW_1_0_FW_DIR,
 707                 },
 708                 .sw_decrypt_mcast_mgmt = true,
 709                 .rx_desc_ops = &wcn3990_rx_desc_ops,
 710                 .hw_ops = &wcn3990_ops,
 711                 .decap_align_bytes = 1,
 712                 .num_peers = TARGET_HL_TLV_NUM_PEERS,
 713                 .n_cipher_suites = 11,
 714                 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
 715                 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
 716                 .target_64bit = true,
 717                 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
 718                 .shadow_reg_support = true,
 719                 .rri_on_ddr = true,
 720                 .hw_filter_reset_required = false,
 721                 .fw_diag_ce_download = false,
 722                 .credit_size_workaround = false,
 723                 .tx_stats_over_pktlog = false,
 724                 .dynamic_sar_support = true,
 725                 .hw_restart_disconnect = true,
 726                 .use_fw_tx_credits = false,
 727                 .delay_unmap_buffer = true,
 728         },
 729 };
 730
 731 static const char *const ath10k_core_fw_feature_str[] = {
 732         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 733         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 734         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 735         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 736         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 737         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 738         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 739         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 740         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 741         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 742         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 743         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 744         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 745         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 746         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 747         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 748         [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 749         [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
 750         [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
 751         [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
 752         [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
 753         [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
 754         [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery",
 755 };
 756
 757 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 758                                                    size_t buf_len,
 759                                                    enum ath10k_fw_features feat)
 760 {
 761         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 762         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 763                      ATH10K_FW_FEATURE_COUNT);
 764
 765         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 766             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 767                 return scnprintf(buf, buf_len, "bit%d", feat);
 768         }
 769
 770         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 771 }
 772
 773 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 774                                      char *buf,
 775                                      size_t buf_len)
 776 {
 777         size_t len = 0;
 778         int i;
 779
 780         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 781                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 782                         if (len > 0)
 783                                 len += scnprintf(buf + len, buf_len - len, ",");
 784
 785                         len += ath10k_core_get_fw_feature_str(buf + len,
 786                                                               buf_len - len,
 787                                                               i);
 788                 }
 789         }
 790 }
 791
 792 static void ath10k_send_suspend_complete(struct ath10k *ar)
 793 {
 794         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 795
 796         complete(&ar->target_suspend);
 797 }
 798
 799 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
 800 {
 801         bool mtu_workaround = ar->hw_params.credit_size_workaround;
 802         int ret;
 803         u32 param = 0;
 804
 805         ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
 806         if (ret)
 807                 return ret;
 808
 809         ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
 810         if (ret)
 811                 return ret;
 812
 813         ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
 814         if (ret)
 815                 return ret;
 816
 817         param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
 818
 819         if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)
 820                 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 821         else
 822                 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
 823
 824         if (mode == ATH10K_FIRMWARE_MODE_UTF)
 825                 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 826         else
 827                 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
 828
 829         ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
 830         if (ret)
 831                 return ret;
 832
 833         ret = ath10k_bmi_read32(ar, hi_option_flag2, &param);
 834         if (ret)
 835                 return ret;
 836
 837         param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST;
 838
 839         ret = ath10k_bmi_write32(ar, hi_option_flag2, param);
 840         if (ret)
 841                 return ret;
 842
 843         return 0;
 844 }
 845
 846 static int ath10k_init_configure_target(struct ath10k *ar)
 847 {
 848         u32 param_host;
 849         int ret;
 850
 851         /* tell target which HTC version it is used*/
 852         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 853                                  HTC_PROTOCOL_VERSION);
 854         if (ret) {
 855                 ath10k_err(ar, "settings HTC version failed\n");
 856                 return ret;
 857         }
 858
 859         /* set the firmware mode to STA/IBSS/AP */
 860         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 861         if (ret) {
 862                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 863                 return ret;
 864         }
 865
 866         /* TODO following parameters need to be re-visited. */
 867         /* num_device */
 868         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 869         /* Firmware mode */
 870         /* FIXME: Why FW_MODE_AP ??.*/
 871         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 872         /* mac_addr_method */
 873         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 874         /* firmware_bridge */
 875         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 876         /* fwsubmode */
 877         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 878
 879         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 880         if (ret) {
 881                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 882                 return ret;
 883         }
 884
 885         /* We do all byte-swapping on the host */
 886         ret = ath10k_bmi_write32(ar, hi_be, 0);
 887         if (ret) {
 888                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 889                 return ret;
 890         }
 891
 892         /* FW descriptor/Data swap flags */
 893         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 894
 895         if (ret) {
 896                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 897                 return ret;
 898         }
 899
 900         /* Some devices have a special sanity check that verifies the PCI
 901          * Device ID is written to this host interest var. It is known to be
 902          * required to boot QCA6164.
 903          */
 904         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 905                                  ar->dev_id);
 906         if (ret) {
 907                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 908                 return ret;
 909         }
 910
 911         return 0;
 912 }
 913
 914 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 915                                                    const char *dir,
 916                                                    const char *file)
 917 {
 918         char filename[100];
 919         const struct firmware *fw;
 920         int ret;
 921
 922         if (file == NULL)
 923                 return ERR_PTR(-ENOENT);
 924
 925         if (dir == NULL)
 926                 dir = ".";
 927
 928         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 929         ret = firmware_request_nowarn(&fw, filename, ar->dev);
 930         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
 931                    filename, ret);
 932
 933         if (ret)
 934                 return ERR_PTR(ret);
 935
 936         return fw;
 937 }
 938
 939 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 940                                       size_t data_len)
 941 {
 942         u32 board_data_size = ar->hw_params.fw.board_size;
 943         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 944         u32 board_ext_data_addr;
 945         int ret;
 946
 947         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 948         if (ret) {
 949                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 950                            ret);
 951                 return ret;
 952         }
 953
 954         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 955                    "boot push board extended data addr 0x%x\n",
 956                    board_ext_data_addr);
 957
 958         if (board_ext_data_addr == 0)
 959                 return 0;
 960
 961         if (data_len != (board_data_size + board_ext_data_size)) {
 962                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 963                            data_len, board_data_size, board_ext_data_size);
 964                 return -EINVAL;
 965         }
 966
 967         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 968                                       data + board_data_size,
 969                                       board_ext_data_size);
 970         if (ret) {
 971                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 972                 return ret;
 973         }
 974
 975         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 976                                  (board_ext_data_size << 16) | 1);
 977         if (ret) {
 978                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 979                            ret);
 980                 return ret;
 981         }
 982
 983         return 0;
 984 }
 985
 986 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 987 {
 988         u32 result, address;
 989         u8 board_id, chip_id;
 990         bool ext_bid_support;
 991         int ret, bmi_board_id_param;
 992
 993         address = ar->hw_params.patch_load_addr;
 994
 995         if (!ar->normal_mode_fw.fw_file.otp_data ||
 996             !ar->normal_mode_fw.fw_file.otp_len) {
 997                 ath10k_warn(ar,
 998                             "failed to retrieve board id because of invalid otp\n");
 999                 return -ENODATA;
1000         }
1001
1002         if (ar->id.bmi_ids_valid) {
1003                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1004                            "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
1005                            ar->id.bmi_board_id, ar->id.bmi_chip_id);
1006                 goto skip_otp_download;
1007         }
1008
1009         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1010                    "boot upload otp to 0x%x len %zd for board id\n",
1011                    address, ar->normal_mode_fw.fw_file.otp_len);
1012
1013         ret = ath10k_bmi_fast_download(ar, address,
1014                                        ar->normal_mode_fw.fw_file.otp_data,
1015                                        ar->normal_mode_fw.fw_file.otp_len);
1016         if (ret) {
1017                 ath10k_err(ar, "could not write otp for board id check: %d\n",
1018                            ret);
1019                 return ret;
1020         }
1021
1022         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1023             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1024             ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1025                 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
1026         else
1027                 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
1028
1029         ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
1030         if (ret) {
1031                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
1032                            ret);
1033                 return ret;
1034         }
1035
1036         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
1037         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
1038         ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
1039
1040         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1041                    "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
1042                    result, board_id, chip_id, ext_bid_support);
1043
1044         ar->id.ext_bid_supported = ext_bid_support;
1045
1046         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
1047             (board_id == 0)) {
1048                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1049                            "board id does not exist in otp, ignore it\n");
1050                 return -EOPNOTSUPP;
1051         }
1052
1053         ar->id.bmi_ids_valid = true;
1054         ar->id.bmi_board_id = board_id;
1055         ar->id.bmi_chip_id = chip_id;
1056
1057 skip_otp_download:
1058
1059         return 0;
1060 }
1061
1062 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
1063 {
1064         struct ath10k *ar = data;
1065         const char *bdf_ext;
1066         const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
1067         u8 bdf_enabled;
1068         int i;
1069
1070         if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
1071                 return;
1072
1073         if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
1074                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1075                            "wrong smbios bdf ext type length (%d).\n",
1076                            hdr->length);
1077                 return;
1078         }
1079
1080         bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1081         if (!bdf_enabled) {
1082                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
1083                 return;
1084         }
1085
1086         /* Only one string exists (per spec) */
1087         bdf_ext = (char *)hdr + hdr->length;
1088
1089         if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
1090                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1091                            "bdf variant magic does not match.\n");
1092                 return;
1093         }
1094
1095         for (i = 0; i < strlen(bdf_ext); i++) {
1096                 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
1097                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1098                                    "bdf variant name contains non ascii chars.\n");
1099                         return;
1100                 }
1101         }
1102
1103         /* Copy extension name without magic suffix */
1104         if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1105                     sizeof(ar->id.bdf_ext)) < 0) {
1106                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1107                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1108                             bdf_ext);
1109                 return;
1110         }
1111
1112         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1113                    "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1114                    ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1115 }
1116
1117 static int ath10k_core_check_smbios(struct ath10k *ar)
1118 {
1119         ar->id.bdf_ext[0] = '\0';
1120         dmi_walk(ath10k_core_check_bdfext, ar);
1121
1122         if (ar->id.bdf_ext[0] == '\0')
1123                 return -ENODATA;
1124
1125         return 0;
1126 }
1127
1128 int ath10k_core_check_dt(struct ath10k *ar)
1129 {
1130         struct device_node *node;
1131         const char *variant = NULL;
1132
1133         node = ar->dev->of_node;
1134         if (!node)
1135                 return -ENOENT;
1136
1137         of_property_read_string(node, "qcom,ath10k-calibration-variant",
1138                                 &variant);
1139         if (!variant)
1140                 return -ENODATA;
1141
1142         if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1143                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1144                            "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1145                             variant);
1146
1147         return 0;
1148 }
1149 EXPORT_SYMBOL(ath10k_core_check_dt);
1150
1151 static int ath10k_download_fw(struct ath10k *ar)
1152 {
1153         u32 address, data_len;
1154         const void *data;
1155         int ret;
1156         struct pm_qos_request latency_qos;
1157
1158         address = ar->hw_params.patch_load_addr;
1159
1160         data = ar->running_fw->fw_file.firmware_data;
1161         data_len = ar->running_fw->fw_file.firmware_len;
1162
1163         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1164         if (ret) {
1165                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1166                            ret);
1167                 return ret;
1168         }
1169
1170         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1171                    "boot uploading firmware image %pK len %d\n",
1172                    data, data_len);
1173
1174         /* Check if device supports to download firmware via
1175          * diag copy engine. Downloading firmware via diag CE
1176          * greatly reduces the time to download firmware.
1177          */
1178         if (ar->hw_params.fw_diag_ce_download) {
1179                 ret = ath10k_hw_diag_fast_download(ar, address,
1180                                                    data, data_len);
1181                 if (ret == 0)
1182                         /* firmware upload via diag ce was successful */
1183                         return 0;
1184
1185                 ath10k_warn(ar,
1186                             "failed to upload firmware via diag ce, trying BMI: %d",
1187                             ret);
1188         }
1189
1190         memset(&latency_qos, 0, sizeof(latency_qos));
1191         cpu_latency_qos_add_request(&latency_qos, 0);
1192
1193         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1194
1195         cpu_latency_qos_remove_request(&latency_qos);
1196
1197         return ret;
1198 }
1199
1200 void ath10k_core_free_board_files(struct ath10k *ar)
1201 {
1202         if (!IS_ERR(ar->normal_mode_fw.board))
1203                 release_firmware(ar->normal_mode_fw.board);
1204
1205         if (!IS_ERR(ar->normal_mode_fw.ext_board))
1206                 release_firmware(ar->normal_mode_fw.ext_board);
1207
1208         ar->normal_mode_fw.board = NULL;
1209         ar->normal_mode_fw.board_data = NULL;
1210         ar->normal_mode_fw.board_len = 0;
1211         ar->normal_mode_fw.ext_board = NULL;
1212         ar->normal_mode_fw.ext_board_data = NULL;
1213         ar->normal_mode_fw.ext_board_len = 0;
1214 }
1215 EXPORT_SYMBOL(ath10k_core_free_board_files);
1216
1217 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1218 {
1219         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1220                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1221
1222         if (!IS_ERR(ar->cal_file))
1223                 release_firmware(ar->cal_file);
1224
1225         if (!IS_ERR(ar->pre_cal_file))
1226                 release_firmware(ar->pre_cal_file);
1227
1228         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1229
1230         ar->normal_mode_fw.fw_file.otp_data = NULL;
1231         ar->normal_mode_fw.fw_file.otp_len = 0;
1232
1233         ar->normal_mode_fw.fw_file.firmware = NULL;
1234         ar->normal_mode_fw.fw_file.firmware_data = NULL;
1235         ar->normal_mode_fw.fw_file.firmware_len = 0;
1236
1237         ar->cal_file = NULL;
1238         ar->pre_cal_file = NULL;
1239 }
1240
1241 static int ath10k_fetch_cal_file(struct ath10k *ar)
1242 {
1243         char filename[100];
1244
1245         /* pre-cal-<bus>-<id>.bin */
1246         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1247                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1248
1249         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1250         if (!IS_ERR(ar->pre_cal_file))
1251                 goto success;
1252
1253         /* cal-<bus>-<id>.bin */
1254         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1255                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1256
1257         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1258         if (IS_ERR(ar->cal_file))
1259                 /* calibration file is optional, don't print any warnings */
1260                 return PTR_ERR(ar->cal_file);
1261 success:
1262         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1263                    ATH10K_FW_DIR, filename);
1264
1265         return 0;
1266 }
1267
1268 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1269 {
1270         const struct firmware *fw;
1271         char boardname[100];
1272
1273         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1274                 if (!ar->hw_params.fw.board) {
1275                         ath10k_err(ar, "failed to find board file fw entry\n");
1276                         return -EINVAL;
1277                 }
1278
1279                 scnprintf(boardname, sizeof(boardname), "board-%s-%s.bin",
1280                           ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1281
1282                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1283                                                                 ar->hw_params.fw.dir,
1284                                                                 boardname);
1285                 if (IS_ERR(ar->normal_mode_fw.board)) {
1286                         fw = ath10k_fetch_fw_file(ar,
1287                                                   ar->hw_params.fw.dir,
1288                                                   ar->hw_params.fw.board);
1289                         ar->normal_mode_fw.board = fw;
1290                 }
1291
1292                 if (IS_ERR(ar->normal_mode_fw.board))
1293                         return PTR_ERR(ar->normal_mode_fw.board);
1294
1295                 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1296                 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1297         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1298                 if (!ar->hw_params.fw.eboard) {
1299                         ath10k_err(ar, "failed to find eboard file fw entry\n");
1300                         return -EINVAL;
1301                 }
1302
1303                 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1304                                           ar->hw_params.fw.eboard);
1305                 ar->normal_mode_fw.ext_board = fw;
1306                 if (IS_ERR(ar->normal_mode_fw.ext_board))
1307                         return PTR_ERR(ar->normal_mode_fw.ext_board);
1308
1309                 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1310                 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1311         }
1312
1313         return 0;
1314 }
1315
1316 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1317                                          const void *buf, size_t buf_len,
1318                                          const char *boardname,
1319                                          int bd_ie_type)
1320 {
1321         const struct ath10k_fw_ie *hdr;
1322         bool name_match_found;
1323         int ret, board_ie_id;
1324         size_t board_ie_len;
1325         const void *board_ie_data;
1326
1327         name_match_found = false;
1328
1329         /* go through ATH10K_BD_IE_BOARD_ elements */
1330         while (buf_len > sizeof(struct ath10k_fw_ie)) {
1331                 hdr = buf;
1332                 board_ie_id = le32_to_cpu(hdr->id);
1333                 board_ie_len = le32_to_cpu(hdr->len);
1334                 board_ie_data = hdr->data;
1335
1336                 buf_len -= sizeof(*hdr);
1337                 buf += sizeof(*hdr);
1338
1339                 if (buf_len < ALIGN(board_ie_len, 4)) {
1340                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1341                                    buf_len, ALIGN(board_ie_len, 4));
1342                         ret = -EINVAL;
1343                         goto out;
1344                 }
1345
1346                 switch (board_ie_id) {
1347                 case ATH10K_BD_IE_BOARD_NAME:
1348                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1349                                         board_ie_data, board_ie_len);
1350
1351                         if (board_ie_len != strlen(boardname))
1352                                 break;
1353
1354                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
1355                         if (ret)
1356                                 break;
1357
1358                         name_match_found = true;
1359                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1360                                    "boot found match for name '%s'",
1361                                    boardname);
1362                         break;
1363                 case ATH10K_BD_IE_BOARD_DATA:
1364                         if (!name_match_found)
1365                                 /* no match found */
1366                                 break;
1367
1368                         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1369                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1370                                            "boot found board data for '%s'",
1371                                                 boardname);
1372
1373                                 ar->normal_mode_fw.board_data = board_ie_data;
1374                                 ar->normal_mode_fw.board_len = board_ie_len;
1375                         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1376                                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1377                                            "boot found eboard data for '%s'",
1378                                                 boardname);
1379
1380                                 ar->normal_mode_fw.ext_board_data = board_ie_data;
1381                                 ar->normal_mode_fw.ext_board_len = board_ie_len;
1382                         }
1383
1384                         ret = 0;
1385                         goto out;
1386                 default:
1387                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1388                                     board_ie_id);
1389                         break;
1390                 }
1391
1392                 /* jump over the padding */
1393                 board_ie_len = ALIGN(board_ie_len, 4);
1394
1395                 buf_len -= board_ie_len;
1396                 buf += board_ie_len;
1397         }
1398
1399         /* no match found */
1400         ret = -ENOENT;
1401
1402 out:
1403         return ret;
1404 }
1405
1406 static int ath10k_core_search_bd(struct ath10k *ar,
1407                                  const char *boardname,
1408                                  const u8 *data,
1409                                  size_t len)
1410 {
1411         size_t ie_len;
1412         struct ath10k_fw_ie *hdr;
1413         int ret = -ENOENT, ie_id;
1414
1415         while (len > sizeof(struct ath10k_fw_ie)) {
1416                 hdr = (struct ath10k_fw_ie *)data;
1417                 ie_id = le32_to_cpu(hdr->id);
1418                 ie_len = le32_to_cpu(hdr->len);
1419
1420                 len -= sizeof(*hdr);
1421                 data = hdr->data;
1422
1423                 if (len < ALIGN(ie_len, 4)) {
1424                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1425                                    ie_id, ie_len, len);
1426                         return -EINVAL;
1427                 }
1428
1429                 switch (ie_id) {
1430                 case ATH10K_BD_IE_BOARD:
1431                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1432                                                             boardname,
1433                                                             ATH10K_BD_IE_BOARD);
1434                         if (ret == -ENOENT)
1435                                 /* no match found, continue */
1436                                 break;
1437
1438                         /* either found or error, so stop searching */
1439                         goto out;
1440                 case ATH10K_BD_IE_BOARD_EXT:
1441                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1442                                                             boardname,
1443                                                             ATH10K_BD_IE_BOARD_EXT);
1444                         if (ret == -ENOENT)
1445                                 /* no match found, continue */
1446                                 break;
1447
1448                         /* either found or error, so stop searching */
1449                         goto out;
1450                 }
1451
1452                 /* jump over the padding */
1453                 ie_len = ALIGN(ie_len, 4);
1454
1455                 len -= ie_len;
1456                 data += ie_len;
1457         }
1458
1459 out:
1460         /* return result of parse_bd_ie_board() or -ENOENT */
1461         return ret;
1462 }
1463
1464 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1465                                               const char *boardname,
1466                                               const char *fallback_boardname1,
1467                                               const char *fallback_boardname2,
1468                                               const char *filename)
1469 {
1470         size_t len, magic_len;
1471         const u8 *data;
1472         int ret;
1473
1474         /* Skip if already fetched during board data download */
1475         if (!ar->normal_mode_fw.board)
1476                 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1477                                                                 ar->hw_params.fw.dir,
1478                                                                 filename);
1479         if (IS_ERR(ar->normal_mode_fw.board))
1480                 return PTR_ERR(ar->normal_mode_fw.board);
1481
1482         data = ar->normal_mode_fw.board->data;
1483         len = ar->normal_mode_fw.board->size;
1484
1485         /* magic has extra null byte padded */
1486         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1487         if (len < magic_len) {
1488                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1489                            ar->hw_params.fw.dir, filename, len);
1490                 ret = -EINVAL;
1491                 goto err;
1492         }
1493
1494         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1495                 ath10k_err(ar, "found invalid board magic\n");
1496                 ret = -EINVAL;
1497                 goto err;
1498         }
1499
1500         /* magic is padded to 4 bytes */
1501         magic_len = ALIGN(magic_len, 4);
1502         if (len < magic_len) {
1503                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1504                            ar->hw_params.fw.dir, filename, len);
1505                 ret = -EINVAL;
1506                 goto err;
1507         }
1508
1509         data += magic_len;
1510         len -= magic_len;
1511
1512         /* attempt to find boardname in the IE list */
1513         ret = ath10k_core_search_bd(ar, boardname, data, len);
1514
1515         /* if we didn't find it and have a fallback name, try that */
1516         if (ret == -ENOENT && fallback_boardname1)
1517                 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len);
1518
1519         if (ret == -ENOENT && fallback_boardname2)
1520                 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len);
1521
1522         if (ret == -ENOENT) {
1523                 ath10k_err(ar,
1524                            "failed to fetch board data for %s from %s/%s\n",
1525                            boardname, ar->hw_params.fw.dir, filename);
1526                 ret = -ENODATA;
1527         }
1528
1529         if (ret)
1530                 goto err;
1531
1532         return 0;
1533
1534 err:
1535         ath10k_core_free_board_files(ar);
1536         return ret;
1537 }
1538
1539 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1540                                          size_t name_len, bool with_variant,
1541                                          bool with_chip_id)
1542 {
1543         /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1544         char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1545
1546         if (with_variant && ar->id.bdf_ext[0] != '\0')
1547                 scnprintf(variant, sizeof(variant), ",variant=%s",
1548                           ar->id.bdf_ext);
1549
1550         if (ar->id.bmi_ids_valid) {
1551                 scnprintf(name, name_len,
1552                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1553                           ath10k_bus_str(ar->hif.bus),
1554                           ar->id.bmi_chip_id,
1555                           ar->id.bmi_board_id, variant);
1556                 goto out;
1557         }
1558
1559         if (ar->id.qmi_ids_valid) {
1560                 if (with_chip_id)
1561                         scnprintf(name, name_len,
1562                                   "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s",
1563                                   ath10k_bus_str(ar->hif.bus),
1564                                   ar->id.qmi_board_id, ar->id.qmi_chip_id,
1565                                   variant);
1566                 else
1567                         scnprintf(name, name_len,
1568                                   "bus=%s,qmi-board-id=%x",
1569                                   ath10k_bus_str(ar->hif.bus),
1570                                   ar->id.qmi_board_id);
1571                 goto out;
1572         }
1573
1574         scnprintf(name, name_len,
1575                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1576                   ath10k_bus_str(ar->hif.bus),
1577                   ar->id.vendor, ar->id.device,
1578                   ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1579 out:
1580         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1581
1582         return 0;
1583 }
1584
1585 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1586                                           size_t name_len)
1587 {
1588         if (ar->id.bmi_ids_valid) {
1589                 scnprintf(name, name_len,
1590                           "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1591                           ath10k_bus_str(ar->hif.bus),
1592                           ar->id.bmi_chip_id,
1593                           ar->id.bmi_eboard_id);
1594
1595                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1596                 return 0;
1597         }
1598         /* Fallback if returned board id is zero */
1599         return -1;
1600 }
1601
1602 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1603 {
1604         char boardname[100], fallback_boardname1[100], fallback_boardname2[100];
1605         int ret;
1606
1607         if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1608                 /* With variant and chip id */
1609                 ret = ath10k_core_create_board_name(ar, boardname,
1610                                                     sizeof(boardname), true,
1611                                                     true);
1612                 if (ret) {
1613                         ath10k_err(ar, "failed to create board name: %d", ret);
1614                         return ret;
1615                 }
1616
1617                 /* Without variant and only chip-id */
1618                 ret = ath10k_core_create_board_name(ar, fallback_boardname1,
1619                                                     sizeof(boardname), false,
1620                                                     true);
1621                 if (ret) {
1622                         ath10k_err(ar, "failed to create 1st fallback board name: %d",
1623                                    ret);
1624                         return ret;
1625                 }
1626
1627                 /* Without variant and without chip-id */
1628                 ret = ath10k_core_create_board_name(ar, fallback_boardname2,
1629                                                     sizeof(boardname), false,
1630                                                     false);
1631                 if (ret) {
1632                         ath10k_err(ar, "failed to create 2nd fallback board name: %d",
1633                                    ret);
1634                         return ret;
1635                 }
1636         } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1637                 ret = ath10k_core_create_eboard_name(ar, boardname,
1638                                                      sizeof(boardname));
1639                 if (ret) {
1640                         ath10k_err(ar, "fallback to eboard.bin since board id 0");
1641                         goto fallback;
1642                 }
1643         }
1644
1645         ar->bd_api = 2;
1646         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1647                                                  fallback_boardname1,
1648                                                  fallback_boardname2,
1649                                                  ATH10K_BOARD_API2_FILE);
1650         if (!ret)
1651                 goto success;
1652
1653 fallback:
1654         ar->bd_api = 1;
1655         ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1656         if (ret) {
1657                 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1658                            ar->hw_params.fw.dir);
1659                 return ret;
1660         }
1661
1662 success:
1663         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1664         return 0;
1665 }
1666 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1667
1668 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1669 {
1670         u32 result, address;
1671         u8 ext_board_id;
1672         int ret;
1673
1674         address = ar->hw_params.patch_load_addr;
1675
1676         if (!ar->normal_mode_fw.fw_file.otp_data ||
1677             !ar->normal_mode_fw.fw_file.otp_len) {
1678                 ath10k_warn(ar,
1679                             "failed to retrieve extended board id due to otp binary missing\n");
1680                 return -ENODATA;
1681         }
1682
1683         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1684                    "boot upload otp to 0x%x len %zd for ext board id\n",
1685                    address, ar->normal_mode_fw.fw_file.otp_len);
1686
1687         ret = ath10k_bmi_fast_download(ar, address,
1688                                        ar->normal_mode_fw.fw_file.otp_data,
1689                                        ar->normal_mode_fw.fw_file.otp_len);
1690         if (ret) {
1691                 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1692                            ret);
1693                 return ret;
1694         }
1695
1696         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1697         if (ret) {
1698                 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1699                            ret);
1700                 return ret;
1701         }
1702
1703         if (!result) {
1704                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1705                            "ext board id does not exist in otp, ignore it\n");
1706                 return -EOPNOTSUPP;
1707         }
1708
1709         ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1710
1711         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1712                    "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1713                    result, ext_board_id);
1714
1715         ar->id.bmi_eboard_id = ext_board_id;
1716
1717         return 0;
1718 }
1719
1720 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1721                                       size_t data_len)
1722 {
1723         u32 board_data_size = ar->hw_params.fw.board_size;
1724         u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1725         u32 board_address;
1726         u32 ext_board_address;
1727         int ret;
1728
1729         ret = ath10k_push_board_ext_data(ar, data, data_len);
1730         if (ret) {
1731                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1732                 goto exit;
1733         }
1734
1735         ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1736         if (ret) {
1737                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1738                 goto exit;
1739         }
1740
1741         ret = ath10k_bmi_write_memory(ar, board_address, data,
1742                                       min_t(u32, board_data_size,
1743                                             data_len));
1744         if (ret) {
1745                 ath10k_err(ar, "could not write board data (%d)\n", ret);
1746                 goto exit;
1747         }
1748
1749         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1750         if (ret) {
1751                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1752                 goto exit;
1753         }
1754
1755         if (!ar->id.ext_bid_supported)
1756                 goto exit;
1757
1758         /* Extended board data download */
1759         ret = ath10k_core_get_ext_board_id_from_otp(ar);
1760         if (ret == -EOPNOTSUPP) {
1761                 /* Not fetching ext_board_data if ext board id is 0 */
1762                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1763                 return 0;
1764         } else if (ret) {
1765                 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1766                 goto exit;
1767         }
1768
1769         ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1770         if (ret)
1771                 goto exit;
1772
1773         if (ar->normal_mode_fw.ext_board_data) {
1774                 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1775                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1776                            "boot writing ext board data to addr 0x%x",
1777                            ext_board_address);
1778                 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1779                                               ar->normal_mode_fw.ext_board_data,
1780                                               min_t(u32, eboard_data_size, data_len));
1781                 if (ret)
1782                         ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1783         }
1784
1785 exit:
1786         return ret;
1787 }
1788
1789 static int ath10k_download_and_run_otp(struct ath10k *ar)
1790 {
1791         u32 result, address = ar->hw_params.patch_load_addr;
1792         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1793         int ret;
1794
1795         ret = ath10k_download_board_data(ar,
1796                                          ar->running_fw->board_data,
1797                                          ar->running_fw->board_len);
1798         if (ret) {
1799                 ath10k_err(ar, "failed to download board data: %d\n", ret);
1800                 return ret;
1801         }
1802
1803         /* OTP is optional */
1804
1805         if (!ar->running_fw->fw_file.otp_data ||
1806             !ar->running_fw->fw_file.otp_len) {
1807                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1808                             ar->running_fw->fw_file.otp_data,
1809                             ar->running_fw->fw_file.otp_len);
1810                 return 0;
1811         }
1812
1813         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1814                    address, ar->running_fw->fw_file.otp_len);
1815
1816         ret = ath10k_bmi_fast_download(ar, address,
1817                                        ar->running_fw->fw_file.otp_data,
1818                                        ar->running_fw->fw_file.otp_len);
1819         if (ret) {
1820                 ath10k_err(ar, "could not write otp (%d)\n", ret);
1821                 return ret;
1822         }
1823
1824         /* As of now pre-cal is valid for 10_4 variants */
1825         if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1826             ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1827             ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1828                 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1829
1830         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1831         if (ret) {
1832                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1833                 return ret;
1834         }
1835
1836         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1837
1838         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1839                                    ar->running_fw->fw_file.fw_features)) &&
1840             result != 0) {
1841                 ath10k_err(ar, "otp calibration failed: %d", result);
1842                 return -EINVAL;
1843         }
1844
1845         return 0;
1846 }
1847
1848 static int ath10k_download_cal_file(struct ath10k *ar,
1849                                     const struct firmware *file)
1850 {
1851         int ret;
1852
1853         if (!file)
1854                 return -ENOENT;
1855
1856         if (IS_ERR(file))
1857                 return PTR_ERR(file);
1858
1859         ret = ath10k_download_board_data(ar, file->data, file->size);
1860         if (ret) {
1861                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1862                 return ret;
1863         }
1864
1865         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1866
1867         return 0;
1868 }
1869
1870 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1871 {
1872         struct device_node *node;
1873         int data_len;
1874         void *data;
1875         int ret;
1876
1877         node = ar->dev->of_node;
1878         if (!node)
1879                 /* Device Tree is optional, don't print any warnings if
1880                  * there's no node for ath10k.
1881                  */
1882                 return -ENOENT;
1883
1884         if (!of_get_property(node, dt_name, &data_len)) {
1885                 /* The calibration data node is optional */
1886                 return -ENOENT;
1887         }
1888
1889         if (data_len != ar->hw_params.cal_data_len) {
1890                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1891                             data_len);
1892                 ret = -EMSGSIZE;
1893                 goto out;
1894         }
1895
1896         data = kmalloc(data_len, GFP_KERNEL);
1897         if (!data) {
1898                 ret = -ENOMEM;
1899                 goto out;
1900         }
1901
1902         ret = of_property_read_u8_array(node, dt_name, data, data_len);
1903         if (ret) {
1904                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1905                             ret);
1906                 goto out_free;
1907         }
1908
1909         ret = ath10k_download_board_data(ar, data, data_len);
1910         if (ret) {
1911                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1912                             ret);
1913                 goto out_free;
1914         }
1915
1916         ret = 0;
1917
1918 out_free:
1919         kfree(data);
1920
1921 out:
1922         return ret;
1923 }
1924
1925 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1926 {
1927         size_t data_len;
1928         void *data = NULL;
1929         int ret;
1930
1931         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1932         if (ret) {
1933                 if (ret != -EOPNOTSUPP)
1934                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1935                                     ret);
1936                 goto out_free;
1937         }
1938
1939         ret = ath10k_download_board_data(ar, data, data_len);
1940         if (ret) {
1941                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1942                             ret);
1943                 goto out_free;
1944         }
1945
1946         ret = 0;
1947
1948 out_free:
1949         kfree(data);
1950
1951         return ret;
1952 }
1953
1954 static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name)
1955 {
1956         struct nvmem_cell *cell;
1957         void *buf;
1958         size_t len;
1959         int ret;
1960
1961         cell = devm_nvmem_cell_get(ar->dev, cell_name);
1962         if (IS_ERR(cell)) {
1963                 ret = PTR_ERR(cell);
1964                 return ret;
1965         }
1966
1967         buf = nvmem_cell_read(cell, &len);
1968         if (IS_ERR(buf))
1969                 return PTR_ERR(buf);
1970
1971         if (ar->hw_params.cal_data_len != len) {
1972                 kfree(buf);
1973                 ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n",
1974                             cell_name, len, ar->hw_params.cal_data_len);
1975                 return -EMSGSIZE;
1976         }
1977
1978         ret = ath10k_download_board_data(ar, buf, len);
1979         kfree(buf);
1980         if (ret)
1981                 ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n",
1982                             cell_name, ret);
1983
1984         return ret;
1985 }
1986
1987 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1988                                      struct ath10k_fw_file *fw_file)
1989 {
1990         size_t magic_len, len, ie_len;
1991         int ie_id, i, index, bit, ret;
1992         struct ath10k_fw_ie *hdr;
1993         const u8 *data;
1994         __le32 *timestamp, *version;
1995
1996         /* first fetch the firmware file (firmware-*.bin) */
1997         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1998                                                  name);
1999         if (IS_ERR(fw_file->firmware))
2000                 return PTR_ERR(fw_file->firmware);
2001
2002         data = fw_file->firmware->data;
2003         len = fw_file->firmware->size;
2004
2005         /* magic also includes the null byte, check that as well */
2006         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
2007
2008         if (len < magic_len) {
2009                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
2010                            ar->hw_params.fw.dir, name, len);
2011                 ret = -EINVAL;
2012                 goto err;
2013         }
2014
2015         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
2016                 ath10k_err(ar, "invalid firmware magic\n");
2017                 ret = -EINVAL;
2018                 goto err;
2019         }
2020
2021         /* jump over the padding */
2022         magic_len = ALIGN(magic_len, 4);
2023
2024         len -= magic_len;
2025         data += magic_len;
2026
2027         /* loop elements */
2028         while (len > sizeof(struct ath10k_fw_ie)) {
2029                 hdr = (struct ath10k_fw_ie *)data;
2030
2031                 ie_id = le32_to_cpu(hdr->id);
2032                 ie_len = le32_to_cpu(hdr->len);
2033
2034                 len -= sizeof(*hdr);
2035                 data += sizeof(*hdr);
2036
2037                 if (len < ie_len) {
2038                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
2039                                    ie_id, len, ie_len);
2040                         ret = -EINVAL;
2041                         goto err;
2042                 }
2043
2044                 switch (ie_id) {
2045                 case ATH10K_FW_IE_FW_VERSION:
2046                         if (ie_len > sizeof(fw_file->fw_version) - 1)
2047                                 break;
2048
2049                         memcpy(fw_file->fw_version, data, ie_len);
2050                         fw_file->fw_version[ie_len] = '\0';
2051
2052                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2053                                    "found fw version %s\n",
2054                                     fw_file->fw_version);
2055                         break;
2056                 case ATH10K_FW_IE_TIMESTAMP:
2057                         if (ie_len != sizeof(u32))
2058                                 break;
2059
2060                         timestamp = (__le32 *)data;
2061
2062                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
2063                                    le32_to_cpup(timestamp));
2064                         break;
2065                 case ATH10K_FW_IE_FEATURES:
2066                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2067                                    "found firmware features ie (%zd B)\n",
2068                                    ie_len);
2069
2070                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
2071                                 index = i / 8;
2072                                 bit = i % 8;
2073
2074                                 if (index == ie_len)
2075                                         break;
2076
2077                                 if (data[index] & (1 << bit)) {
2078                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2079                                                    "Enabling feature bit: %i\n",
2080                                                    i);
2081                                         __set_bit(i, fw_file->fw_features);
2082                                 }
2083                         }
2084
2085                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
2086                                         fw_file->fw_features,
2087                                         sizeof(fw_file->fw_features));
2088                         break;
2089                 case ATH10K_FW_IE_FW_IMAGE:
2090                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2091                                    "found fw image ie (%zd B)\n",
2092                                    ie_len);
2093
2094                         fw_file->firmware_data = data;
2095                         fw_file->firmware_len = ie_len;
2096
2097                         break;
2098                 case ATH10K_FW_IE_OTP_IMAGE:
2099                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2100                                    "found otp image ie (%zd B)\n",
2101                                    ie_len);
2102
2103                         fw_file->otp_data = data;
2104                         fw_file->otp_len = ie_len;
2105
2106                         break;
2107                 case ATH10K_FW_IE_WMI_OP_VERSION:
2108                         if (ie_len != sizeof(u32))
2109                                 break;
2110
2111                         version = (__le32 *)data;
2112
2113                         fw_file->wmi_op_version = le32_to_cpup(version);
2114
2115                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
2116                                    fw_file->wmi_op_version);
2117                         break;
2118                 case ATH10K_FW_IE_HTT_OP_VERSION:
2119                         if (ie_len != sizeof(u32))
2120                                 break;
2121
2122                         version = (__le32 *)data;
2123
2124                         fw_file->htt_op_version = le32_to_cpup(version);
2125
2126                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
2127                                    fw_file->htt_op_version);
2128                         break;
2129                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
2130                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2131                                    "found fw code swap image ie (%zd B)\n",
2132                                    ie_len);
2133                         fw_file->codeswap_data = data;
2134                         fw_file->codeswap_len = ie_len;
2135                         break;
2136                 default:
2137                         ath10k_warn(ar, "Unknown FW IE: %u\n",
2138                                     le32_to_cpu(hdr->id));
2139                         break;
2140                 }
2141
2142                 /* jump over the padding */
2143                 ie_len = ALIGN(ie_len, 4);
2144
2145                 len -= ie_len;
2146                 data += ie_len;
2147         }
2148
2149         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
2150             (!fw_file->firmware_data || !fw_file->firmware_len)) {
2151                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
2152                             ar->hw_params.fw.dir, name);
2153                 ret = -ENOMEDIUM;
2154                 goto err;
2155         }
2156
2157         return 0;
2158
2159 err:
2160         ath10k_core_free_firmware_files(ar);
2161         return ret;
2162 }
2163
2164 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
2165                                     size_t fw_name_len, int fw_api)
2166 {
2167         switch (ar->hif.bus) {
2168         case ATH10K_BUS_SDIO:
2169         case ATH10K_BUS_USB:
2170                 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
2171                           ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
2172                           fw_api);
2173                 break;
2174         case ATH10K_BUS_PCI:
2175         case ATH10K_BUS_AHB:
2176         case ATH10K_BUS_SNOC:
2177                 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2178                           ATH10K_FW_FILE_BASE, fw_api);
2179                 break;
2180         }
2181 }
2182
2183 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2184 {
2185         int ret, i;
2186         char fw_name[100];
2187
2188         /* calibration file is optional, don't check for any errors */
2189         ath10k_fetch_cal_file(ar);
2190
2191         for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2192                 ar->fw_api = i;
2193                 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2194                            ar->fw_api);
2195
2196                 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2197                 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2198                                                        &ar->normal_mode_fw.fw_file);
2199                 if (!ret)
2200                         goto success;
2201         }
2202
2203         /* we end up here if we couldn't fetch any firmware */
2204
2205         ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2206                    ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2207                    ret);
2208
2209         return ret;
2210
2211 success:
2212         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2213
2214         return 0;
2215 }
2216
2217 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2218 {
2219         int ret;
2220
2221         ret = ath10k_download_cal_nvmem(ar, "pre-calibration");
2222         if (ret == 0) {
2223                 ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM;
2224                 goto success;
2225         } else if (ret == -EPROBE_DEFER) {
2226                 return ret;
2227         }
2228
2229         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2230                    "boot did not find a pre-calibration nvmem-cell, try file next: %d\n",
2231                    ret);
2232
2233         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2234         if (ret == 0) {
2235                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2236                 goto success;
2237         }
2238
2239         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2240                    "boot did not find a pre calibration file, try DT next: %d\n",
2241                    ret);
2242
2243         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2244         if (ret) {
2245                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2246                            "unable to load pre cal data from DT: %d\n", ret);
2247                 return ret;
2248         }
2249         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2250
2251 success:
2252         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2253                    ath10k_cal_mode_str(ar->cal_mode));
2254
2255         return 0;
2256 }
2257
2258 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2259 {
2260         int ret;
2261
2262         ret = ath10k_core_pre_cal_download(ar);
2263         if (ret) {
2264                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2265                            "failed to load pre cal data: %d\n", ret);
2266                 return ret;
2267         }
2268
2269         ret = ath10k_core_get_board_id_from_otp(ar);
2270         if (ret) {
2271                 ath10k_err(ar, "failed to get board id: %d\n", ret);
2272                 return ret;
2273         }
2274
2275         ret = ath10k_download_and_run_otp(ar);
2276         if (ret) {
2277                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2278                 return ret;
2279         }
2280
2281         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2282                    "pre cal configuration done successfully\n");
2283
2284         return 0;
2285 }
2286
2287 static int ath10k_download_cal_data(struct ath10k *ar)
2288 {
2289         int ret;
2290
2291         ret = ath10k_core_pre_cal_config(ar);
2292         if (ret == 0)
2293                 return 0;
2294
2295         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2296                    "pre cal download procedure failed, try cal file: %d\n",
2297                    ret);
2298
2299         ret = ath10k_download_cal_nvmem(ar, "calibration");
2300         if (ret == 0) {
2301                 ar->cal_mode = ATH10K_CAL_MODE_NVMEM;
2302                 goto done;
2303         } else if (ret == -EPROBE_DEFER) {
2304                 return ret;
2305         }
2306
2307         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2308                    "boot did not find a calibration nvmem-cell, try file next: %d\n",
2309                    ret);
2310
2311         ret = ath10k_download_cal_file(ar, ar->cal_file);
2312         if (ret == 0) {
2313                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2314                 goto done;
2315         }
2316
2317         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2318                    "boot did not find a calibration file, try DT next: %d\n",
2319                    ret);
2320
2321         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2322         if (ret == 0) {
2323                 ar->cal_mode = ATH10K_CAL_MODE_DT;
2324                 goto done;
2325         }
2326
2327         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2328                    "boot did not find DT entry, try target EEPROM next: %d\n",
2329                    ret);
2330
2331         ret = ath10k_download_cal_eeprom(ar);
2332         if (ret == 0) {
2333                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2334                 goto done;
2335         }
2336
2337         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2338                    "boot did not find target EEPROM entry, try OTP next: %d\n",
2339                    ret);
2340
2341         ret = ath10k_download_and_run_otp(ar);
2342         if (ret) {
2343                 ath10k_err(ar, "failed to run otp: %d\n", ret);
2344                 return ret;
2345         }
2346
2347         ar->cal_mode = ATH10K_CAL_MODE_OTP;
2348
2349 done:
2350         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2351                    ath10k_cal_mode_str(ar->cal_mode));
2352         return 0;
2353 }
2354
2355 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2356 {
2357         struct device_node *node;
2358         u8 coex_support = 0;
2359         int ret;
2360
2361         node = ar->dev->of_node;
2362         if (!node)
2363                 goto out;
2364
2365         ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2366         if (ret) {
2367                 ar->coex_support = true;
2368                 goto out;
2369         }
2370
2371         if (coex_support) {
2372                 ar->coex_support = true;
2373         } else {
2374                 ar->coex_support = false;
2375                 ar->coex_gpio_pin = -1;
2376                 goto out;
2377         }
2378
2379         ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2380                                    &ar->coex_gpio_pin);
2381         if (ret)
2382                 ar->coex_gpio_pin = -1;
2383
2384 out:
2385         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2386                    ar->coex_support, ar->coex_gpio_pin);
2387 }
2388
2389 static int ath10k_init_uart(struct ath10k *ar)
2390 {
2391         int ret;
2392
2393         /*
2394          * Explicitly setting UART prints to zero as target turns it on
2395          * based on scratch registers.
2396          */
2397         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2398         if (ret) {
2399                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2400                 return ret;
2401         }
2402
2403         if (!uart_print) {
2404                 if (ar->hw_params.uart_pin_workaround) {
2405                         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2406                                                  ar->hw_params.uart_pin);
2407                         if (ret) {
2408                                 ath10k_warn(ar, "failed to set UART TX pin: %d",
2409                                             ret);
2410                                 return ret;
2411                         }
2412                 }
2413
2414                 return 0;
2415         }
2416
2417         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2418         if (ret) {
2419                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2420                 return ret;
2421         }
2422
2423         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2424         if (ret) {
2425                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2426                 return ret;
2427         }
2428
2429         /* Set the UART baud rate to 19200. */
2430         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2431         if (ret) {
2432                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2433                 return ret;
2434         }
2435
2436         ath10k_info(ar, "UART prints enabled\n");
2437         return 0;
2438 }
2439
2440 static int ath10k_init_hw_params(struct ath10k *ar)
2441 {
2442         const struct ath10k_hw_params *hw_params;
2443         int i;
2444
2445         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2446                 hw_params = &ath10k_hw_params_list[i];
2447
2448                 if (hw_params->bus == ar->hif.bus &&
2449                     hw_params->id == ar->target_version &&
2450                     hw_params->dev_id == ar->dev_id)
2451                         break;
2452         }
2453
2454         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2455                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2456                            ar->target_version);
2457                 return -EINVAL;
2458         }
2459
2460         ar->hw_params = *hw_params;
2461
2462         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2463                    ar->hw_params.name, ar->target_version);
2464
2465         return 0;
2466 }
2467
2468 void ath10k_core_start_recovery(struct ath10k *ar)
2469 {
2470         if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags)) {
2471                 ath10k_warn(ar, "already restarting\n");
2472                 return;
2473         }
2474
2475         queue_work(ar->workqueue, &ar->restart_work);
2476 }
2477 EXPORT_SYMBOL(ath10k_core_start_recovery);
2478
2479 void ath10k_core_napi_enable(struct ath10k *ar)
2480 {
2481         lockdep_assert_held(&ar->conf_mutex);
2482
2483         if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2484                 return;
2485
2486         napi_enable(&ar->napi);
2487         set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2488 }
2489 EXPORT_SYMBOL(ath10k_core_napi_enable);
2490
2491 void ath10k_core_napi_sync_disable(struct ath10k *ar)
2492 {
2493         lockdep_assert_held(&ar->conf_mutex);
2494
2495         if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2496                 return;
2497
2498         napi_synchronize(&ar->napi);
2499         napi_disable(&ar->napi);
2500         clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2501 }
2502 EXPORT_SYMBOL(ath10k_core_napi_sync_disable);
2503
2504 static void ath10k_core_restart(struct work_struct *work)
2505 {
2506         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2507         struct ath10k_vif *arvif;
2508         int ret;
2509
2510         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2511
2512         /* Place a barrier to make sure the compiler doesn't reorder
2513          * CRASH_FLUSH and calling other functions.
2514          */
2515         barrier();
2516
2517         ieee80211_stop_queues(ar->hw);
2518         ath10k_drain_tx(ar);
2519         complete(&ar->scan.started);
2520         complete(&ar->scan.completed);
2521         complete(&ar->scan.on_channel);
2522         complete(&ar->offchan_tx_completed);
2523         complete(&ar->install_key_done);
2524         complete(&ar->vdev_setup_done);
2525         complete(&ar->vdev_delete_done);
2526         complete(&ar->thermal.wmi_sync);
2527         complete(&ar->bss_survey_done);
2528         wake_up(&ar->htt.empty_tx_wq);
2529         wake_up(&ar->wmi.tx_credits_wq);
2530         wake_up(&ar->peer_mapping_wq);
2531
2532         /* TODO: We can have one instance of cancelling coverage_class_work by
2533          * moving it to ath10k_halt(), so that both stop() and restart() would
2534          * call that but it takes conf_mutex() and if we call cancel_work_sync()
2535          * with conf_mutex it will deadlock.
2536          */
2537         cancel_work_sync(&ar->set_coverage_class_work);
2538
2539         mutex_lock(&ar->conf_mutex);
2540
2541         switch (ar->state) {
2542         case ATH10K_STATE_ON:
2543                 ar->state = ATH10K_STATE_RESTARTING;
2544                 ath10k_halt(ar);
2545                 ath10k_scan_finish(ar);
2546                 if (ar->hw_params.hw_restart_disconnect) {
2547                         list_for_each_entry(arvif, &ar->arvifs, list) {
2548                                 if (arvif->is_up &&
2549                                     arvif->vdev_type == WMI_VDEV_TYPE_STA)
2550                                         ieee80211_hw_restart_disconnect(arvif->vif);
2551                         }
2552                 }
2553
2554                 ieee80211_restart_hw(ar->hw);
2555                 break;
2556         case ATH10K_STATE_OFF:
2557                 /* this can happen if driver is being unloaded
2558                  * or if the crash happens during FW probing
2559                  */
2560                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2561                 break;
2562         case ATH10K_STATE_RESTARTING:
2563                 /* hw restart might be requested from multiple places */
2564                 break;
2565         case ATH10K_STATE_RESTARTED:
2566                 ar->state = ATH10K_STATE_WEDGED;
2567                 fallthrough;
2568         case ATH10K_STATE_WEDGED:
2569                 ath10k_warn(ar, "device is wedged, will not restart\n");
2570                 break;
2571         case ATH10K_STATE_UTF:
2572                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2573                 break;
2574         }
2575
2576         mutex_unlock(&ar->conf_mutex);
2577
2578         ret = ath10k_coredump_submit(ar);
2579         if (ret)
2580                 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2581                             ret);
2582
2583         complete(&ar->driver_recovery);
2584 }
2585
2586 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2587 {
2588         struct ath10k *ar = container_of(work, struct ath10k,
2589                                          set_coverage_class_work);
2590
2591         if (ar->hw_params.hw_ops->set_coverage_class)
2592                 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2593 }
2594
2595 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2596 {
2597         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2598         int max_num_peers;
2599
2600         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2601             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2602                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2603                 return -EINVAL;
2604         }
2605
2606         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2607                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2608                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2609                 return -EINVAL;
2610         }
2611
2612         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2613         switch (ath10k_cryptmode_param) {
2614         case ATH10K_CRYPT_MODE_HW:
2615                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2616                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2617                 break;
2618         case ATH10K_CRYPT_MODE_SW:
2619                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2620                               fw_file->fw_features)) {
2621                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2622                         return -EINVAL;
2623                 }
2624
2625                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2626                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2627                 break;
2628         default:
2629                 ath10k_info(ar, "invalid cryptmode: %d\n",
2630                             ath10k_cryptmode_param);
2631                 return -EINVAL;
2632         }
2633
2634         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2635         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2636
2637         if (ath10k_frame_mode == ATH10K_HW_TXRX_RAW) {
2638                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2639                               fw_file->fw_features)) {
2640                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
2641                         return -EINVAL;
2642                 }
2643                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2644         }
2645
2646         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2647                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2648
2649                 /* Workaround:
2650                  *
2651                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2652                  * and causes enormous performance issues (malformed frames,
2653                  * etc).
2654                  *
2655                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
2656                  * albeit a bit slower compared to regular operation.
2657                  */
2658                 ar->htt.max_num_amsdu = 1;
2659         }
2660
2661         /* Backwards compatibility for firmwares without
2662          * ATH10K_FW_IE_WMI_OP_VERSION.
2663          */
2664         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2665                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2666                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2667                                      fw_file->fw_features))
2668                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2669                         else
2670                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2671                 } else {
2672                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2673                 }
2674         }
2675
2676         switch (fw_file->wmi_op_version) {
2677         case ATH10K_FW_WMI_OP_VERSION_MAIN:
2678                 max_num_peers = TARGET_NUM_PEERS;
2679                 ar->max_num_stations = TARGET_NUM_STATIONS;
2680                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2681                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2682                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2683                         WMI_STAT_PEER;
2684                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2685                 break;
2686         case ATH10K_FW_WMI_OP_VERSION_10_1:
2687         case ATH10K_FW_WMI_OP_VERSION_10_2:
2688         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2689                 if (ath10k_peer_stats_enabled(ar)) {
2690                         max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2691                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2692                 } else {
2693                         max_num_peers = TARGET_10X_NUM_PEERS;
2694                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2695                 }
2696                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2697                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2698                 ar->fw_stats_req_mask = WMI_STAT_PEER;
2699                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2700                 break;
2701         case ATH10K_FW_WMI_OP_VERSION_TLV:
2702                 max_num_peers = TARGET_TLV_NUM_PEERS;
2703                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2704                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2705                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2706                 if (ar->hif.bus == ATH10K_BUS_SDIO)
2707                         ar->htt.max_num_pending_tx =
2708                                 TARGET_TLV_NUM_MSDU_DESC_HL;
2709                 else
2710                         ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2711                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2712                 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2713                         WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2714                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2715                 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2716                 break;
2717         case ATH10K_FW_WMI_OP_VERSION_10_4:
2718                 max_num_peers = TARGET_10_4_NUM_PEERS;
2719                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2720                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2721                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2722                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2723                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2724                                         WMI_10_4_STAT_PEER_EXTD |
2725                                         WMI_10_4_STAT_VDEV_EXTD;
2726                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2727                 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2728
2729                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2730                              fw_file->fw_features))
2731                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2732                 else
2733                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2734                 break;
2735         case ATH10K_FW_WMI_OP_VERSION_UNSET:
2736         case ATH10K_FW_WMI_OP_VERSION_MAX:
2737         default:
2738                 WARN_ON(1);
2739                 return -EINVAL;
2740         }
2741
2742         if (ar->hw_params.num_peers)
2743                 ar->max_num_peers = ar->hw_params.num_peers;
2744         else
2745                 ar->max_num_peers = max_num_peers;
2746
2747         /* Backwards compatibility for firmwares without
2748          * ATH10K_FW_IE_HTT_OP_VERSION.
2749          */
2750         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2751                 switch (fw_file->wmi_op_version) {
2752                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2753                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2754                         break;
2755                 case ATH10K_FW_WMI_OP_VERSION_10_1:
2756                 case ATH10K_FW_WMI_OP_VERSION_10_2:
2757                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2758                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2759                         break;
2760                 case ATH10K_FW_WMI_OP_VERSION_TLV:
2761                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2762                         break;
2763                 case ATH10K_FW_WMI_OP_VERSION_10_4:
2764                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2765                 case ATH10K_FW_WMI_OP_VERSION_MAX:
2766                         ath10k_err(ar, "htt op version not found from fw meta data");
2767                         return -EINVAL;
2768                 }
2769         }
2770
2771         return 0;
2772 }
2773
2774 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2775 {
2776         int ret;
2777         int vdev_id;
2778         int vdev_type;
2779         int vdev_subtype;
2780         const u8 *vdev_addr;
2781
2782         vdev_id = 0;
2783         vdev_type = WMI_VDEV_TYPE_STA;
2784         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2785         vdev_addr = ar->mac_addr;
2786
2787         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2788                                      vdev_addr);
2789         if (ret) {
2790                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2791                 return ret;
2792         }
2793
2794         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2795         if (ret) {
2796                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2797                 return ret;
2798         }
2799
2800         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2801          * serialized properly implicitly.
2802          *
2803          * Moreover (most) WMI commands have no explicit acknowledges. It is
2804          * possible to infer it implicitly by poking firmware with echo
2805          * command - getting a reply means all preceding comments have been
2806          * (mostly) processed.
2807          *
2808          * In case of vdev create/delete this is sufficient.
2809          *
2810          * Without this it's possible to end up with a race when HTT Rx ring is
2811          * started before vdev create/delete hack is complete allowing a short
2812          * window of opportunity to receive (and Tx ACK) a bunch of frames.
2813          */
2814         ret = ath10k_wmi_barrier(ar);
2815         if (ret) {
2816                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2817                 return ret;
2818         }
2819
2820         return 0;
2821 }
2822
2823 static int ath10k_core_compat_services(struct ath10k *ar)
2824 {
2825         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2826
2827         /* all 10.x firmware versions support thermal throttling but don't
2828          * advertise the support via service flags so we have to hardcode
2829          * it here
2830          */
2831         switch (fw_file->wmi_op_version) {
2832         case ATH10K_FW_WMI_OP_VERSION_10_1:
2833         case ATH10K_FW_WMI_OP_VERSION_10_2:
2834         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2835         case ATH10K_FW_WMI_OP_VERSION_10_4:
2836                 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2837                 break;
2838         default:
2839                 break;
2840         }
2841
2842         return 0;
2843 }
2844
2845 #define TGT_IRAM_READ_PER_ITR (8 * 1024)
2846
2847 static int ath10k_core_copy_target_iram(struct ath10k *ar)
2848 {
2849         const struct ath10k_hw_mem_layout *hw_mem;
2850         const struct ath10k_mem_region *tmp, *mem_region = NULL;
2851         dma_addr_t paddr;
2852         void *vaddr = NULL;
2853         u8 num_read_itr;
2854         int i, ret;
2855         u32 len, remaining_len;
2856
2857         /* copy target iram feature must work also when
2858          * ATH10K_FW_CRASH_DUMP_RAM_DATA is disabled, so
2859          * _ath10k_coredump_get_mem_layout() to accomplist that
2860          */
2861         hw_mem = _ath10k_coredump_get_mem_layout(ar);
2862         if (!hw_mem)
2863                 /* if CONFIG_DEV_COREDUMP is disabled we get NULL, then
2864                  * just silently disable the feature by doing nothing
2865                  */
2866                 return 0;
2867
2868         for (i = 0; i < hw_mem->region_table.size; i++) {
2869                 tmp = &hw_mem->region_table.regions[i];
2870                 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) {
2871                         mem_region = tmp;
2872                         break;
2873                 }
2874         }
2875
2876         if (!mem_region)
2877                 return -ENOMEM;
2878
2879         for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2880                 if (ar->wmi.mem_chunks[i].req_id ==
2881                     WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) {
2882                         vaddr = ar->wmi.mem_chunks[i].vaddr;
2883                         len = ar->wmi.mem_chunks[i].len;
2884                         break;
2885                 }
2886         }
2887
2888         if (!vaddr || !len) {
2889                 ath10k_warn(ar, "No allocated memory for IRAM back up");
2890                 return -ENOMEM;
2891         }
2892
2893         len = (len < mem_region->len) ? len : mem_region->len;
2894         paddr = mem_region->start;
2895         num_read_itr = len / TGT_IRAM_READ_PER_ITR;
2896         remaining_len = len % TGT_IRAM_READ_PER_ITR;
2897         for (i = 0; i < num_read_itr; i++) {
2898                 ret = ath10k_hif_diag_read(ar, paddr, vaddr,
2899                                            TGT_IRAM_READ_PER_ITR);
2900                 if (ret) {
2901                         ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2902                                     ret);
2903                         return ret;
2904                 }
2905
2906                 paddr += TGT_IRAM_READ_PER_ITR;
2907                 vaddr += TGT_IRAM_READ_PER_ITR;
2908         }
2909
2910         if (remaining_len) {
2911                 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len);
2912                 if (ret) {
2913                         ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
2914                                     ret);
2915                         return ret;
2916                 }
2917         }
2918
2919         ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n");
2920
2921         return 0;
2922 }
2923
2924 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2925                       const struct ath10k_fw_components *fw)
2926 {
2927         int status;
2928         u32 val;
2929
2930         lockdep_assert_held(&ar->conf_mutex);
2931
2932         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2933
2934         ar->running_fw = fw;
2935
2936         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2937                       ar->running_fw->fw_file.fw_features)) {
2938                 ath10k_bmi_start(ar);
2939
2940                 /* Enable hardware clock to speed up firmware download */
2941                 if (ar->hw_params.hw_ops->enable_pll_clk) {
2942                         status = ar->hw_params.hw_ops->enable_pll_clk(ar);
2943                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n",
2944                                    status);
2945                 }
2946
2947                 if (ath10k_init_configure_target(ar)) {
2948                         status = -EINVAL;
2949                         goto err;
2950                 }
2951
2952                 status = ath10k_download_cal_data(ar);
2953                 if (status)
2954                         goto err;
2955
2956                 /* Some of qca988x solutions are having global reset issue
2957                  * during target initialization. Bypassing PLL setting before
2958                  * downloading firmware and letting the SoC run on REF_CLK is
2959                  * fixing the problem. Corresponding firmware change is also
2960                  * needed to set the clock source once the target is
2961                  * initialized.
2962                  */
2963                 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2964                              ar->running_fw->fw_file.fw_features)) {
2965                         status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2966                         if (status) {
2967                                 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2968                                            status);
2969                                 goto err;
2970                         }
2971                 }
2972
2973                 status = ath10k_download_fw(ar);
2974                 if (status)
2975                         goto err;
2976
2977                 status = ath10k_init_uart(ar);
2978                 if (status)
2979                         goto err;
2980
2981                 if (ar->hif.bus == ATH10K_BUS_SDIO) {
2982                         status = ath10k_init_sdio(ar, mode);
2983                         if (status) {
2984                                 ath10k_err(ar, "failed to init SDIO: %d\n", status);
2985                                 goto err;
2986                         }
2987                 }
2988         }
2989
2990         ar->htc.htc_ops.target_send_suspend_complete =
2991                 ath10k_send_suspend_complete;
2992
2993         status = ath10k_htc_init(ar);
2994         if (status) {
2995                 ath10k_err(ar, "could not init HTC (%d)\n", status);
2996                 goto err;
2997         }
2998
2999         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3000                       ar->running_fw->fw_file.fw_features)) {
3001                 status = ath10k_bmi_done(ar);
3002                 if (status)
3003                         goto err;
3004         }
3005
3006         status = ath10k_wmi_attach(ar);
3007         if (status) {
3008                 ath10k_err(ar, "WMI attach failed: %d\n", status);
3009                 goto err;
3010         }
3011
3012         status = ath10k_htt_init(ar);
3013         if (status) {
3014                 ath10k_err(ar, "failed to init htt: %d\n", status);
3015                 goto err_wmi_detach;
3016         }
3017
3018         status = ath10k_htt_tx_start(&ar->htt);
3019         if (status) {
3020                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
3021                 goto err_wmi_detach;
3022         }
3023
3024         /* If firmware indicates Full Rx Reorder support it must be used in a
3025          * slightly different manner. Let HTT code know.
3026          */
3027         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
3028                                                 ar->wmi.svc_map));
3029
3030         status = ath10k_htt_rx_alloc(&ar->htt);
3031         if (status) {
3032                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
3033                 goto err_htt_tx_detach;
3034         }
3035
3036         status = ath10k_hif_start(ar);
3037         if (status) {
3038                 ath10k_err(ar, "could not start HIF: %d\n", status);
3039                 goto err_htt_rx_detach;
3040         }
3041
3042         status = ath10k_htc_wait_target(&ar->htc);
3043         if (status) {
3044                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
3045                 goto err_hif_stop;
3046         }
3047
3048         status = ath10k_hif_start_post(ar);
3049         if (status) {
3050                 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
3051                 goto err_hif_stop;
3052         }
3053
3054         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3055                 status = ath10k_htt_connect(&ar->htt);
3056                 if (status) {
3057                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
3058                         goto err_hif_stop;
3059                 }
3060         }
3061
3062         status = ath10k_wmi_connect(ar);
3063         if (status) {
3064                 ath10k_err(ar, "could not connect wmi: %d\n", status);
3065                 goto err_hif_stop;
3066         }
3067
3068         status = ath10k_htc_start(&ar->htc);
3069         if (status) {
3070                 ath10k_err(ar, "failed to start htc: %d\n", status);
3071                 goto err_hif_stop;
3072         }
3073
3074         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3075                 status = ath10k_wmi_wait_for_service_ready(ar);
3076                 if (status) {
3077                         ath10k_warn(ar, "wmi service ready event not received");
3078                         goto err_hif_stop;
3079                 }
3080         }
3081
3082         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
3083                    ar->hw->wiphy->fw_version);
3084
3085         if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY,
3086                      ar->running_fw->fw_file.fw_features)) {
3087                 status = ath10k_core_copy_target_iram(ar);
3088                 if (status) {
3089                         ath10k_warn(ar, "failed to copy target iram contents: %d",
3090                                     status);
3091                         goto err_hif_stop;
3092                 }
3093         }
3094
3095         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
3096             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3097                 val = 0;
3098                 if (ath10k_peer_stats_enabled(ar))
3099                         val = WMI_10_4_PEER_STATS;
3100
3101                 /* Enable vdev stats by default */
3102                 val |= WMI_10_4_VDEV_STATS;
3103
3104                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
3105                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
3106
3107                 ath10k_core_fetch_btcoex_dt(ar);
3108
3109                 /* 10.4 firmware supports BT-Coex without reloading firmware
3110                  * via pdev param. To support Bluetooth coexistence pdev param,
3111                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
3112                  * enabled always.
3113                  *
3114                  * We can still enable BTCOEX if firmware has the support
3115                  * even though btceox_support value is
3116                  * ATH10K_DT_BTCOEX_NOT_FOUND
3117                  */
3118
3119                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
3120                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
3121                              ar->running_fw->fw_file.fw_features) &&
3122                     ar->coex_support)
3123                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
3124
3125                 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
3126                              ar->wmi.svc_map))
3127                         val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
3128
3129                 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
3130                              ar->wmi.svc_map))
3131                         val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
3132
3133                 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
3134                              ar->wmi.svc_map))
3135                         val |= WMI_10_4_TX_DATA_ACK_RSSI;
3136
3137                 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
3138                         val |= WMI_10_4_REPORT_AIRTIME;
3139
3140                 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
3141                              ar->wmi.svc_map))
3142                         val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT;
3143
3144                 status = ath10k_mac_ext_resource_config(ar, val);
3145                 if (status) {
3146                         ath10k_err(ar,
3147                                    "failed to send ext resource cfg command : %d\n",
3148                                    status);
3149                         goto err_hif_stop;
3150                 }
3151         }
3152
3153         status = ath10k_wmi_cmd_init(ar);
3154         if (status) {
3155                 ath10k_err(ar, "could not send WMI init command (%d)\n",
3156                            status);
3157                 goto err_hif_stop;
3158         }
3159
3160         status = ath10k_wmi_wait_for_unified_ready(ar);
3161         if (status) {
3162                 ath10k_err(ar, "wmi unified ready event not received\n");
3163                 goto err_hif_stop;
3164         }
3165
3166         status = ath10k_core_compat_services(ar);
3167         if (status) {
3168                 ath10k_err(ar, "compat services failed: %d\n", status);
3169                 goto err_hif_stop;
3170         }
3171
3172         status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
3173         if (status && status != -EOPNOTSUPP) {
3174                 ath10k_err(ar,
3175                            "failed to set base mac address: %d\n", status);
3176                 goto err_hif_stop;
3177         }
3178
3179         /* Some firmware revisions do not properly set up hardware rx filter
3180          * registers.
3181          *
3182          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
3183          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
3184          * any frames that matches MAC_PCU_RX_FILTER which is also
3185          * misconfigured to accept anything.
3186          *
3187          * The ADDR1 is programmed using internal firmware structure field and
3188          * can't be (easily/sanely) reached from the driver explicitly. It is
3189          * possible to implicitly make it correct by creating a dummy vdev and
3190          * then deleting it.
3191          */
3192         if (ar->hw_params.hw_filter_reset_required &&
3193             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3194                 status = ath10k_core_reset_rx_filter(ar);
3195                 if (status) {
3196                         ath10k_err(ar,
3197                                    "failed to reset rx filter: %d\n", status);
3198                         goto err_hif_stop;
3199                 }
3200         }
3201
3202         status = ath10k_htt_rx_ring_refill(ar);
3203         if (status) {
3204                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
3205                 goto err_hif_stop;
3206         }
3207
3208         if (ar->max_num_vdevs >= 64)
3209                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
3210         else
3211                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
3212
3213         INIT_LIST_HEAD(&ar->arvifs);
3214
3215         /* we don't care about HTT in UTF mode */
3216         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3217                 status = ath10k_htt_setup(&ar->htt);
3218                 if (status) {
3219                         ath10k_err(ar, "failed to setup htt: %d\n", status);
3220                         goto err_hif_stop;
3221                 }
3222         }
3223
3224         status = ath10k_debug_start(ar);
3225         if (status)
3226                 goto err_hif_stop;
3227
3228         status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
3229         if (status && status != -EOPNOTSUPP) {
3230                 ath10k_warn(ar, "set target log mode failed: %d\n", status);
3231                 goto err_hif_stop;
3232         }
3233
3234         return 0;
3235
3236 err_hif_stop:
3237         ath10k_hif_stop(ar);
3238 err_htt_rx_detach:
3239         ath10k_htt_rx_free(&ar->htt);
3240 err_htt_tx_detach:
3241         ath10k_htt_tx_free(&ar->htt);
3242 err_wmi_detach:
3243         ath10k_wmi_detach(ar);
3244 err:
3245         return status;
3246 }
3247 EXPORT_SYMBOL(ath10k_core_start);
3248
3249 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
3250 {
3251         int ret;
3252         unsigned long time_left;
3253
3254         reinit_completion(&ar->target_suspend);
3255
3256         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
3257         if (ret) {
3258                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
3259                 return ret;
3260         }
3261
3262         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
3263
3264         if (!time_left) {
3265                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
3266                 return -ETIMEDOUT;
3267         }
3268
3269         return 0;
3270 }
3271
3272 void ath10k_core_stop(struct ath10k *ar)
3273 {
3274         lockdep_assert_held(&ar->conf_mutex);
3275         ath10k_debug_stop(ar);
3276
3277         /* try to suspend target */
3278         if (ar->state != ATH10K_STATE_RESTARTING &&
3279             ar->state != ATH10K_STATE_UTF)
3280                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
3281
3282         ath10k_hif_stop(ar);
3283         ath10k_htt_tx_stop(&ar->htt);
3284         ath10k_htt_rx_free(&ar->htt);
3285         ath10k_wmi_detach(ar);
3286
3287         ar->id.bmi_ids_valid = false;
3288 }
3289 EXPORT_SYMBOL(ath10k_core_stop);
3290
3291 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
3292  * order to know what hw capabilities should be advertised to mac80211 it is
3293  * necessary to load the firmware (and tear it down immediately since start
3294  * hook will try to init it again) before registering
3295  */
3296 static int ath10k_core_probe_fw(struct ath10k *ar)
3297 {
3298         struct bmi_target_info target_info;
3299         int ret = 0;
3300
3301         ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
3302         if (ret) {
3303                 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
3304                 return ret;
3305         }
3306
3307         switch (ar->hif.bus) {
3308         case ATH10K_BUS_SDIO:
3309                 memset(&target_info, 0, sizeof(target_info));
3310                 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
3311                 if (ret) {
3312                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3313                         goto err_power_down;
3314                 }
3315                 ar->target_version = target_info.version;
3316                 ar->hw->wiphy->hw_version = target_info.version;
3317                 break;
3318         case ATH10K_BUS_PCI:
3319         case ATH10K_BUS_AHB:
3320         case ATH10K_BUS_USB:
3321                 memset(&target_info, 0, sizeof(target_info));
3322                 ret = ath10k_bmi_get_target_info(ar, &target_info);
3323                 if (ret) {
3324                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3325                         goto err_power_down;
3326                 }
3327                 ar->target_version = target_info.version;
3328                 ar->hw->wiphy->hw_version = target_info.version;
3329                 break;
3330         case ATH10K_BUS_SNOC:
3331                 memset(&target_info, 0, sizeof(target_info));
3332                 ret = ath10k_hif_get_target_info(ar, &target_info);
3333                 if (ret) {
3334                         ath10k_err(ar, "could not get target info (%d)\n", ret);
3335                         goto err_power_down;
3336                 }
3337                 ar->target_version = target_info.version;
3338                 ar->hw->wiphy->hw_version = target_info.version;
3339                 break;
3340         default:
3341                 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3342         }
3343
3344         ret = ath10k_init_hw_params(ar);
3345         if (ret) {
3346                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3347                 goto err_power_down;
3348         }
3349
3350         ret = ath10k_core_fetch_firmware_files(ar);
3351         if (ret) {
3352                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3353                 goto err_power_down;
3354         }
3355
3356         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3357                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
3358         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3359                sizeof(ar->hw->wiphy->fw_version));
3360
3361         ath10k_debug_print_hwfw_info(ar);
3362
3363         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3364                       ar->normal_mode_fw.fw_file.fw_features)) {
3365                 ret = ath10k_core_pre_cal_download(ar);
3366                 if (ret) {
3367                         /* pre calibration data download is not necessary
3368                          * for all the chipsets. Ignore failures and continue.
3369                          */
3370                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
3371                                    "could not load pre cal data: %d\n", ret);
3372                 }
3373
3374                 ret = ath10k_core_get_board_id_from_otp(ar);
3375                 if (ret && ret != -EOPNOTSUPP) {
3376                         ath10k_err(ar, "failed to get board id from otp: %d\n",
3377                                    ret);
3378                         goto err_free_firmware_files;
3379                 }
3380
3381                 ret = ath10k_core_check_smbios(ar);
3382                 if (ret)
3383                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3384
3385                 ret = ath10k_core_check_dt(ar);
3386                 if (ret)
3387                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3388
3389                 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3390                 if (ret) {
3391                         ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3392                         goto err_free_firmware_files;
3393                 }
3394
3395                 ath10k_debug_print_board_info(ar);
3396         }
3397
3398         device_get_mac_address(ar->dev, ar->mac_addr);
3399
3400         ret = ath10k_core_init_firmware_features(ar);
3401         if (ret) {
3402                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3403                            ret);
3404                 goto err_free_firmware_files;
3405         }
3406
3407         if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3408                       ar->normal_mode_fw.fw_file.fw_features)) {
3409                 ret = ath10k_swap_code_seg_init(ar,
3410                                                 &ar->normal_mode_fw.fw_file);
3411                 if (ret) {
3412                         ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3413                                    ret);
3414                         goto err_free_firmware_files;
3415                 }
3416         }
3417
3418         mutex_lock(&ar->conf_mutex);
3419
3420         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3421                                 &ar->normal_mode_fw);
3422         if (ret) {
3423                 ath10k_err(ar, "could not init core (%d)\n", ret);
3424                 goto err_unlock;
3425         }
3426
3427         ath10k_debug_print_boot_info(ar);
3428         ath10k_core_stop(ar);
3429
3430         mutex_unlock(&ar->conf_mutex);
3431
3432         ath10k_hif_power_down(ar);
3433         return 0;
3434
3435 err_unlock:
3436         mutex_unlock(&ar->conf_mutex);
3437
3438 err_free_firmware_files:
3439         ath10k_core_free_firmware_files(ar);
3440
3441 err_power_down:
3442         ath10k_hif_power_down(ar);
3443
3444         return ret;
3445 }
3446
3447 static void ath10k_core_register_work(struct work_struct *work)
3448 {
3449         struct ath10k *ar = container_of(work, struct ath10k, register_work);
3450         int status;
3451
3452         /* peer stats are enabled by default */
3453         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3454
3455         status = ath10k_core_probe_fw(ar);
3456         if (status) {
3457                 ath10k_err(ar, "could not probe fw (%d)\n", status);
3458                 goto err;
3459         }
3460
3461         status = ath10k_mac_register(ar);
3462         if (status) {
3463                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3464                 goto err_release_fw;
3465         }
3466
3467         status = ath10k_coredump_register(ar);
3468         if (status) {
3469                 ath10k_err(ar, "unable to register coredump\n");
3470                 goto err_unregister_mac;
3471         }
3472
3473         status = ath10k_debug_register(ar);
3474         if (status) {
3475                 ath10k_err(ar, "unable to initialize debugfs\n");
3476                 goto err_unregister_coredump;
3477         }
3478
3479         status = ath10k_spectral_create(ar);
3480         if (status) {
3481                 ath10k_err(ar, "failed to initialize spectral\n");
3482                 goto err_debug_destroy;
3483         }
3484
3485         status = ath10k_thermal_register(ar);
3486         if (status) {
3487                 ath10k_err(ar, "could not register thermal device: %d\n",
3488                            status);
3489                 goto err_spectral_destroy;
3490         }
3491
3492         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3493         return;
3494
3495 err_spectral_destroy:
3496         ath10k_spectral_destroy(ar);
3497 err_debug_destroy:
3498         ath10k_debug_destroy(ar);
3499 err_unregister_coredump:
3500         ath10k_coredump_unregister(ar);
3501 err_unregister_mac:
3502         ath10k_mac_unregister(ar);
3503 err_release_fw:
3504         ath10k_core_free_firmware_files(ar);
3505 err:
3506         /* TODO: It's probably a good idea to release device from the driver
3507          * but calling device_release_driver() here will cause a deadlock.
3508          */
3509         return;
3510 }
3511
3512 int ath10k_core_register(struct ath10k *ar,
3513                          const struct ath10k_bus_params *bus_params)
3514 {
3515         ar->bus_param = *bus_params;
3516
3517         queue_work(ar->workqueue, &ar->register_work);
3518
3519         return 0;
3520 }
3521 EXPORT_SYMBOL(ath10k_core_register);
3522
3523 void ath10k_core_unregister(struct ath10k *ar)
3524 {
3525         cancel_work_sync(&ar->register_work);
3526
3527         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3528                 return;
3529
3530         ath10k_thermal_unregister(ar);
3531         /* Stop spectral before unregistering from mac80211 to remove the
3532          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3533          * would be already be free'd recursively, leading to a double free.
3534          */
3535         ath10k_spectral_destroy(ar);
3536
3537         /* We must unregister from mac80211 before we stop HTC and HIF.
3538          * Otherwise we will fail to submit commands to FW and mac80211 will be
3539          * unhappy about callback failures.
3540          */
3541         ath10k_mac_unregister(ar);
3542
3543         ath10k_testmode_destroy(ar);
3544
3545         ath10k_core_free_firmware_files(ar);
3546         ath10k_core_free_board_files(ar);
3547
3548         ath10k_debug_unregister(ar);
3549 }
3550 EXPORT_SYMBOL(ath10k_core_unregister);
3551
3552 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3553                                   enum ath10k_bus bus,
3554                                   enum ath10k_hw_rev hw_rev,
3555                                   const struct ath10k_hif_ops *hif_ops)
3556 {
3557         struct ath10k *ar;
3558         int ret;
3559
3560         ar = ath10k_mac_create(priv_size);
3561         if (!ar)
3562                 return NULL;
3563
3564         ar->ath_common.priv = ar;
3565         ar->ath_common.hw = ar->hw;
3566         ar->dev = dev;
3567         ar->hw_rev = hw_rev;
3568         ar->hif.ops = hif_ops;
3569         ar->hif.bus = bus;
3570
3571         switch (hw_rev) {
3572         case ATH10K_HW_QCA988X:
3573         case ATH10K_HW_QCA9887:
3574                 ar->regs = &qca988x_regs;
3575                 ar->hw_ce_regs = &qcax_ce_regs;
3576                 ar->hw_values = &qca988x_values;
3577                 break;
3578         case ATH10K_HW_QCA6174:
3579         case ATH10K_HW_QCA9377:
3580                 ar->regs = &qca6174_regs;
3581                 ar->hw_ce_regs = &qcax_ce_regs;
3582                 ar->hw_values = &qca6174_values;
3583                 break;
3584         case ATH10K_HW_QCA99X0:
3585         case ATH10K_HW_QCA9984:
3586                 ar->regs = &qca99x0_regs;
3587                 ar->hw_ce_regs = &qcax_ce_regs;
3588                 ar->hw_values = &qca99x0_values;
3589                 break;
3590         case ATH10K_HW_QCA9888:
3591                 ar->regs = &qca99x0_regs;
3592                 ar->hw_ce_regs = &qcax_ce_regs;
3593                 ar->hw_values = &qca9888_values;
3594                 break;
3595         case ATH10K_HW_QCA4019:
3596                 ar->regs = &qca4019_regs;
3597                 ar->hw_ce_regs = &qcax_ce_regs;
3598                 ar->hw_values = &qca4019_values;
3599                 break;
3600         case ATH10K_HW_WCN3990:
3601                 ar->regs = &wcn3990_regs;
3602                 ar->hw_ce_regs = &wcn3990_ce_regs;
3603                 ar->hw_values = &wcn3990_values;
3604                 break;
3605         default:
3606                 ath10k_err(ar, "unsupported core hardware revision %d\n",
3607                            hw_rev);
3608                 ret = -ENOTSUPP;
3609                 goto err_free_mac;
3610         }
3611
3612         init_completion(&ar->scan.started);
3613         init_completion(&ar->scan.completed);
3614         init_completion(&ar->scan.on_channel);
3615         init_completion(&ar->target_suspend);
3616         init_completion(&ar->driver_recovery);
3617         init_completion(&ar->wow.wakeup_completed);
3618
3619         init_completion(&ar->install_key_done);
3620         init_completion(&ar->vdev_setup_done);
3621         init_completion(&ar->vdev_delete_done);
3622         init_completion(&ar->thermal.wmi_sync);
3623         init_completion(&ar->bss_survey_done);
3624         init_completion(&ar->peer_delete_done);
3625         init_completion(&ar->peer_stats_info_complete);
3626
3627         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3628
3629         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3630         if (!ar->workqueue)
3631                 goto err_free_mac;
3632
3633         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3634         if (!ar->workqueue_aux)
3635                 goto err_free_wq;
3636
3637         ar->workqueue_tx_complete =
3638                 create_singlethread_workqueue("ath10k_tx_complete_wq");
3639         if (!ar->workqueue_tx_complete)
3640                 goto err_free_aux_wq;
3641
3642         mutex_init(&ar->conf_mutex);
3643         mutex_init(&ar->dump_mutex);
3644         spin_lock_init(&ar->data_lock);
3645
3646         INIT_LIST_HEAD(&ar->peers);
3647         init_waitqueue_head(&ar->peer_mapping_wq);
3648         init_waitqueue_head(&ar->htt.empty_tx_wq);
3649         init_waitqueue_head(&ar->wmi.tx_credits_wq);
3650
3651         skb_queue_head_init(&ar->htt.rx_indication_head);
3652
3653         init_completion(&ar->offchan_tx_completed);
3654         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3655         skb_queue_head_init(&ar->offchan_tx_queue);
3656
3657         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3658         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3659
3660         INIT_WORK(&ar->register_work, ath10k_core_register_work);
3661         INIT_WORK(&ar->restart_work, ath10k_core_restart);
3662         INIT_WORK(&ar->set_coverage_class_work,
3663                   ath10k_core_set_coverage_class_work);
3664
3665         init_dummy_netdev(&ar->napi_dev);
3666
3667         ret = ath10k_coredump_create(ar);
3668         if (ret)
3669                 goto err_free_tx_complete;
3670
3671         ret = ath10k_debug_create(ar);
3672         if (ret)
3673                 goto err_free_coredump;
3674
3675         return ar;
3676
3677 err_free_coredump:
3678         ath10k_coredump_destroy(ar);
3679 err_free_tx_complete:
3680         destroy_workqueue(ar->workqueue_tx_complete);
3681 err_free_aux_wq:
3682         destroy_workqueue(ar->workqueue_aux);
3683 err_free_wq:
3684         destroy_workqueue(ar->workqueue);
3685 err_free_mac:
3686         ath10k_mac_destroy(ar);
3687
3688         return NULL;
3689 }
3690 EXPORT_SYMBOL(ath10k_core_create);
3691
3692 void ath10k_core_destroy(struct ath10k *ar)
3693 {
3694         destroy_workqueue(ar->workqueue);
3695
3696         destroy_workqueue(ar->workqueue_aux);
3697
3698         destroy_workqueue(ar->workqueue_tx_complete);
3699
3700         ath10k_debug_destroy(ar);
3701         ath10k_coredump_destroy(ar);
3702         ath10k_htt_tx_destroy(&ar->htt);
3703         ath10k_wmi_free_host_mem(ar);
3704         ath10k_mac_destroy(ar);
3705 }
3706 EXPORT_SYMBOL(ath10k_core_destroy);
3707
3708 MODULE_AUTHOR("Qualcomm Atheros");
3709 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3710 MODULE_LICENSE("Dual BSD/GPL");