drivers/clk/uniphier/clk-uniphier-core.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (C) 2016 Socionext Inc.
   4  *   Author: Masahiro Yamada <[email protected]>
   5  */
   6
   7 #include <linux/clk-provider.h>
   8 #include <linux/init.h>
   9 #include <linux/mfd/syscon.h>
  10 #include <linux/of.h>
  11 #include <linux/of_device.h>
  12 #include <linux/platform_device.h>
  13
  14 #include "clk-uniphier.h"
  15
  16 static struct clk_hw *uniphier_clk_register(struct device *dev,
  17                                             struct regmap *regmap,
  18                                         const struct uniphier_clk_data *data)
  19 {
  20         switch (data->type) {
  21         case UNIPHIER_CLK_TYPE_CPUGEAR:
  22                 return uniphier_clk_register_cpugear(dev, regmap, data->name,
  23                                                      &data->data.cpugear);
  24         case UNIPHIER_CLK_TYPE_FIXED_FACTOR:
  25                 return uniphier_clk_register_fixed_factor(dev, data->name,
  26                                                           &data->data.factor);
  27         case UNIPHIER_CLK_TYPE_FIXED_RATE:
  28                 return uniphier_clk_register_fixed_rate(dev, data->name,
  29                                                         &data->data.rate);
  30         case UNIPHIER_CLK_TYPE_GATE:
  31                 return uniphier_clk_register_gate(dev, regmap, data->name,
  32                                                   &data->data.gate);
  33         case UNIPHIER_CLK_TYPE_MUX:
  34                 return uniphier_clk_register_mux(dev, regmap, data->name,
  35                                                  &data->data.mux);
  36         default:
  37                 dev_err(dev, "unsupported clock type\n");
  38                 return ERR_PTR(-EINVAL);
  39         }
  40 }
  41
  42 static int uniphier_clk_probe(struct platform_device *pdev)
  43 {
  44         struct device *dev = &pdev->dev;
  45         struct clk_hw_onecell_data *hw_data;
  46         const struct uniphier_clk_data *p, *data;
  47         struct regmap *regmap;
  48         struct device_node *parent;
  49         int clk_num = 0;
  50
  51         data = of_device_get_match_data(dev);
  52         if (WARN_ON(!data))
  53                 return -EINVAL;
  54
  55         parent = of_get_parent(dev->of_node); /* parent should be syscon node */
  56         regmap = syscon_node_to_regmap(parent);
  57         of_node_put(parent);
  58         if (IS_ERR(regmap)) {
  59                 dev_err(dev, "failed to get regmap (error %ld)\n",
  60                         PTR_ERR(regmap));
  61                 return PTR_ERR(regmap);
  62         }
  63
  64         for (p = data; p->name; p++)
  65                 clk_num = max(clk_num, p->idx + 1);
  66
  67         hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, clk_num),
  68                         GFP_KERNEL);
  69         if (!hw_data)
  70                 return -ENOMEM;
  71
  72         hw_data->num = clk_num;
  73
  74         /* avoid returning NULL for unused idx */
  75         while (--clk_num >= 0)
  76                 hw_data->hws[clk_num] = ERR_PTR(-EINVAL);
  77
  78         for (p = data; p->name; p++) {
  79                 struct clk_hw *hw;
  80
  81                 dev_dbg(dev, "register %s (index=%d)\n", p->name, p->idx);
  82                 hw = uniphier_clk_register(dev, regmap, p);
  83                 if (WARN(IS_ERR(hw), "failed to register %s", p->name))
  84                         continue;
  85
  86                 if (p->idx >= 0)
  87                         hw_data->hws[p->idx] = hw;
  88         }
  89
  90         return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
  91                                            hw_data);
  92 }
  93
  94 static const struct of_device_id uniphier_clk_match[] = {
  95         /* System clock */
  96         {
  97                 .compatible = "socionext,uniphier-ld4-clock",
  98                 .data = uniphier_ld4_sys_clk_data,
  99         },
 100         {
 101                 .compatible = "socionext,uniphier-pro4-clock",
 102                 .data = uniphier_pro4_sys_clk_data,
 103         },
 104         {
 105                 .compatible = "socionext,uniphier-sld8-clock",
 106                 .data = uniphier_sld8_sys_clk_data,
 107         },
 108         {
 109                 .compatible = "socionext,uniphier-pro5-clock",
 110                 .data = uniphier_pro5_sys_clk_data,
 111         },
 112         {
 113                 .compatible = "socionext,uniphier-pxs2-clock",
 114                 .data = uniphier_pxs2_sys_clk_data,
 115         },
 116         {
 117                 .compatible = "socionext,uniphier-ld11-clock",
 118                 .data = uniphier_ld11_sys_clk_data,
 119         },
 120         {
 121                 .compatible = "socionext,uniphier-ld20-clock",
 122                 .data = uniphier_ld20_sys_clk_data,
 123         },
 124         {
 125                 .compatible = "socionext,uniphier-pxs3-clock",
 126                 .data = uniphier_pxs3_sys_clk_data,
 127         },
 128         {
 129                 .compatible = "socionext,uniphier-nx1-clock",
 130                 .data = uniphier_nx1_sys_clk_data,
 131         },
 132         /* Media I/O clock, SD clock */
 133         {
 134                 .compatible = "socionext,uniphier-ld4-mio-clock",
 135                 .data = uniphier_ld4_mio_clk_data,
 136         },
 137         {
 138                 .compatible = "socionext,uniphier-pro4-mio-clock",
 139                 .data = uniphier_ld4_mio_clk_data,
 140         },
 141         {
 142                 .compatible = "socionext,uniphier-sld8-mio-clock",
 143                 .data = uniphier_ld4_mio_clk_data,
 144         },
 145         {
 146                 .compatible = "socionext,uniphier-pro5-sd-clock",
 147                 .data = uniphier_pro5_sd_clk_data,
 148         },
 149         {
 150                 .compatible = "socionext,uniphier-pxs2-sd-clock",
 151                 .data = uniphier_pro5_sd_clk_data,
 152         },
 153         {
 154                 .compatible = "socionext,uniphier-ld11-mio-clock",
 155                 .data = uniphier_ld4_mio_clk_data,
 156         },
 157         {
 158                 .compatible = "socionext,uniphier-ld20-sd-clock",
 159                 .data = uniphier_pro5_sd_clk_data,
 160         },
 161         {
 162                 .compatible = "socionext,uniphier-pxs3-sd-clock",
 163                 .data = uniphier_pro5_sd_clk_data,
 164         },
 165         {
 166                 .compatible = "socionext,uniphier-nx1-sd-clock",
 167                 .data = uniphier_pro5_sd_clk_data,
 168         },
 169         /* Peripheral clock */
 170         {
 171                 .compatible = "socionext,uniphier-ld4-peri-clock",
 172                 .data = uniphier_ld4_peri_clk_data,
 173         },
 174         {
 175                 .compatible = "socionext,uniphier-pro4-peri-clock",
 176                 .data = uniphier_pro4_peri_clk_data,
 177         },
 178         {
 179                 .compatible = "socionext,uniphier-sld8-peri-clock",
 180                 .data = uniphier_ld4_peri_clk_data,
 181         },
 182         {
 183                 .compatible = "socionext,uniphier-pro5-peri-clock",
 184                 .data = uniphier_pro4_peri_clk_data,
 185         },
 186         {
 187                 .compatible = "socionext,uniphier-pxs2-peri-clock",
 188                 .data = uniphier_pro4_peri_clk_data,
 189         },
 190         {
 191                 .compatible = "socionext,uniphier-ld11-peri-clock",
 192                 .data = uniphier_pro4_peri_clk_data,
 193         },
 194         {
 195                 .compatible = "socionext,uniphier-ld20-peri-clock",
 196                 .data = uniphier_pro4_peri_clk_data,
 197         },
 198         {
 199                 .compatible = "socionext,uniphier-pxs3-peri-clock",
 200                 .data = uniphier_pro4_peri_clk_data,
 201         },
 202         {
 203                 .compatible = "socionext,uniphier-nx1-peri-clock",
 204                 .data = uniphier_pro4_peri_clk_data,
 205         },
 206         /* SoC-glue clock */
 207         {
 208                 .compatible = "socionext,uniphier-pro4-sg-clock",
 209                 .data = uniphier_pro4_sg_clk_data,
 210         },
 211         { /* sentinel */ }
 212 };
 213
 214 static struct platform_driver uniphier_clk_driver = {
 215         .probe = uniphier_clk_probe,
 216         .driver = {
 217                 .name = "uniphier-clk",
 218                 .of_match_table = uniphier_clk_match,
 219         },
 220 };
 221 builtin_platform_driver(uniphier_clk_driver);