1 // SPDX-License-Identifier: GPL-2.0-only
3 /* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. */
4 /* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */
6 #include <linux/delay.h>
7 #include <linux/dma-mapping.h>
9 #include <linux/interrupt.h>
10 #include <linux/list.h>
11 #include <linux/kref.h>
12 #include <linux/mhi.h>
13 #include <linux/module.h>
14 #include <linux/msi.h>
15 #include <linux/mutex.h>
16 #include <linux/pci.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19 #include <linux/wait.h>
20 #include <drm/drm_accel.h>
21 #include <drm/drm_drv.h>
22 #include <drm/drm_file.h>
23 #include <drm/drm_gem.h>
24 #include <drm/drm_ioctl.h>
25 #include <uapi/drm/qaic_accel.h>
27 #include "mhi_controller.h"
30 MODULE_IMPORT_NS(DMA_BUF);
32 #define PCI_DEV_AIC100 0xa100
33 #define QAIC_NAME "qaic"
34 #define QAIC_DESC "Qualcomm Cloud AI Accelerators"
38 bool datapath_polling;
39 module_param(datapath_polling, bool, 0400);
40 MODULE_PARM_DESC(datapath_polling, "Operate the datapath in polling mode");
42 static DEFINE_IDA(qaic_usrs);
44 static int qaic_create_drm_device(struct qaic_device *qdev, s32 partition_id);
45 static void qaic_destroy_drm_device(struct qaic_device *qdev, s32 partition_id);
47 static void free_usr(struct kref *kref)
49 struct qaic_user *usr = container_of(kref, struct qaic_user, ref_count);
51 cleanup_srcu_struct(&usr->qddev_lock);
52 ida_free(&qaic_usrs, usr->handle);
56 static int qaic_open(struct drm_device *dev, struct drm_file *file)
58 struct qaic_drm_device *qddev = dev->dev_private;
59 struct qaic_device *qdev = qddev->qdev;
60 struct qaic_user *usr;
64 rcu_id = srcu_read_lock(&qdev->dev_lock);
70 usr = kmalloc(sizeof(*usr), GFP_KERNEL);
76 usr->handle = ida_alloc(&qaic_usrs, GFP_KERNEL);
77 if (usr->handle < 0) {
82 atomic_set(&usr->chunk_id, 0);
83 init_srcu_struct(&usr->qddev_lock);
84 kref_init(&usr->ref_count);
86 ret = mutex_lock_interruptible(&qddev->users_mutex);
90 list_add(&usr->node, &qddev->users);
91 mutex_unlock(&qddev->users_mutex);
93 file->driver_priv = usr;
95 srcu_read_unlock(&qdev->dev_lock, rcu_id);
99 cleanup_srcu_struct(&usr->qddev_lock);
103 srcu_read_unlock(&qdev->dev_lock, rcu_id);
107 static void qaic_postclose(struct drm_device *dev, struct drm_file *file)
109 struct qaic_user *usr = file->driver_priv;
110 struct qaic_drm_device *qddev;
111 struct qaic_device *qdev;
117 usr_rcu_id = srcu_read_lock(&usr->qddev_lock);
120 qdev_rcu_id = srcu_read_lock(&qdev->dev_lock);
121 if (!qdev->in_reset) {
122 qaic_release_usr(qdev, usr);
123 for (i = 0; i < qdev->num_dbc; ++i)
124 if (qdev->dbc[i].usr && qdev->dbc[i].usr->handle == usr->handle)
125 release_dbc(qdev, i);
127 srcu_read_unlock(&qdev->dev_lock, qdev_rcu_id);
129 mutex_lock(&qddev->users_mutex);
130 if (!list_empty(&usr->node))
131 list_del_init(&usr->node);
132 mutex_unlock(&qddev->users_mutex);
135 srcu_read_unlock(&usr->qddev_lock, usr_rcu_id);
136 kref_put(&usr->ref_count, free_usr);
138 file->driver_priv = NULL;
141 DEFINE_DRM_ACCEL_FOPS(qaic_accel_fops);
143 static const struct drm_ioctl_desc qaic_drm_ioctls[] = {
144 DRM_IOCTL_DEF_DRV(QAIC_MANAGE, qaic_manage_ioctl, 0),
145 DRM_IOCTL_DEF_DRV(QAIC_CREATE_BO, qaic_create_bo_ioctl, 0),
146 DRM_IOCTL_DEF_DRV(QAIC_MMAP_BO, qaic_mmap_bo_ioctl, 0),
147 DRM_IOCTL_DEF_DRV(QAIC_ATTACH_SLICE_BO, qaic_attach_slice_bo_ioctl, 0),
148 DRM_IOCTL_DEF_DRV(QAIC_EXECUTE_BO, qaic_execute_bo_ioctl, 0),
149 DRM_IOCTL_DEF_DRV(QAIC_PARTIAL_EXECUTE_BO, qaic_partial_execute_bo_ioctl, 0),
150 DRM_IOCTL_DEF_DRV(QAIC_WAIT_BO, qaic_wait_bo_ioctl, 0),
151 DRM_IOCTL_DEF_DRV(QAIC_PERF_STATS_BO, qaic_perf_stats_bo_ioctl, 0),
154 static const struct drm_driver qaic_accel_driver = {
155 .driver_features = DRIVER_GEM | DRIVER_COMPUTE_ACCEL,
161 .fops = &qaic_accel_fops,
163 .postclose = qaic_postclose,
165 .ioctls = qaic_drm_ioctls,
166 .num_ioctls = ARRAY_SIZE(qaic_drm_ioctls),
167 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
168 .gem_prime_import = qaic_gem_prime_import,
171 static int qaic_create_drm_device(struct qaic_device *qdev, s32 partition_id)
173 struct qaic_drm_device *qddev;
174 struct drm_device *ddev;
178 /* Hold off implementing partitions until the uapi is determined */
179 if (partition_id != QAIC_NO_PARTITION)
182 pdev = &qdev->pdev->dev;
184 qddev = kzalloc(sizeof(*qddev), GFP_KERNEL);
188 ddev = drm_dev_alloc(&qaic_accel_driver, pdev);
194 ddev->dev_private = qddev;
198 qddev->partition_id = partition_id;
199 INIT_LIST_HEAD(&qddev->users);
200 mutex_init(&qddev->users_mutex);
204 ret = drm_dev_register(ddev, 0);
206 pci_dbg(qdev->pdev, "%s: drm_dev_register failed %d\n", __func__, ret);
213 mutex_destroy(&qddev->users_mutex);
221 static void qaic_destroy_drm_device(struct qaic_device *qdev, s32 partition_id)
223 struct qaic_drm_device *qddev;
224 struct qaic_user *usr;
229 * Existing users get unresolvable errors till they close FDs.
230 * Need to sync carefully with users calling close(). The
231 * list of users can be modified elsewhere when the lock isn't
232 * held here, but the sync'ing the srcu with the mutex held
233 * could deadlock. Grab the mutex so that the list will be
234 * unmodified. The user we get will exist as long as the
235 * lock is held. Signal that the qcdev is going away, and
236 * grab a reference to the user so they don't go away for
237 * synchronize_srcu(). Then release the mutex to avoid
238 * deadlock and make sure the user has observed the signal.
239 * With the lock released, we cannot maintain any state of the
242 mutex_lock(&qddev->users_mutex);
243 while (!list_empty(&qddev->users)) {
244 usr = list_first_entry(&qddev->users, struct qaic_user, node);
245 list_del_init(&usr->node);
246 kref_get(&usr->ref_count);
248 mutex_unlock(&qddev->users_mutex);
249 synchronize_srcu(&usr->qddev_lock);
250 kref_put(&usr->ref_count, free_usr);
251 mutex_lock(&qddev->users_mutex);
253 mutex_unlock(&qddev->users_mutex);
256 drm_dev_unregister(qddev->ddev);
257 drm_dev_put(qddev->ddev);
263 static int qaic_mhi_probe(struct mhi_device *mhi_dev, const struct mhi_device_id *id)
265 struct qaic_device *qdev;
270 * Invoking this function indicates that the control channel to the
271 * device is available. We use that as a signal to indicate that
272 * the device side firmware has booted. The device side firmware
273 * manages the device resources, so we need to communicate with it
274 * via the control channel in order to utilize the device. Therefore
275 * we wait until this signal to create the drm dev that userspace will
276 * use to control the device, because without the device side firmware,
277 * userspace can't do anything useful.
280 qdev = pci_get_drvdata(to_pci_dev(mhi_dev->mhi_cntrl->cntrl_dev));
282 qdev->in_reset = false;
284 dev_set_drvdata(&mhi_dev->dev, qdev);
285 qdev->cntl_ch = mhi_dev;
287 ret = qaic_control_open(qdev);
289 pci_dbg(qdev->pdev, "%s: control_open failed %d\n", __func__, ret);
293 ret = get_cntl_version(qdev, NULL, &major, &minor);
294 if (ret || major != CNTL_MAJOR || minor > CNTL_MINOR) {
295 pci_err(qdev->pdev, "%s: Control protocol version (%d.%d) not supported. Supported version is (%d.%d). Ret: %d\n",
296 __func__, major, minor, CNTL_MAJOR, CNTL_MINOR, ret);
301 ret = qaic_create_drm_device(qdev, QAIC_NO_PARTITION);
306 qaic_control_close(qdev);
310 static void qaic_mhi_remove(struct mhi_device *mhi_dev)
312 /* This is redundant since we have already observed the device crash */
315 static void qaic_notify_reset(struct qaic_device *qdev)
319 qdev->in_reset = true;
320 /* wake up any waiters to avoid waiting for timeouts at sync */
322 for (i = 0; i < qdev->num_dbc; ++i)
324 synchronize_srcu(&qdev->dev_lock);
327 void qaic_dev_reset_clean_local_state(struct qaic_device *qdev, bool exit_reset)
331 qaic_notify_reset(qdev);
333 /* remove drmdevs to prevent new users from coming in */
334 qaic_destroy_drm_device(qdev, QAIC_NO_PARTITION);
336 /* start tearing things down */
337 for (i = 0; i < qdev->num_dbc; ++i)
338 release_dbc(qdev, i);
341 qdev->in_reset = false;
344 static struct qaic_device *create_qdev(struct pci_dev *pdev, const struct pci_device_id *id)
346 struct qaic_device *qdev;
349 qdev = devm_kzalloc(&pdev->dev, sizeof(*qdev), GFP_KERNEL);
353 if (id->device == PCI_DEV_AIC100) {
355 qdev->dbc = devm_kcalloc(&pdev->dev, qdev->num_dbc, sizeof(*qdev->dbc), GFP_KERNEL);
360 qdev->cntl_wq = alloc_workqueue("qaic_cntl", WQ_UNBOUND, 0);
364 pci_set_drvdata(pdev, qdev);
367 mutex_init(&qdev->cntl_mutex);
368 INIT_LIST_HEAD(&qdev->cntl_xfer_list);
369 init_srcu_struct(&qdev->dev_lock);
371 for (i = 0; i < qdev->num_dbc; ++i) {
372 spin_lock_init(&qdev->dbc[i].xfer_lock);
373 qdev->dbc[i].qdev = qdev;
375 INIT_LIST_HEAD(&qdev->dbc[i].xfer_list);
376 init_srcu_struct(&qdev->dbc[i].ch_lock);
377 init_waitqueue_head(&qdev->dbc[i].dbc_release);
378 INIT_LIST_HEAD(&qdev->dbc[i].bo_lists);
384 static void cleanup_qdev(struct qaic_device *qdev)
388 for (i = 0; i < qdev->num_dbc; ++i)
389 cleanup_srcu_struct(&qdev->dbc[i].ch_lock);
390 cleanup_srcu_struct(&qdev->dev_lock);
391 pci_set_drvdata(qdev->pdev, NULL);
392 destroy_workqueue(qdev->cntl_wq);
395 static int init_pci(struct qaic_device *qdev, struct pci_dev *pdev)
400 bars = pci_select_bars(pdev, IORESOURCE_MEM);
402 /* make sure the device has the expected BARs */
403 if (bars != (BIT(0) | BIT(2) | BIT(4))) {
404 pci_dbg(pdev, "%s: expected BARs 0, 2, and 4 not found in device. Found 0x%x\n",
409 ret = pcim_enable_device(pdev);
413 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
416 ret = dma_set_max_seg_size(&pdev->dev, UINT_MAX);
420 qdev->bar_0 = devm_ioremap_resource(&pdev->dev, &pdev->resource[0]);
421 if (IS_ERR(qdev->bar_0))
422 return PTR_ERR(qdev->bar_0);
424 qdev->bar_2 = devm_ioremap_resource(&pdev->dev, &pdev->resource[2]);
425 if (IS_ERR(qdev->bar_2))
426 return PTR_ERR(qdev->bar_2);
428 /* Managed release since we use pcim_enable_device above */
429 pci_set_master(pdev);
434 static int init_msi(struct qaic_device *qdev, struct pci_dev *pdev)
440 /* Managed release since we use pcim_enable_device */
441 ret = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
446 pci_err(pdev, "%s: Requested 32 MSIs. Obtained %d MSIs which is less than the 32 required.\n",
451 mhi_irq = pci_irq_vector(pdev, 0);
455 for (i = 0; i < qdev->num_dbc; ++i) {
456 ret = devm_request_threaded_irq(&pdev->dev, pci_irq_vector(pdev, i + 1),
457 dbc_irq_handler, dbc_irq_threaded_fn, IRQF_SHARED,
458 "qaic_dbc", &qdev->dbc[i]);
462 if (datapath_polling) {
463 qdev->dbc[i].irq = pci_irq_vector(pdev, i + 1);
464 disable_irq_nosync(qdev->dbc[i].irq);
465 INIT_WORK(&qdev->dbc[i].poll_work, irq_polling_work);
472 static int qaic_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
474 struct qaic_device *qdev;
479 qdev = create_qdev(pdev, id);
483 ret = init_pci(qdev, pdev);
487 for (i = 0; i < qdev->num_dbc; ++i)
488 qdev->dbc[i].dbc_base = qdev->bar_2 + QAIC_DBC_OFF(i);
490 mhi_irq = init_msi(qdev, pdev);
496 qdev->mhi_cntrl = qaic_mhi_register_controller(pdev, qdev->bar_0, mhi_irq);
497 if (IS_ERR(qdev->mhi_cntrl)) {
498 ret = PTR_ERR(qdev->mhi_cntrl);
509 static void qaic_pci_remove(struct pci_dev *pdev)
511 struct qaic_device *qdev = pci_get_drvdata(pdev);
516 qaic_dev_reset_clean_local_state(qdev, false);
517 qaic_mhi_free_controller(qdev->mhi_cntrl, link_up);
521 static void qaic_pci_shutdown(struct pci_dev *pdev)
523 /* see qaic_exit for what link_up is doing */
525 qaic_pci_remove(pdev);
528 static pci_ers_result_t qaic_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t error)
530 return PCI_ERS_RESULT_NEED_RESET;
533 static void qaic_pci_reset_prepare(struct pci_dev *pdev)
535 struct qaic_device *qdev = pci_get_drvdata(pdev);
537 qaic_notify_reset(qdev);
538 qaic_mhi_start_reset(qdev->mhi_cntrl);
539 qaic_dev_reset_clean_local_state(qdev, false);
542 static void qaic_pci_reset_done(struct pci_dev *pdev)
544 struct qaic_device *qdev = pci_get_drvdata(pdev);
546 qdev->in_reset = false;
547 qaic_mhi_reset_done(qdev->mhi_cntrl);
550 static const struct mhi_device_id qaic_mhi_match_table[] = {
551 { .chan = "QAIC_CONTROL", },
555 static struct mhi_driver qaic_mhi_driver = {
556 .id_table = qaic_mhi_match_table,
557 .remove = qaic_mhi_remove,
558 .probe = qaic_mhi_probe,
559 .ul_xfer_cb = qaic_mhi_ul_xfer_cb,
560 .dl_xfer_cb = qaic_mhi_dl_xfer_cb,
566 static const struct pci_device_id qaic_ids[] = {
567 { PCI_DEVICE(PCI_VENDOR_ID_QCOM, PCI_DEV_AIC100), },
570 MODULE_DEVICE_TABLE(pci, qaic_ids);
572 static const struct pci_error_handlers qaic_pci_err_handler = {
573 .error_detected = qaic_pci_error_detected,
574 .reset_prepare = qaic_pci_reset_prepare,
575 .reset_done = qaic_pci_reset_done,
578 static struct pci_driver qaic_pci_driver = {
580 .id_table = qaic_ids,
581 .probe = qaic_pci_probe,
582 .remove = qaic_pci_remove,
583 .shutdown = qaic_pci_shutdown,
584 .err_handler = &qaic_pci_err_handler,
587 static int __init qaic_init(void)
591 ret = mhi_driver_register(&qaic_mhi_driver);
593 pr_debug("qaic: mhi_driver_register failed %d\n", ret);
597 ret = pci_register_driver(&qaic_pci_driver);
599 pr_debug("qaic: pci_register_driver failed %d\n", ret);
606 mhi_driver_unregister(&qaic_mhi_driver);
610 static void __exit qaic_exit(void)
613 * We assume that qaic_pci_remove() is called due to a hotplug event
614 * which would mean that the link is down, and thus
615 * qaic_mhi_free_controller() should not try to access the device during
617 * We call pci_unregister_driver() below, which also triggers
618 * qaic_pci_remove(), but since this is module exit, we expect the link
619 * to the device to be up, in which case qaic_mhi_free_controller()
620 * should try to access the device during cleanup to put the device in
622 * For that reason, we set link_up here to let qaic_mhi_free_controller
623 * know the expected link state. Since the module is going to be
624 * removed at the end of this, we don't need to worry about
625 * reinitializing the link_up state after the cleanup is done.
628 pci_unregister_driver(&qaic_pci_driver);
629 mhi_driver_unregister(&qaic_mhi_driver);
632 module_init(qaic_init);
633 module_exit(qaic_exit);
635 MODULE_AUTHOR(QAIC_DESC " Kernel Driver Team");
636 MODULE_DESCRIPTION(QAIC_DESC " Accel Driver");
637 MODULE_LICENSE("GPL");