1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010 Google, Inc.
6 #ifndef __TEGRA_USB_PHY_H
7 #define __TEGRA_USB_PHY_H
10 #include <linux/regmap.h>
11 #include <linux/reset.h>
12 #include <linux/usb/otg.h>
17 * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers
18 * should be set up by clk-tegra, false if by the PHY code
19 * has_hostpc: true if the USB controller has the HOSTPC extension, which
20 * changes the location of the PHCD and PTS fields
21 * requires_usbmode_setup: true if the USBMODE register needs to be set to
23 * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
24 * and hsdiscon_level should be set for adequate signal quality
25 * requires_pmc_ao_power_up: true if USB AO is powered down by default
28 struct tegra_phy_soc_config {
29 bool utmi_pll_config_in_car_module;
31 bool requires_usbmode_setup;
32 bool requires_extra_tuning_parameters;
33 bool requires_pmc_ao_power_up;
36 struct tegra_utmip_config {
37 u8 hssync_start_delay;
41 bool xcvr_setup_use_fuses;
50 enum tegra_usb_phy_port_speed {
51 TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
52 TEGRA_USB_PHY_PORT_SPEED_LOW,
53 TEGRA_USB_PHY_PORT_SPEED_HIGH,
56 struct tegra_xtal_freq;
58 struct tegra_usb_phy {
61 const struct tegra_xtal_freq *freq;
63 void __iomem *pad_regs;
67 struct regulator *vbus;
68 struct regmap *pmc_regmap;
69 enum usb_dr_mode mode;
71 const struct tegra_phy_soc_config *soc_config;
76 struct gpio_desc *reset_gpio;
77 struct reset_control *pad_rst;
83 void tegra_usb_phy_preresume(struct usb_phy *phy);
85 void tegra_usb_phy_postresume(struct usb_phy *phy);
87 void tegra_ehci_phy_restore_start(struct usb_phy *phy,
88 enum tegra_usb_phy_port_speed port_speed);
90 void tegra_ehci_phy_restore_end(struct usb_phy *phy);
92 #endif /* __TEGRA_USB_PHY_H */