drivers/fpga/dfl.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Driver for FPGA Device Feature List (DFL) Support
   4  *
   5  * Copyright (C) 2017-2018 Intel Corporation, Inc.
   6  *
   7  * Authors:
   8  *   Kang Luwei <[email protected]>
   9  *   Zhang Yi <[email protected]>
  10  *   Wu Hao <[email protected]>
  11  *   Xiao Guangrong <[email protected]>
  12  */
  13 #include <linux/dfl.h>
  14 #include <linux/fpga-dfl.h>
  15 #include <linux/module.h>
  16 #include <linux/uaccess.h>
  17
  18 #include "dfl.h"
  19
  20 static DEFINE_MUTEX(dfl_id_mutex);
  21
  22 /*
  23  * when adding a new feature dev support in DFL framework, it's required to
  24  * add a new item in enum dfl_id_type and provide related information in below
  25  * dfl_devs table which is indexed by dfl_id_type, e.g. name string used for
  26  * platform device creation (define name strings in dfl.h, as they could be
  27  * reused by platform device drivers).
  28  *
  29  * if the new feature dev needs chardev support, then it's required to add
  30  * a new item in dfl_chardevs table and configure dfl_devs[i].devt_type as
  31  * index to dfl_chardevs table. If no chardev support just set devt_type
  32  * as one invalid index (DFL_FPGA_DEVT_MAX).
  33  */
  34 enum dfl_fpga_devt_type {
  35         DFL_FPGA_DEVT_FME,
  36         DFL_FPGA_DEVT_PORT,
  37         DFL_FPGA_DEVT_MAX,
  38 };
  39
  40 static struct lock_class_key dfl_pdata_keys[DFL_ID_MAX];
  41
  42 static const char *dfl_pdata_key_strings[DFL_ID_MAX] = {
  43         "dfl-fme-pdata",
  44         "dfl-port-pdata",
  45 };
  46
  47 /**
  48  * struct dfl_dev_info - dfl feature device information.
  49  * @name: name string of the feature platform device.
  50  * @dfh_id: id value in Device Feature Header (DFH) register by DFL spec.
  51  * @id: idr id of the feature dev.
  52  * @devt_type: index to dfl_chrdevs[].
  53  */
  54 struct dfl_dev_info {
  55         const char *name;
  56         u16 dfh_id;
  57         struct idr id;
  58         enum dfl_fpga_devt_type devt_type;
  59 };
  60
  61 /* it is indexed by dfl_id_type */
  62 static struct dfl_dev_info dfl_devs[] = {
  63         {.name = DFL_FPGA_FEATURE_DEV_FME, .dfh_id = DFH_ID_FIU_FME,
  64          .devt_type = DFL_FPGA_DEVT_FME},
  65         {.name = DFL_FPGA_FEATURE_DEV_PORT, .dfh_id = DFH_ID_FIU_PORT,
  66          .devt_type = DFL_FPGA_DEVT_PORT},
  67 };
  68
  69 /**
  70  * struct dfl_chardev_info - chardev information of dfl feature device
  71  * @name: nmae string of the char device.
  72  * @devt: devt of the char device.
  73  */
  74 struct dfl_chardev_info {
  75         const char *name;
  76         dev_t devt;
  77 };
  78
  79 /* indexed by enum dfl_fpga_devt_type */
  80 static struct dfl_chardev_info dfl_chrdevs[] = {
  81         {.name = DFL_FPGA_FEATURE_DEV_FME},
  82         {.name = DFL_FPGA_FEATURE_DEV_PORT},
  83 };
  84
  85 static void dfl_ids_init(void)
  86 {
  87         int i;
  88
  89         for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
  90                 idr_init(&dfl_devs[i].id);
  91 }
  92
  93 static void dfl_ids_destroy(void)
  94 {
  95         int i;
  96
  97         for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
  98                 idr_destroy(&dfl_devs[i].id);
  99 }
 100
 101 static int dfl_id_alloc(enum dfl_id_type type, struct device *dev)
 102 {
 103         int id;
 104
 105         WARN_ON(type >= DFL_ID_MAX);
 106         mutex_lock(&dfl_id_mutex);
 107         id = idr_alloc(&dfl_devs[type].id, dev, 0, 0, GFP_KERNEL);
 108         mutex_unlock(&dfl_id_mutex);
 109
 110         return id;
 111 }
 112
 113 static void dfl_id_free(enum dfl_id_type type, int id)
 114 {
 115         WARN_ON(type >= DFL_ID_MAX);
 116         mutex_lock(&dfl_id_mutex);
 117         idr_remove(&dfl_devs[type].id, id);
 118         mutex_unlock(&dfl_id_mutex);
 119 }
 120
 121 static enum dfl_id_type feature_dev_id_type(struct platform_device *pdev)
 122 {
 123         int i;
 124
 125         for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
 126                 if (!strcmp(dfl_devs[i].name, pdev->name))
 127                         return i;
 128
 129         return DFL_ID_MAX;
 130 }
 131
 132 static enum dfl_id_type dfh_id_to_type(u16 id)
 133 {
 134         int i;
 135
 136         for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)
 137                 if (dfl_devs[i].dfh_id == id)
 138                         return i;
 139
 140         return DFL_ID_MAX;
 141 }
 142
 143 /*
 144  * introduce a global port_ops list, it allows port drivers to register ops
 145  * in such list, then other feature devices (e.g. FME), could use the port
 146  * functions even related port platform device is hidden. Below is one example,
 147  * in virtualization case of PCIe-based FPGA DFL device, when SRIOV is
 148  * enabled, port (and it's AFU) is turned into VF and port platform device
 149  * is hidden from system but it's still required to access port to finish FPGA
 150  * reconfiguration function in FME.
 151  */
 152
 153 static DEFINE_MUTEX(dfl_port_ops_mutex);
 154 static LIST_HEAD(dfl_port_ops_list);
 155
 156 /**
 157  * dfl_fpga_port_ops_get - get matched port ops from the global list
 158  * @pdev: platform device to match with associated port ops.
 159  * Return: matched port ops on success, NULL otherwise.
 160  *
 161  * Please note that must dfl_fpga_port_ops_put after use the port_ops.
 162  */
 163 struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct platform_device *pdev)
 164 {
 165         struct dfl_fpga_port_ops *ops = NULL;
 166
 167         mutex_lock(&dfl_port_ops_mutex);
 168         if (list_empty(&dfl_port_ops_list))
 169                 goto done;
 170
 171         list_for_each_entry(ops, &dfl_port_ops_list, node) {
 172                 /* match port_ops using the name of platform device */
 173                 if (!strcmp(pdev->name, ops->name)) {
 174                         if (!try_module_get(ops->owner))
 175                                 ops = NULL;
 176                         goto done;
 177                 }
 178         }
 179
 180         ops = NULL;
 181 done:
 182         mutex_unlock(&dfl_port_ops_mutex);
 183         return ops;
 184 }
 185 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_get);
 186
 187 /**
 188  * dfl_fpga_port_ops_put - put port ops
 189  * @ops: port ops.
 190  */
 191 void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops *ops)
 192 {
 193         if (ops && ops->owner)
 194                 module_put(ops->owner);
 195 }
 196 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_put);
 197
 198 /**
 199  * dfl_fpga_port_ops_add - add port_ops to global list
 200  * @ops: port ops to add.
 201  */
 202 void dfl_fpga_port_ops_add(struct dfl_fpga_port_ops *ops)
 203 {
 204         mutex_lock(&dfl_port_ops_mutex);
 205         list_add_tail(&ops->node, &dfl_port_ops_list);
 206         mutex_unlock(&dfl_port_ops_mutex);
 207 }
 208 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_add);
 209
 210 /**
 211  * dfl_fpga_port_ops_del - remove port_ops from global list
 212  * @ops: port ops to del.
 213  */
 214 void dfl_fpga_port_ops_del(struct dfl_fpga_port_ops *ops)
 215 {
 216         mutex_lock(&dfl_port_ops_mutex);
 217         list_del(&ops->node);
 218         mutex_unlock(&dfl_port_ops_mutex);
 219 }
 220 EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_del);
 221
 222 /**
 223  * dfl_fpga_check_port_id - check the port id
 224  * @pdev: port platform device.
 225  * @pport_id: port id to compare.
 226  *
 227  * Return: 1 if port device matches with given port id, otherwise 0.
 228  */
 229 int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id)
 230 {
 231         struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
 232         struct dfl_fpga_port_ops *port_ops;
 233
 234         if (pdata->id != FEATURE_DEV_ID_UNUSED)
 235                 return pdata->id == *(int *)pport_id;
 236
 237         port_ops = dfl_fpga_port_ops_get(pdev);
 238         if (!port_ops || !port_ops->get_id)
 239                 return 0;
 240
 241         pdata->id = port_ops->get_id(pdev);
 242         dfl_fpga_port_ops_put(port_ops);
 243
 244         return pdata->id == *(int *)pport_id;
 245 }
 246 EXPORT_SYMBOL_GPL(dfl_fpga_check_port_id);
 247
 248 static DEFINE_IDA(dfl_device_ida);
 249
 250 static const struct dfl_device_id *
 251 dfl_match_one_device(const struct dfl_device_id *id, struct dfl_device *ddev)
 252 {
 253         if (id->type == ddev->type && id->feature_id == ddev->feature_id)
 254                 return id;
 255
 256         return NULL;
 257 }
 258
 259 static int dfl_bus_match(struct device *dev, struct device_driver *drv)
 260 {
 261         struct dfl_device *ddev = to_dfl_dev(dev);
 262         struct dfl_driver *ddrv = to_dfl_drv(drv);
 263         const struct dfl_device_id *id_entry;
 264
 265         id_entry = ddrv->id_table;
 266         if (id_entry) {
 267                 while (id_entry->feature_id) {
 268                         if (dfl_match_one_device(id_entry, ddev)) {
 269                                 ddev->id_entry = id_entry;
 270                                 return 1;
 271                         }
 272                         id_entry++;
 273                 }
 274         }
 275
 276         return 0;
 277 }
 278
 279 static int dfl_bus_probe(struct device *dev)
 280 {
 281         struct dfl_driver *ddrv = to_dfl_drv(dev->driver);
 282         struct dfl_device *ddev = to_dfl_dev(dev);
 283
 284         return ddrv->probe(ddev);
 285 }
 286
 287 static void dfl_bus_remove(struct device *dev)
 288 {
 289         struct dfl_driver *ddrv = to_dfl_drv(dev->driver);
 290         struct dfl_device *ddev = to_dfl_dev(dev);
 291
 292         if (ddrv->remove)
 293                 ddrv->remove(ddev);
 294 }
 295
 296 static int dfl_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
 297 {
 298         struct dfl_device *ddev = to_dfl_dev(dev);
 299
 300         return add_uevent_var(env, "MODALIAS=dfl:t%04Xf%04X",
 301                               ddev->type, ddev->feature_id);
 302 }
 303
 304 static ssize_t
 305 type_show(struct device *dev, struct device_attribute *attr, char *buf)
 306 {
 307         struct dfl_device *ddev = to_dfl_dev(dev);
 308
 309         return sprintf(buf, "0x%x\n", ddev->type);
 310 }
 311 static DEVICE_ATTR_RO(type);
 312
 313 static ssize_t
 314 feature_id_show(struct device *dev, struct device_attribute *attr, char *buf)
 315 {
 316         struct dfl_device *ddev = to_dfl_dev(dev);
 317
 318         return sprintf(buf, "0x%x\n", ddev->feature_id);
 319 }
 320 static DEVICE_ATTR_RO(feature_id);
 321
 322 static struct attribute *dfl_dev_attrs[] = {
 323         &dev_attr_type.attr,
 324         &dev_attr_feature_id.attr,
 325         NULL,
 326 };
 327 ATTRIBUTE_GROUPS(dfl_dev);
 328
 329 static struct bus_type dfl_bus_type = {
 330         .name           = "dfl",
 331         .match          = dfl_bus_match,
 332         .probe          = dfl_bus_probe,
 333         .remove         = dfl_bus_remove,
 334         .uevent         = dfl_bus_uevent,
 335         .dev_groups     = dfl_dev_groups,
 336 };
 337
 338 static void release_dfl_dev(struct device *dev)
 339 {
 340         struct dfl_device *ddev = to_dfl_dev(dev);
 341
 342         if (ddev->mmio_res.parent)
 343                 release_resource(&ddev->mmio_res);
 344
 345         ida_free(&dfl_device_ida, ddev->id);
 346         kfree(ddev->irqs);
 347         kfree(ddev);
 348 }
 349
 350 static struct dfl_device *
 351 dfl_dev_add(struct dfl_feature_platform_data *pdata,
 352             struct dfl_feature *feature)
 353 {
 354         struct platform_device *pdev = pdata->dev;
 355         struct resource *parent_res;
 356         struct dfl_device *ddev;
 357         int id, i, ret;
 358
 359         ddev = kzalloc(sizeof(*ddev), GFP_KERNEL);
 360         if (!ddev)
 361                 return ERR_PTR(-ENOMEM);
 362
 363         id = ida_alloc(&dfl_device_ida, GFP_KERNEL);
 364         if (id < 0) {
 365                 dev_err(&pdev->dev, "unable to get id\n");
 366                 kfree(ddev);
 367                 return ERR_PTR(id);
 368         }
 369
 370         /* freeing resources by put_device() after device_initialize() */
 371         device_initialize(&ddev->dev);
 372         ddev->dev.parent = &pdev->dev;
 373         ddev->dev.bus = &dfl_bus_type;
 374         ddev->dev.release = release_dfl_dev;
 375         ddev->id = id;
 376         ret = dev_set_name(&ddev->dev, "dfl_dev.%d", id);
 377         if (ret)
 378                 goto put_dev;
 379
 380         ddev->type = feature_dev_id_type(pdev);
 381         ddev->feature_id = feature->id;
 382         ddev->revision = feature->revision;
 383         ddev->cdev = pdata->dfl_cdev;
 384
 385         /* add mmio resource */
 386         parent_res = &pdev->resource[feature->resource_index];
 387         ddev->mmio_res.flags = IORESOURCE_MEM;
 388         ddev->mmio_res.start = parent_res->start;
 389         ddev->mmio_res.end = parent_res->end;
 390         ddev->mmio_res.name = dev_name(&ddev->dev);
 391         ret = insert_resource(parent_res, &ddev->mmio_res);
 392         if (ret) {
 393                 dev_err(&pdev->dev, "%s failed to claim resource: %pR\n",
 394                         dev_name(&ddev->dev), &ddev->mmio_res);
 395                 goto put_dev;
 396         }
 397
 398         /* then add irq resource */
 399         if (feature->nr_irqs) {
 400                 ddev->irqs = kcalloc(feature->nr_irqs,
 401                                      sizeof(*ddev->irqs), GFP_KERNEL);
 402                 if (!ddev->irqs) {
 403                         ret = -ENOMEM;
 404                         goto put_dev;
 405                 }
 406
 407                 for (i = 0; i < feature->nr_irqs; i++)
 408                         ddev->irqs[i] = feature->irq_ctx[i].irq;
 409
 410                 ddev->num_irqs = feature->nr_irqs;
 411         }
 412
 413         ret = device_add(&ddev->dev);
 414         if (ret)
 415                 goto put_dev;
 416
 417         dev_dbg(&pdev->dev, "add dfl_dev: %s\n", dev_name(&ddev->dev));
 418         return ddev;
 419
 420 put_dev:
 421         /* calls release_dfl_dev() which does the clean up  */
 422         put_device(&ddev->dev);
 423         return ERR_PTR(ret);
 424 }
 425
 426 static void dfl_devs_remove(struct dfl_feature_platform_data *pdata)
 427 {
 428         struct dfl_feature *feature;
 429
 430         dfl_fpga_dev_for_each_feature(pdata, feature) {
 431                 if (feature->ddev) {
 432                         device_unregister(&feature->ddev->dev);
 433                         feature->ddev = NULL;
 434                 }
 435         }
 436 }
 437
 438 static int dfl_devs_add(struct dfl_feature_platform_data *pdata)
 439 {
 440         struct dfl_feature *feature;
 441         struct dfl_device *ddev;
 442         int ret;
 443
 444         dfl_fpga_dev_for_each_feature(pdata, feature) {
 445                 if (feature->ioaddr)
 446                         continue;
 447
 448                 if (feature->ddev) {
 449                         ret = -EEXIST;
 450                         goto err;
 451                 }
 452
 453                 ddev = dfl_dev_add(pdata, feature);
 454                 if (IS_ERR(ddev)) {
 455                         ret = PTR_ERR(ddev);
 456                         goto err;
 457                 }
 458
 459                 feature->ddev = ddev;
 460         }
 461
 462         return 0;
 463
 464 err:
 465         dfl_devs_remove(pdata);
 466         return ret;
 467 }
 468
 469 int __dfl_driver_register(struct dfl_driver *dfl_drv, struct module *owner)
 470 {
 471         if (!dfl_drv || !dfl_drv->probe || !dfl_drv->id_table)
 472                 return -EINVAL;
 473
 474         dfl_drv->drv.owner = owner;
 475         dfl_drv->drv.bus = &dfl_bus_type;
 476
 477         return driver_register(&dfl_drv->drv);
 478 }
 479 EXPORT_SYMBOL(__dfl_driver_register);
 480
 481 void dfl_driver_unregister(struct dfl_driver *dfl_drv)
 482 {
 483         driver_unregister(&dfl_drv->drv);
 484 }
 485 EXPORT_SYMBOL(dfl_driver_unregister);
 486
 487 #define is_header_feature(feature) ((feature)->id == FEATURE_ID_FIU_HEADER)
 488
 489 /**
 490  * dfl_fpga_dev_feature_uinit - uinit for sub features of dfl feature device
 491  * @pdev: feature device.
 492  */
 493 void dfl_fpga_dev_feature_uinit(struct platform_device *pdev)
 494 {
 495         struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
 496         struct dfl_feature *feature;
 497
 498         dfl_devs_remove(pdata);
 499
 500         dfl_fpga_dev_for_each_feature(pdata, feature) {
 501                 if (feature->ops) {
 502                         if (feature->ops->uinit)
 503                                 feature->ops->uinit(pdev, feature);
 504                         feature->ops = NULL;
 505                 }
 506         }
 507 }
 508 EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_uinit);
 509
 510 static int dfl_feature_instance_init(struct platform_device *pdev,
 511                                      struct dfl_feature_platform_data *pdata,
 512                                      struct dfl_feature *feature,
 513                                      struct dfl_feature_driver *drv)
 514 {
 515         void __iomem *base;
 516         int ret = 0;
 517
 518         if (!is_header_feature(feature)) {
 519                 base = devm_platform_ioremap_resource(pdev,
 520                                                       feature->resource_index);
 521                 if (IS_ERR(base)) {
 522                         dev_err(&pdev->dev,
 523                                 "ioremap failed for feature 0x%x!\n",
 524                                 feature->id);
 525                         return PTR_ERR(base);
 526                 }
 527
 528                 feature->ioaddr = base;
 529         }
 530
 531         if (drv->ops->init) {
 532                 ret = drv->ops->init(pdev, feature);
 533                 if (ret)
 534                         return ret;
 535         }
 536
 537         feature->ops = drv->ops;
 538
 539         return ret;
 540 }
 541
 542 static bool dfl_feature_drv_match(struct dfl_feature *feature,
 543                                   struct dfl_feature_driver *driver)
 544 {
 545         const struct dfl_feature_id *ids = driver->id_table;
 546
 547         if (ids) {
 548                 while (ids->id) {
 549                         if (ids->id == feature->id)
 550                                 return true;
 551                         ids++;
 552                 }
 553         }
 554         return false;
 555 }
 556
 557 /**
 558  * dfl_fpga_dev_feature_init - init for sub features of dfl feature device
 559  * @pdev: feature device.
 560  * @feature_drvs: drvs for sub features.
 561  *
 562  * This function will match sub features with given feature drvs list and
 563  * use matched drv to init related sub feature.
 564  *
 565  * Return: 0 on success, negative error code otherwise.
 566  */
 567 int dfl_fpga_dev_feature_init(struct platform_device *pdev,
 568                               struct dfl_feature_driver *feature_drvs)
 569 {
 570         struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
 571         struct dfl_feature_driver *drv = feature_drvs;
 572         struct dfl_feature *feature;
 573         int ret;
 574
 575         while (drv->ops) {
 576                 dfl_fpga_dev_for_each_feature(pdata, feature) {
 577                         if (dfl_feature_drv_match(feature, drv)) {
 578                                 ret = dfl_feature_instance_init(pdev, pdata,
 579                                                                 feature, drv);
 580                                 if (ret)
 581                                         goto exit;
 582                         }
 583                 }
 584                 drv++;
 585         }
 586
 587         ret = dfl_devs_add(pdata);
 588         if (ret)
 589                 goto exit;
 590
 591         return 0;
 592 exit:
 593         dfl_fpga_dev_feature_uinit(pdev);
 594         return ret;
 595 }
 596 EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_init);
 597
 598 static void dfl_chardev_uinit(void)
 599 {
 600         int i;
 601
 602         for (i = 0; i < DFL_FPGA_DEVT_MAX; i++)
 603                 if (MAJOR(dfl_chrdevs[i].devt)) {
 604                         unregister_chrdev_region(dfl_chrdevs[i].devt,
 605                                                  MINORMASK + 1);
 606                         dfl_chrdevs[i].devt = MKDEV(0, 0);
 607                 }
 608 }
 609
 610 static int dfl_chardev_init(void)
 611 {
 612         int i, ret;
 613
 614         for (i = 0; i < DFL_FPGA_DEVT_MAX; i++) {
 615                 ret = alloc_chrdev_region(&dfl_chrdevs[i].devt, 0,
 616                                           MINORMASK + 1, dfl_chrdevs[i].name);
 617                 if (ret)
 618                         goto exit;
 619         }
 620
 621         return 0;
 622
 623 exit:
 624         dfl_chardev_uinit();
 625         return ret;
 626 }
 627
 628 static dev_t dfl_get_devt(enum dfl_fpga_devt_type type, int id)
 629 {
 630         if (type >= DFL_FPGA_DEVT_MAX)
 631                 return 0;
 632
 633         return MKDEV(MAJOR(dfl_chrdevs[type].devt), id);
 634 }
 635
 636 /**
 637  * dfl_fpga_dev_ops_register - register cdev ops for feature dev
 638  *
 639  * @pdev: feature dev.
 640  * @fops: file operations for feature dev's cdev.
 641  * @owner: owning module/driver.
 642  *
 643  * Return: 0 on success, negative error code otherwise.
 644  */
 645 int dfl_fpga_dev_ops_register(struct platform_device *pdev,
 646                               const struct file_operations *fops,
 647                               struct module *owner)
 648 {
 649         struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
 650
 651         cdev_init(&pdata->cdev, fops);
 652         pdata->cdev.owner = owner;
 653
 654         /*
 655          * set parent to the feature device so that its refcount is
 656          * decreased after the last refcount of cdev is gone, that
 657          * makes sure the feature device is valid during device
 658          * file's life-cycle.
 659          */
 660         pdata->cdev.kobj.parent = &pdev->dev.kobj;
 661
 662         return cdev_add(&pdata->cdev, pdev->dev.devt, 1);
 663 }
 664 EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_register);
 665
 666 /**
 667  * dfl_fpga_dev_ops_unregister - unregister cdev ops for feature dev
 668  * @pdev: feature dev.
 669  */
 670 void dfl_fpga_dev_ops_unregister(struct platform_device *pdev)
 671 {
 672         struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
 673
 674         cdev_del(&pdata->cdev);
 675 }
 676 EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister);
 677
 678 /**
 679  * struct build_feature_devs_info - info collected during feature dev build.
 680  *
 681  * @dev: device to enumerate.
 682  * @cdev: the container device for all feature devices.
 683  * @nr_irqs: number of irqs for all feature devices.
 684  * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
 685  *             this device.
 686  * @feature_dev: current feature device.
 687  * @ioaddr: header register region address of current FIU in enumeration.
 688  * @start: register resource start of current FIU.
 689  * @len: max register resource length of current FIU.
 690  * @sub_features: a sub features linked list for feature device in enumeration.
 691  * @feature_num: number of sub features for feature device in enumeration.
 692  */
 693 struct build_feature_devs_info {
 694         struct device *dev;
 695         struct dfl_fpga_cdev *cdev;
 696         unsigned int nr_irqs;
 697         int *irq_table;
 698
 699         struct platform_device *feature_dev;
 700         void __iomem *ioaddr;
 701         resource_size_t start;
 702         resource_size_t len;
 703         struct list_head sub_features;
 704         int feature_num;
 705 };
 706
 707 /**
 708  * struct dfl_feature_info - sub feature info collected during feature dev build
 709  *
 710  * @fid: id of this sub feature.
 711  * @revision: revision value of this sub feature.
 712  * @mmio_res: mmio resource of this sub feature.
 713  * @ioaddr: mapped base address of mmio resource.
 714  * @node: node in sub_features linked list.
 715  * @irq_base: start of irq index in this sub feature.
 716  * @nr_irqs: number of irqs of this sub feature.
 717  */
 718 struct dfl_feature_info {
 719         u16 fid;
 720         u8 revision;
 721         struct resource mmio_res;
 722         void __iomem *ioaddr;
 723         struct list_head node;
 724         unsigned int irq_base;
 725         unsigned int nr_irqs;
 726 };
 727
 728 static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,
 729                                        struct platform_device *port)
 730 {
 731         struct dfl_feature_platform_data *pdata = dev_get_platdata(&port->dev);
 732
 733         mutex_lock(&cdev->lock);
 734         list_add(&pdata->node, &cdev->port_dev_list);
 735         get_device(&pdata->dev->dev);
 736         mutex_unlock(&cdev->lock);
 737 }
 738
 739 /*
 740  * register current feature device, it is called when we need to switch to
 741  * another feature parsing or we have parsed all features on given device
 742  * feature list.
 743  */
 744 static int build_info_commit_dev(struct build_feature_devs_info *binfo)
 745 {
 746         struct platform_device *fdev = binfo->feature_dev;
 747         struct dfl_feature_platform_data *pdata;
 748         struct dfl_feature_info *finfo, *p;
 749         enum dfl_id_type type;
 750         int ret, index = 0, res_idx = 0;
 751
 752         type = feature_dev_id_type(fdev);
 753         if (WARN_ON_ONCE(type >= DFL_ID_MAX))
 754                 return -EINVAL;
 755
 756         /*
 757          * we do not need to care for the memory which is associated with
 758          * the platform device. After calling platform_device_unregister(),
 759          * it will be automatically freed by device's release() callback,
 760          * platform_device_release().
 761          */
 762         pdata = kzalloc(struct_size(pdata, features, binfo->feature_num), GFP_KERNEL);
 763         if (!pdata)
 764                 return -ENOMEM;
 765
 766         pdata->dev = fdev;
 767         pdata->num = binfo->feature_num;
 768         pdata->dfl_cdev = binfo->cdev;
 769         pdata->id = FEATURE_DEV_ID_UNUSED;
 770         mutex_init(&pdata->lock);
 771         lockdep_set_class_and_name(&pdata->lock, &dfl_pdata_keys[type],
 772                                    dfl_pdata_key_strings[type]);
 773
 774         /*
 775          * the count should be initialized to 0 to make sure
 776          *__fpga_port_enable() following __fpga_port_disable()
 777          * works properly for port device.
 778          * and it should always be 0 for fme device.
 779          */
 780         WARN_ON(pdata->disable_count);
 781
 782         fdev->dev.platform_data = pdata;
 783
 784         /* each sub feature has one MMIO resource */
 785         fdev->num_resources = binfo->feature_num;
 786         fdev->resource = kcalloc(binfo->feature_num, sizeof(*fdev->resource),
 787                                  GFP_KERNEL);
 788         if (!fdev->resource)
 789                 return -ENOMEM;
 790
 791         /* fill features and resource information for feature dev */
 792         list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
 793                 struct dfl_feature *feature = &pdata->features[index++];
 794                 struct dfl_feature_irq_ctx *ctx;
 795                 unsigned int i;
 796
 797                 /* save resource information for each feature */
 798                 feature->dev = fdev;
 799                 feature->id = finfo->fid;
 800                 feature->revision = finfo->revision;
 801
 802                 /*
 803                  * the FIU header feature has some fundamental functions (sriov
 804                  * set, port enable/disable) needed for the dfl bus device and
 805                  * other sub features. So its mmio resource should be mapped by
 806                  * DFL bus device. And we should not assign it to feature
 807                  * devices (dfl-fme/afu) again.
 808                  */
 809                 if (is_header_feature(feature)) {
 810                         feature->resource_index = -1;
 811                         feature->ioaddr =
 812                                 devm_ioremap_resource(binfo->dev,
 813                                                       &finfo->mmio_res);
 814                         if (IS_ERR(feature->ioaddr))
 815                                 return PTR_ERR(feature->ioaddr);
 816                 } else {
 817                         feature->resource_index = res_idx;
 818                         fdev->resource[res_idx++] = finfo->mmio_res;
 819                 }
 820
 821                 if (finfo->nr_irqs) {
 822                         ctx = devm_kcalloc(binfo->dev, finfo->nr_irqs,
 823                                            sizeof(*ctx), GFP_KERNEL);
 824                         if (!ctx)
 825                                 return -ENOMEM;
 826
 827                         for (i = 0; i < finfo->nr_irqs; i++)
 828                                 ctx[i].irq =
 829                                         binfo->irq_table[finfo->irq_base + i];
 830
 831                         feature->irq_ctx = ctx;
 832                         feature->nr_irqs = finfo->nr_irqs;
 833                 }
 834
 835                 list_del(&finfo->node);
 836                 kfree(finfo);
 837         }
 838
 839         ret = platform_device_add(binfo->feature_dev);
 840         if (!ret) {
 841                 if (type == PORT_ID)
 842                         dfl_fpga_cdev_add_port_dev(binfo->cdev,
 843                                                    binfo->feature_dev);
 844                 else
 845                         binfo->cdev->fme_dev =
 846                                         get_device(&binfo->feature_dev->dev);
 847                 /*
 848                  * reset it to avoid build_info_free() freeing their resource.
 849                  *
 850                  * The resource of successfully registered feature devices
 851                  * will be freed by platform_device_unregister(). See the
 852                  * comments in build_info_create_dev().
 853                  */
 854                 binfo->feature_dev = NULL;
 855         }
 856
 857         return ret;
 858 }
 859
 860 static int
 861 build_info_create_dev(struct build_feature_devs_info *binfo,
 862                       enum dfl_id_type type)
 863 {
 864         struct platform_device *fdev;
 865
 866         if (type >= DFL_ID_MAX)
 867                 return -EINVAL;
 868
 869         /*
 870          * we use -ENODEV as the initialization indicator which indicates
 871          * whether the id need to be reclaimed
 872          */
 873         fdev = platform_device_alloc(dfl_devs[type].name, -ENODEV);
 874         if (!fdev)
 875                 return -ENOMEM;
 876
 877         binfo->feature_dev = fdev;
 878         binfo->feature_num = 0;
 879
 880         INIT_LIST_HEAD(&binfo->sub_features);
 881
 882         fdev->id = dfl_id_alloc(type, &fdev->dev);
 883         if (fdev->id < 0)
 884                 return fdev->id;
 885
 886         fdev->dev.parent = &binfo->cdev->region->dev;
 887         fdev->dev.devt = dfl_get_devt(dfl_devs[type].devt_type, fdev->id);
 888
 889         return 0;
 890 }
 891
 892 static void build_info_free(struct build_feature_devs_info *binfo)
 893 {
 894         struct dfl_feature_info *finfo, *p;
 895
 896         /*
 897          * it is a valid id, free it. See comments in
 898          * build_info_create_dev()
 899          */
 900         if (binfo->feature_dev && binfo->feature_dev->id >= 0) {
 901                 dfl_id_free(feature_dev_id_type(binfo->feature_dev),
 902                             binfo->feature_dev->id);
 903
 904                 list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {
 905                         list_del(&finfo->node);
 906                         kfree(finfo);
 907                 }
 908         }
 909
 910         platform_device_put(binfo->feature_dev);
 911
 912         devm_kfree(binfo->dev, binfo);
 913 }
 914
 915 static inline u32 feature_size(u64 value)
 916 {
 917         u32 ofst = FIELD_GET(DFH_NEXT_HDR_OFST, value);
 918         /* workaround for private features with invalid size, use 4K instead */
 919         return ofst ? ofst : 4096;
 920 }
 921
 922 static u16 feature_id(u64 value)
 923 {
 924         u16 id = FIELD_GET(DFH_ID, value);
 925         u8 type = FIELD_GET(DFH_TYPE, value);
 926
 927         if (type == DFH_TYPE_FIU)
 928                 return FEATURE_ID_FIU_HEADER;
 929         else if (type == DFH_TYPE_PRIVATE)
 930                 return id;
 931         else if (type == DFH_TYPE_AFU)
 932                 return FEATURE_ID_AFU;
 933
 934         WARN_ON(1);
 935         return 0;
 936 }
 937
 938 static int parse_feature_irqs(struct build_feature_devs_info *binfo,
 939                               resource_size_t ofst, u16 fid,
 940                               unsigned int *irq_base, unsigned int *nr_irqs)
 941 {
 942         void __iomem *base = binfo->ioaddr + ofst;
 943         unsigned int i, ibase, inr = 0;
 944         enum dfl_id_type type;
 945         int virq;
 946         u64 v;
 947
 948         type = feature_dev_id_type(binfo->feature_dev);
 949
 950         /*
 951          * Ideally DFL framework should only read info from DFL header, but
 952          * current version DFL only provides mmio resources information for
 953          * each feature in DFL Header, no field for interrupt resources.
 954          * Interrupt resource information is provided by specific mmio
 955          * registers of each private feature which supports interrupt. So in
 956          * order to parse and assign irq resources, DFL framework has to look
 957          * into specific capability registers of these private features.
 958          *
 959          * Once future DFL version supports generic interrupt resource
 960          * information in common DFL headers, the generic interrupt parsing
 961          * code will be added. But in order to be compatible to old version
 962          * DFL, the driver may still fall back to these quirks.
 963          */
 964         if (type == PORT_ID) {
 965                 switch (fid) {
 966                 case PORT_FEATURE_ID_UINT:
 967                         v = readq(base + PORT_UINT_CAP);
 968                         ibase = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
 969                         inr = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
 970                         break;
 971                 case PORT_FEATURE_ID_ERROR:
 972                         v = readq(base + PORT_ERROR_CAP);
 973                         ibase = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
 974                         inr = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
 975                         break;
 976                 }
 977         } else if (type == FME_ID) {
 978                 if (fid == FME_FEATURE_ID_GLOBAL_ERR) {
 979                         v = readq(base + FME_ERROR_CAP);
 980                         ibase = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
 981                         inr = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
 982                 }
 983         }
 984
 985         if (!inr) {
 986                 *irq_base = 0;
 987                 *nr_irqs = 0;
 988                 return 0;
 989         }
 990
 991         dev_dbg(binfo->dev, "feature: 0x%x, irq_base: %u, nr_irqs: %u\n",
 992                 fid, ibase, inr);
 993
 994         if (ibase + inr > binfo->nr_irqs) {
 995                 dev_err(binfo->dev,
 996                         "Invalid interrupt number in feature 0x%x\n", fid);
 997                 return -EINVAL;
 998         }
 999
1000         for (i = 0; i < inr; i++) {
1001                 virq = binfo->irq_table[ibase + i];
1002                 if (virq < 0 || virq > NR_IRQS) {
1003                         dev_err(binfo->dev,
1004                                 "Invalid irq table entry for feature 0x%x\n",
1005                                 fid);
1006                         return -EINVAL;
1007                 }
1008         }
1009
1010         *irq_base = ibase;
1011         *nr_irqs = inr;
1012
1013         return 0;
1014 }
1015
1016 /*
1017  * when create sub feature instances, for private features, it doesn't need
1018  * to provide resource size and feature id as they could be read from DFH
1019  * register. For afu sub feature, its register region only contains user
1020  * defined registers, so never trust any information from it, just use the
1021  * resource size information provided by its parent FIU.
1022  */
1023 static int
1024 create_feature_instance(struct build_feature_devs_info *binfo,
1025                         resource_size_t ofst, resource_size_t size, u16 fid)
1026 {
1027         unsigned int irq_base, nr_irqs;
1028         struct dfl_feature_info *finfo;
1029         u8 revision = 0;
1030         int ret;
1031         u64 v;
1032
1033         if (fid != FEATURE_ID_AFU) {
1034                 v = readq(binfo->ioaddr + ofst);
1035                 revision = FIELD_GET(DFH_REVISION, v);
1036
1037                 /* read feature size and id if inputs are invalid */
1038                 size = size ? size : feature_size(v);
1039                 fid = fid ? fid : feature_id(v);
1040         }
1041
1042         if (binfo->len - ofst < size)
1043                 return -EINVAL;
1044
1045         ret = parse_feature_irqs(binfo, ofst, fid, &irq_base, &nr_irqs);
1046         if (ret)
1047                 return ret;
1048
1049         finfo = kzalloc(sizeof(*finfo), GFP_KERNEL);
1050         if (!finfo)
1051                 return -ENOMEM;
1052
1053         finfo->fid = fid;
1054         finfo->revision = revision;
1055         finfo->mmio_res.start = binfo->start + ofst;
1056         finfo->mmio_res.end = finfo->mmio_res.start + size - 1;
1057         finfo->mmio_res.flags = IORESOURCE_MEM;
1058         finfo->irq_base = irq_base;
1059         finfo->nr_irqs = nr_irqs;
1060
1061         list_add_tail(&finfo->node, &binfo->sub_features);
1062         binfo->feature_num++;
1063
1064         return 0;
1065 }
1066
1067 static int parse_feature_port_afu(struct build_feature_devs_info *binfo,
1068                                   resource_size_t ofst)
1069 {
1070         u64 v = readq(binfo->ioaddr + PORT_HDR_CAP);
1071         u32 size = FIELD_GET(PORT_CAP_MMIO_SIZE, v) << 10;
1072
1073         WARN_ON(!size);
1074
1075         return create_feature_instance(binfo, ofst, size, FEATURE_ID_AFU);
1076 }
1077
1078 #define is_feature_dev_detected(binfo) (!!(binfo)->feature_dev)
1079
1080 static int parse_feature_afu(struct build_feature_devs_info *binfo,
1081                              resource_size_t ofst)
1082 {
1083         if (!is_feature_dev_detected(binfo)) {
1084                 dev_err(binfo->dev, "this AFU does not belong to any FIU.\n");
1085                 return -EINVAL;
1086         }
1087
1088         switch (feature_dev_id_type(binfo->feature_dev)) {
1089         case PORT_ID:
1090                 return parse_feature_port_afu(binfo, ofst);
1091         default:
1092                 dev_info(binfo->dev, "AFU belonging to FIU %s is not supported yet.\n",
1093                          binfo->feature_dev->name);
1094         }
1095
1096         return 0;
1097 }
1098
1099 static int build_info_prepare(struct build_feature_devs_info *binfo,
1100                               resource_size_t start, resource_size_t len)
1101 {
1102         struct device *dev = binfo->dev;
1103         void __iomem *ioaddr;
1104
1105         if (!devm_request_mem_region(dev, start, len, dev_name(dev))) {
1106                 dev_err(dev, "request region fail, start:%pa, len:%pa\n",
1107                         &start, &len);
1108                 return -EBUSY;
1109         }
1110
1111         ioaddr = devm_ioremap(dev, start, len);
1112         if (!ioaddr) {
1113                 dev_err(dev, "ioremap region fail, start:%pa, len:%pa\n",
1114                         &start, &len);
1115                 return -ENOMEM;
1116         }
1117
1118         binfo->start = start;
1119         binfo->len = len;
1120         binfo->ioaddr = ioaddr;
1121
1122         return 0;
1123 }
1124
1125 static void build_info_complete(struct build_feature_devs_info *binfo)
1126 {
1127         devm_iounmap(binfo->dev, binfo->ioaddr);
1128         devm_release_mem_region(binfo->dev, binfo->start, binfo->len);
1129 }
1130
1131 static int parse_feature_fiu(struct build_feature_devs_info *binfo,
1132                              resource_size_t ofst)
1133 {
1134         int ret = 0;
1135         u32 offset;
1136         u16 id;
1137         u64 v;
1138
1139         if (is_feature_dev_detected(binfo)) {
1140                 build_info_complete(binfo);
1141
1142                 ret = build_info_commit_dev(binfo);
1143                 if (ret)
1144                         return ret;
1145
1146                 ret = build_info_prepare(binfo, binfo->start + ofst,
1147                                          binfo->len - ofst);
1148                 if (ret)
1149                         return ret;
1150         }
1151
1152         v = readq(binfo->ioaddr + DFH);
1153         id = FIELD_GET(DFH_ID, v);
1154
1155         /* create platform device for dfl feature dev */
1156         ret = build_info_create_dev(binfo, dfh_id_to_type(id));
1157         if (ret)
1158                 return ret;
1159
1160         ret = create_feature_instance(binfo, 0, 0, 0);
1161         if (ret)
1162                 return ret;
1163         /*
1164          * find and parse FIU's child AFU via its NEXT_AFU register.
1165          * please note that only Port has valid NEXT_AFU pointer per spec.
1166          */
1167         v = readq(binfo->ioaddr + NEXT_AFU);
1168
1169         offset = FIELD_GET(NEXT_AFU_NEXT_DFH_OFST, v);
1170         if (offset)
1171                 return parse_feature_afu(binfo, offset);
1172
1173         dev_dbg(binfo->dev, "No AFUs detected on FIU %d\n", id);
1174
1175         return ret;
1176 }
1177
1178 static int parse_feature_private(struct build_feature_devs_info *binfo,
1179                                  resource_size_t ofst)
1180 {
1181         if (!is_feature_dev_detected(binfo)) {
1182                 dev_err(binfo->dev, "the private feature 0x%x does not belong to any AFU.\n",
1183                         feature_id(readq(binfo->ioaddr + ofst)));
1184                 return -EINVAL;
1185         }
1186
1187         return create_feature_instance(binfo, ofst, 0, 0);
1188 }
1189
1190 /**
1191  * parse_feature - parse a feature on given device feature list
1192  *
1193  * @binfo: build feature devices information.
1194  * @ofst: offset to current FIU header
1195  */
1196 static int parse_feature(struct build_feature_devs_info *binfo,
1197                          resource_size_t ofst)
1198 {
1199         u64 v;
1200         u32 type;
1201
1202         v = readq(binfo->ioaddr + ofst + DFH);
1203         type = FIELD_GET(DFH_TYPE, v);
1204
1205         switch (type) {
1206         case DFH_TYPE_AFU:
1207                 return parse_feature_afu(binfo, ofst);
1208         case DFH_TYPE_PRIVATE:
1209                 return parse_feature_private(binfo, ofst);
1210         case DFH_TYPE_FIU:
1211                 return parse_feature_fiu(binfo, ofst);
1212         default:
1213                 dev_info(binfo->dev,
1214                          "Feature Type %x is not supported.\n", type);
1215         }
1216
1217         return 0;
1218 }
1219
1220 static int parse_feature_list(struct build_feature_devs_info *binfo,
1221                               resource_size_t start, resource_size_t len)
1222 {
1223         resource_size_t end = start + len;
1224         int ret = 0;
1225         u32 ofst = 0;
1226         u64 v;
1227
1228         ret = build_info_prepare(binfo, start, len);
1229         if (ret)
1230                 return ret;
1231
1232         /* walk through the device feature list via DFH's next DFH pointer. */
1233         for (; start < end; start += ofst) {
1234                 if (end - start < DFH_SIZE) {
1235                         dev_err(binfo->dev, "The region is too small to contain a feature.\n");
1236                         return -EINVAL;
1237                 }
1238
1239                 ret = parse_feature(binfo, start - binfo->start);
1240                 if (ret)
1241                         return ret;
1242
1243                 v = readq(binfo->ioaddr + start - binfo->start + DFH);
1244                 ofst = FIELD_GET(DFH_NEXT_HDR_OFST, v);
1245
1246                 /* stop parsing if EOL(End of List) is set or offset is 0 */
1247                 if ((v & DFH_EOL) || !ofst)
1248                         break;
1249         }
1250
1251         /* commit current feature device when reach the end of list */
1252         build_info_complete(binfo);
1253
1254         if (is_feature_dev_detected(binfo))
1255                 ret = build_info_commit_dev(binfo);
1256
1257         return ret;
1258 }
1259
1260 struct dfl_fpga_enum_info *dfl_fpga_enum_info_alloc(struct device *dev)
1261 {
1262         struct dfl_fpga_enum_info *info;
1263
1264         get_device(dev);
1265
1266         info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
1267         if (!info) {
1268                 put_device(dev);
1269                 return NULL;
1270         }
1271
1272         info->dev = dev;
1273         INIT_LIST_HEAD(&info->dfls);
1274
1275         return info;
1276 }
1277 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_alloc);
1278
1279 void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info)
1280 {
1281         struct dfl_fpga_enum_dfl *tmp, *dfl;
1282         struct device *dev;
1283
1284         if (!info)
1285                 return;
1286
1287         dev = info->dev;
1288
1289         /* remove all device feature lists in the list. */
1290         list_for_each_entry_safe(dfl, tmp, &info->dfls, node) {
1291                 list_del(&dfl->node);
1292                 devm_kfree(dev, dfl);
1293         }
1294
1295         /* remove irq table */
1296         if (info->irq_table)
1297                 devm_kfree(dev, info->irq_table);
1298
1299         devm_kfree(dev, info);
1300         put_device(dev);
1301 }
1302 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_free);
1303
1304 /**
1305  * dfl_fpga_enum_info_add_dfl - add info of a device feature list to enum info
1306  *
1307  * @info: ptr to dfl_fpga_enum_info
1308  * @start: mmio resource address of the device feature list.
1309  * @len: mmio resource length of the device feature list.
1310  *
1311  * One FPGA device may have one or more Device Feature Lists (DFLs), use this
1312  * function to add information of each DFL to common data structure for next
1313  * step enumeration.
1314  *
1315  * Return: 0 on success, negative error code otherwise.
1316  */
1317 int dfl_fpga_enum_info_add_dfl(struct dfl_fpga_enum_info *info,
1318                                resource_size_t start, resource_size_t len)
1319 {
1320         struct dfl_fpga_enum_dfl *dfl;
1321
1322         dfl = devm_kzalloc(info->dev, sizeof(*dfl), GFP_KERNEL);
1323         if (!dfl)
1324                 return -ENOMEM;
1325
1326         dfl->start = start;
1327         dfl->len = len;
1328
1329         list_add_tail(&dfl->node, &info->dfls);
1330
1331         return 0;
1332 }
1333 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_dfl);
1334
1335 /**
1336  * dfl_fpga_enum_info_add_irq - add irq table to enum info
1337  *
1338  * @info: ptr to dfl_fpga_enum_info
1339  * @nr_irqs: number of irqs of the DFL fpga device to be enumerated.
1340  * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index of
1341  *             this device.
1342  *
1343  * One FPGA device may have several interrupts. This function adds irq
1344  * information of the DFL fpga device to enum info for next step enumeration.
1345  * This function should be called before dfl_fpga_feature_devs_enumerate().
1346  * As we only support one irq domain for all DFLs in the same enum info, adding
1347  * irq table a second time for the same enum info will return error.
1348  *
1349  * If we need to enumerate DFLs which belong to different irq domains, we
1350  * should fill more enum info and enumerate them one by one.
1351  *
1352  * Return: 0 on success, negative error code otherwise.
1353  */
1354 int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
1355                                unsigned int nr_irqs, int *irq_table)
1356 {
1357         if (!nr_irqs || !irq_table)
1358                 return -EINVAL;
1359
1360         if (info->irq_table)
1361                 return -EEXIST;
1362
1363         info->irq_table = devm_kmemdup(info->dev, irq_table,
1364                                        sizeof(int) * nr_irqs, GFP_KERNEL);
1365         if (!info->irq_table)
1366                 return -ENOMEM;
1367
1368         info->nr_irqs = nr_irqs;
1369
1370         return 0;
1371 }
1372 EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq);
1373
1374 static int remove_feature_dev(struct device *dev, void *data)
1375 {
1376         struct platform_device *pdev = to_platform_device(dev);
1377         enum dfl_id_type type = feature_dev_id_type(pdev);
1378         int id = pdev->id;
1379
1380         platform_device_unregister(pdev);
1381
1382         dfl_id_free(type, id);
1383
1384         return 0;
1385 }
1386
1387 static void remove_feature_devs(struct dfl_fpga_cdev *cdev)
1388 {
1389         device_for_each_child(&cdev->region->dev, NULL, remove_feature_dev);
1390 }
1391
1392 /**
1393  * dfl_fpga_feature_devs_enumerate - enumerate feature devices
1394  * @info: information for enumeration.
1395  *
1396  * This function creates a container device (base FPGA region), enumerates
1397  * feature devices based on the enumeration info and creates platform devices
1398  * under the container device.
1399  *
1400  * Return: dfl_fpga_cdev struct on success, -errno on failure
1401  */
1402 struct dfl_fpga_cdev *
1403 dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info)
1404 {
1405         struct build_feature_devs_info *binfo;
1406         struct dfl_fpga_enum_dfl *dfl;
1407         struct dfl_fpga_cdev *cdev;
1408         int ret = 0;
1409
1410         if (!info->dev)
1411                 return ERR_PTR(-ENODEV);
1412
1413         cdev = devm_kzalloc(info->dev, sizeof(*cdev), GFP_KERNEL);
1414         if (!cdev)
1415                 return ERR_PTR(-ENOMEM);
1416
1417         cdev->parent = info->dev;
1418         mutex_init(&cdev->lock);
1419         INIT_LIST_HEAD(&cdev->port_dev_list);
1420
1421         cdev->region = fpga_region_register(info->dev, NULL, NULL);
1422         if (IS_ERR(cdev->region)) {
1423                 ret = PTR_ERR(cdev->region);
1424                 goto free_cdev_exit;
1425         }
1426
1427         /* create and init build info for enumeration */
1428         binfo = devm_kzalloc(info->dev, sizeof(*binfo), GFP_KERNEL);
1429         if (!binfo) {
1430                 ret = -ENOMEM;
1431                 goto unregister_region_exit;
1432         }
1433
1434         binfo->dev = info->dev;
1435         binfo->cdev = cdev;
1436
1437         binfo->nr_irqs = info->nr_irqs;
1438         if (info->nr_irqs)
1439                 binfo->irq_table = info->irq_table;
1440
1441         /*
1442          * start enumeration for all feature devices based on Device Feature
1443          * Lists.
1444          */
1445         list_for_each_entry(dfl, &info->dfls, node) {
1446                 ret = parse_feature_list(binfo, dfl->start, dfl->len);
1447                 if (ret) {
1448                         remove_feature_devs(cdev);
1449                         build_info_free(binfo);
1450                         goto unregister_region_exit;
1451                 }
1452         }
1453
1454         build_info_free(binfo);
1455
1456         return cdev;
1457
1458 unregister_region_exit:
1459         fpga_region_unregister(cdev->region);
1460 free_cdev_exit:
1461         devm_kfree(info->dev, cdev);
1462         return ERR_PTR(ret);
1463 }
1464 EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_enumerate);
1465
1466 /**
1467  * dfl_fpga_feature_devs_remove - remove all feature devices
1468  * @cdev: fpga container device.
1469  *
1470  * Remove the container device and all feature devices under given container
1471  * devices.
1472  */
1473 void dfl_fpga_feature_devs_remove(struct dfl_fpga_cdev *cdev)
1474 {
1475         struct dfl_feature_platform_data *pdata, *ptmp;
1476
1477         mutex_lock(&cdev->lock);
1478         if (cdev->fme_dev)
1479                 put_device(cdev->fme_dev);
1480
1481         list_for_each_entry_safe(pdata, ptmp, &cdev->port_dev_list, node) {
1482                 struct platform_device *port_dev = pdata->dev;
1483
1484                 /* remove released ports */
1485                 if (!device_is_registered(&port_dev->dev)) {
1486                         dfl_id_free(feature_dev_id_type(port_dev),
1487                                     port_dev->id);
1488                         platform_device_put(port_dev);
1489                 }
1490
1491                 list_del(&pdata->node);
1492                 put_device(&port_dev->dev);
1493         }
1494         mutex_unlock(&cdev->lock);
1495
1496         remove_feature_devs(cdev);
1497
1498         fpga_region_unregister(cdev->region);
1499         devm_kfree(cdev->parent, cdev);
1500 }
1501 EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_remove);
1502
1503 /**
1504  * __dfl_fpga_cdev_find_port - find a port under given container device
1505  *
1506  * @cdev: container device
1507  * @data: data passed to match function
1508  * @match: match function used to find specific port from the port device list
1509  *
1510  * Find a port device under container device. This function needs to be
1511  * invoked with lock held.
1512  *
1513  * Return: pointer to port's platform device if successful, NULL otherwise.
1514  *
1515  * NOTE: you will need to drop the device reference with put_device() after use.
1516  */
1517 struct platform_device *
1518 __dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data,
1519                           int (*match)(struct platform_device *, void *))
1520 {
1521         struct dfl_feature_platform_data *pdata;
1522         struct platform_device *port_dev;
1523
1524         list_for_each_entry(pdata, &cdev->port_dev_list, node) {
1525                 port_dev = pdata->dev;
1526
1527                 if (match(port_dev, data) && get_device(&port_dev->dev))
1528                         return port_dev;
1529         }
1530
1531         return NULL;
1532 }
1533 EXPORT_SYMBOL_GPL(__dfl_fpga_cdev_find_port);
1534
1535 static int __init dfl_fpga_init(void)
1536 {
1537         int ret;
1538
1539         ret = bus_register(&dfl_bus_type);
1540         if (ret)
1541                 return ret;
1542
1543         dfl_ids_init();
1544
1545         ret = dfl_chardev_init();
1546         if (ret) {
1547                 dfl_ids_destroy();
1548                 bus_unregister(&dfl_bus_type);
1549         }
1550
1551         return ret;
1552 }
1553
1554 /**
1555  * dfl_fpga_cdev_release_port - release a port platform device
1556  *
1557  * @cdev: parent container device.
1558  * @port_id: id of the port platform device.
1559  *
1560  * This function allows user to release a port platform device. This is a
1561  * mandatory step before turn a port from PF into VF for SRIOV support.
1562  *
1563  * Return: 0 on success, negative error code otherwise.
1564  */
1565 int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id)
1566 {
1567         struct dfl_feature_platform_data *pdata;
1568         struct platform_device *port_pdev;
1569         int ret = -ENODEV;
1570
1571         mutex_lock(&cdev->lock);
1572         port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id,
1573                                               dfl_fpga_check_port_id);
1574         if (!port_pdev)
1575                 goto unlock_exit;
1576
1577         if (!device_is_registered(&port_pdev->dev)) {
1578                 ret = -EBUSY;
1579                 goto put_dev_exit;
1580         }
1581
1582         pdata = dev_get_platdata(&port_pdev->dev);
1583
1584         mutex_lock(&pdata->lock);
1585         ret = dfl_feature_dev_use_begin(pdata, true);
1586         mutex_unlock(&pdata->lock);
1587         if (ret)
1588                 goto put_dev_exit;
1589
1590         platform_device_del(port_pdev);
1591         cdev->released_port_num++;
1592 put_dev_exit:
1593         put_device(&port_pdev->dev);
1594 unlock_exit:
1595         mutex_unlock(&cdev->lock);
1596         return ret;
1597 }
1598 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_release_port);
1599
1600 /**
1601  * dfl_fpga_cdev_assign_port - assign a port platform device back
1602  *
1603  * @cdev: parent container device.
1604  * @port_id: id of the port platform device.
1605  *
1606  * This function allows user to assign a port platform device back. This is
1607  * a mandatory step after disable SRIOV support.
1608  *
1609  * Return: 0 on success, negative error code otherwise.
1610  */
1611 int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id)
1612 {
1613         struct dfl_feature_platform_data *pdata;
1614         struct platform_device *port_pdev;
1615         int ret = -ENODEV;
1616
1617         mutex_lock(&cdev->lock);
1618         port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id,
1619                                               dfl_fpga_check_port_id);
1620         if (!port_pdev)
1621                 goto unlock_exit;
1622
1623         if (device_is_registered(&port_pdev->dev)) {
1624                 ret = -EBUSY;
1625                 goto put_dev_exit;
1626         }
1627
1628         ret = platform_device_add(port_pdev);
1629         if (ret)
1630                 goto put_dev_exit;
1631
1632         pdata = dev_get_platdata(&port_pdev->dev);
1633
1634         mutex_lock(&pdata->lock);
1635         dfl_feature_dev_use_end(pdata);
1636         mutex_unlock(&pdata->lock);
1637
1638         cdev->released_port_num--;
1639 put_dev_exit:
1640         put_device(&port_pdev->dev);
1641 unlock_exit:
1642         mutex_unlock(&cdev->lock);
1643         return ret;
1644 }
1645 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_assign_port);
1646
1647 static void config_port_access_mode(struct device *fme_dev, int port_id,
1648                                     bool is_vf)
1649 {
1650         void __iomem *base;
1651         u64 v;
1652
1653         base = dfl_get_feature_ioaddr_by_id(fme_dev, FME_FEATURE_ID_HEADER);
1654
1655         v = readq(base + FME_HDR_PORT_OFST(port_id));
1656
1657         v &= ~FME_PORT_OFST_ACC_CTRL;
1658         v |= FIELD_PREP(FME_PORT_OFST_ACC_CTRL,
1659                         is_vf ? FME_PORT_OFST_ACC_VF : FME_PORT_OFST_ACC_PF);
1660
1661         writeq(v, base + FME_HDR_PORT_OFST(port_id));
1662 }
1663
1664 #define config_port_vf_mode(dev, id) config_port_access_mode(dev, id, true)
1665 #define config_port_pf_mode(dev, id) config_port_access_mode(dev, id, false)
1666
1667 /**
1668  * dfl_fpga_cdev_config_ports_pf - configure ports to PF access mode
1669  *
1670  * @cdev: parent container device.
1671  *
1672  * This function is needed in sriov configuration routine. It could be used to
1673  * configure the all released ports from VF access mode to PF.
1674  */
1675 void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev)
1676 {
1677         struct dfl_feature_platform_data *pdata;
1678
1679         mutex_lock(&cdev->lock);
1680         list_for_each_entry(pdata, &cdev->port_dev_list, node) {
1681                 if (device_is_registered(&pdata->dev->dev))
1682                         continue;
1683
1684                 config_port_pf_mode(cdev->fme_dev, pdata->id);
1685         }
1686         mutex_unlock(&cdev->lock);
1687 }
1688 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_pf);
1689
1690 /**
1691  * dfl_fpga_cdev_config_ports_vf - configure ports to VF access mode
1692  *
1693  * @cdev: parent container device.
1694  * @num_vfs: VF device number.
1695  *
1696  * This function is needed in sriov configuration routine. It could be used to
1697  * configure the released ports from PF access mode to VF.
1698  *
1699  * Return: 0 on success, negative error code otherwise.
1700  */
1701 int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
1702 {
1703         struct dfl_feature_platform_data *pdata;
1704         int ret = 0;
1705
1706         mutex_lock(&cdev->lock);
1707         /*
1708          * can't turn multiple ports into 1 VF device, only 1 port for 1 VF
1709          * device, so if released port number doesn't match VF device number,
1710          * then reject the request with -EINVAL error code.
1711          */
1712         if (cdev->released_port_num != num_vfs) {
1713                 ret = -EINVAL;
1714                 goto done;
1715         }
1716
1717         list_for_each_entry(pdata, &cdev->port_dev_list, node) {
1718                 if (device_is_registered(&pdata->dev->dev))
1719                         continue;
1720
1721                 config_port_vf_mode(cdev->fme_dev, pdata->id);
1722         }
1723 done:
1724         mutex_unlock(&cdev->lock);
1725         return ret;
1726 }
1727 EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_vf);
1728
1729 static irqreturn_t dfl_irq_handler(int irq, void *arg)
1730 {
1731         struct eventfd_ctx *trigger = arg;
1732
1733         eventfd_signal(trigger, 1);
1734         return IRQ_HANDLED;
1735 }
1736
1737 static int do_set_irq_trigger(struct dfl_feature *feature, unsigned int idx,
1738                               int fd)
1739 {
1740         struct platform_device *pdev = feature->dev;
1741         struct eventfd_ctx *trigger;
1742         int irq, ret;
1743
1744         irq = feature->irq_ctx[idx].irq;
1745
1746         if (feature->irq_ctx[idx].trigger) {
1747                 free_irq(irq, feature->irq_ctx[idx].trigger);
1748                 kfree(feature->irq_ctx[idx].name);
1749                 eventfd_ctx_put(feature->irq_ctx[idx].trigger);
1750                 feature->irq_ctx[idx].trigger = NULL;
1751         }
1752
1753         if (fd < 0)
1754                 return 0;
1755
1756         feature->irq_ctx[idx].name =
1757                 kasprintf(GFP_KERNEL, "fpga-irq[%u](%s-%x)", idx,
1758                           dev_name(&pdev->dev), feature->id);
1759         if (!feature->irq_ctx[idx].name)
1760                 return -ENOMEM;
1761
1762         trigger = eventfd_ctx_fdget(fd);
1763         if (IS_ERR(trigger)) {
1764                 ret = PTR_ERR(trigger);
1765                 goto free_name;
1766         }
1767
1768         ret = request_irq(irq, dfl_irq_handler, 0,
1769                           feature->irq_ctx[idx].name, trigger);
1770         if (!ret) {
1771                 feature->irq_ctx[idx].trigger = trigger;
1772                 return ret;
1773         }
1774
1775         eventfd_ctx_put(trigger);
1776 free_name:
1777         kfree(feature->irq_ctx[idx].name);
1778
1779         return ret;
1780 }
1781
1782 /**
1783  * dfl_fpga_set_irq_triggers - set eventfd triggers for dfl feature interrupts
1784  *
1785  * @feature: dfl sub feature.
1786  * @start: start of irq index in this dfl sub feature.
1787  * @count: number of irqs.
1788  * @fds: eventfds to bind with irqs. unbind related irq if fds[n] is negative.
1789  *       unbind "count" specified number of irqs if fds ptr is NULL.
1790  *
1791  * Bind given eventfds with irqs in this dfl sub feature. Unbind related irq if
1792  * fds[n] is negative. Unbind "count" specified number of irqs if fds ptr is
1793  * NULL.
1794  *
1795  * Return: 0 on success, negative error code otherwise.
1796  */
1797 int dfl_fpga_set_irq_triggers(struct dfl_feature *feature, unsigned int start,
1798                               unsigned int count, int32_t *fds)
1799 {
1800         unsigned int i;
1801         int ret = 0;
1802
1803         /* overflow */
1804         if (unlikely(start + count < start))
1805                 return -EINVAL;
1806
1807         /* exceeds nr_irqs */
1808         if (start + count > feature->nr_irqs)
1809                 return -EINVAL;
1810
1811         for (i = 0; i < count; i++) {
1812                 int fd = fds ? fds[i] : -1;
1813
1814                 ret = do_set_irq_trigger(feature, start + i, fd);
1815                 if (ret) {
1816                         while (i--)
1817                                 do_set_irq_trigger(feature, start + i, -1);
1818                         break;
1819                 }
1820         }
1821
1822         return ret;
1823 }
1824 EXPORT_SYMBOL_GPL(dfl_fpga_set_irq_triggers);
1825
1826 /**
1827  * dfl_feature_ioctl_get_num_irqs - dfl feature _GET_IRQ_NUM ioctl interface.
1828  * @pdev: the feature device which has the sub feature
1829  * @feature: the dfl sub feature
1830  * @arg: ioctl argument
1831  *
1832  * Return: 0 on success, negative error code otherwise.
1833  */
1834 long dfl_feature_ioctl_get_num_irqs(struct platform_device *pdev,
1835                                     struct dfl_feature *feature,
1836                                     unsigned long arg)
1837 {
1838         return put_user(feature->nr_irqs, (__u32 __user *)arg);
1839 }
1840 EXPORT_SYMBOL_GPL(dfl_feature_ioctl_get_num_irqs);
1841
1842 /**
1843  * dfl_feature_ioctl_set_irq - dfl feature _SET_IRQ ioctl interface.
1844  * @pdev: the feature device which has the sub feature
1845  * @feature: the dfl sub feature
1846  * @arg: ioctl argument
1847  *
1848  * Return: 0 on success, negative error code otherwise.
1849  */
1850 long dfl_feature_ioctl_set_irq(struct platform_device *pdev,
1851                                struct dfl_feature *feature,
1852                                unsigned long arg)
1853 {
1854         struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
1855         struct dfl_fpga_irq_set hdr;
1856         s32 *fds;
1857         long ret;
1858
1859         if (!feature->nr_irqs)
1860                 return -ENOENT;
1861
1862         if (copy_from_user(&hdr, (void __user *)arg, sizeof(hdr)))
1863                 return -EFAULT;
1864
1865         if (!hdr.count || (hdr.start + hdr.count > feature->nr_irqs) ||
1866             (hdr.start + hdr.count < hdr.start))
1867                 return -EINVAL;
1868
1869         fds = memdup_user((void __user *)(arg + sizeof(hdr)),
1870                           array_size(hdr.count, sizeof(s32)));
1871         if (IS_ERR(fds))
1872                 return PTR_ERR(fds);
1873
1874         mutex_lock(&pdata->lock);
1875         ret = dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds);
1876         mutex_unlock(&pdata->lock);
1877
1878         kfree(fds);
1879         return ret;
1880 }
1881 EXPORT_SYMBOL_GPL(dfl_feature_ioctl_set_irq);
1882
1883 static void __exit dfl_fpga_exit(void)
1884 {
1885         dfl_chardev_uinit();
1886         dfl_ids_destroy();
1887         bus_unregister(&dfl_bus_type);
1888 }
1889
1890 module_init(dfl_fpga_init);
1891 module_exit(dfl_fpga_exit);
1892
1893 MODULE_DESCRIPTION("FPGA Device Feature List (DFL) Support");
1894 MODULE_AUTHOR("Intel Corporation");
1895 MODULE_LICENSE("GPL v2");