1 // SPDX-License-Identifier: GPL-2.0+
3 * MaxLinear/Exar USB to Serial driver
7 * Based on the initial driver written by Patong Yang:
9 * https://lore.kernel.org/r/20180404070634.nhspvmxcjwfgjkcv@advantechmxl-desktop
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/tty.h>
18 #include <linux/usb.h>
19 #include <linux/usb/serial.h>
21 struct xr_txrx_clk_mask {
27 #define XR_INT_OSC_HZ 48000000U
28 #define XR21V141X_MIN_SPEED 46U
29 #define XR21V141X_MAX_SPEED XR_INT_OSC_HZ
32 #define XR21V141X_SET_REQ 0
33 #define XR21V141X_GET_REQ 1
35 #define XR21V141X_CLOCK_DIVISOR_0 0x04
36 #define XR21V141X_CLOCK_DIVISOR_1 0x05
37 #define XR21V141X_CLOCK_DIVISOR_2 0x06
38 #define XR21V141X_TX_CLOCK_MASK_0 0x07
39 #define XR21V141X_TX_CLOCK_MASK_1 0x08
40 #define XR21V141X_RX_CLOCK_MASK_0 0x09
41 #define XR21V141X_RX_CLOCK_MASK_1 0x0a
43 /* XR21V141X register blocks */
44 #define XR21V141X_UART_REG_BLOCK 0
45 #define XR21V141X_UM_REG_BLOCK 4
46 #define XR21V141X_UART_CUSTOM_BLOCK 0x66
48 /* XR21V141X UART Manager Registers */
49 #define XR21V141X_UM_FIFO_ENABLE_REG 0x10
50 #define XR21V141X_UM_ENABLE_TX_FIFO 0x01
51 #define XR21V141X_UM_ENABLE_RX_FIFO 0x02
53 #define XR21V141X_UM_RX_FIFO_RESET 0x18
54 #define XR21V141X_UM_TX_FIFO_RESET 0x1c
56 #define XR21V141X_UART_ENABLE_TX 0x1
57 #define XR21V141X_UART_ENABLE_RX 0x2
59 #define XR21V141X_UART_MODE_RI BIT(0)
60 #define XR21V141X_UART_MODE_CD BIT(1)
61 #define XR21V141X_UART_MODE_DSR BIT(2)
62 #define XR21V141X_UART_MODE_DTR BIT(3)
63 #define XR21V141X_UART_MODE_CTS BIT(4)
64 #define XR21V141X_UART_MODE_RTS BIT(5)
66 #define XR21V141X_UART_BREAK_ON 0xff
67 #define XR21V141X_UART_BREAK_OFF 0
69 #define XR21V141X_UART_DATA_MASK GENMASK(3, 0)
70 #define XR21V141X_UART_DATA_7 0x7
71 #define XR21V141X_UART_DATA_8 0x8
73 #define XR21V141X_UART_PARITY_MASK GENMASK(6, 4)
74 #define XR21V141X_UART_PARITY_SHIFT 4
75 #define XR21V141X_UART_PARITY_NONE (0x0 << XR21V141X_UART_PARITY_SHIFT)
76 #define XR21V141X_UART_PARITY_ODD (0x1 << XR21V141X_UART_PARITY_SHIFT)
77 #define XR21V141X_UART_PARITY_EVEN (0x2 << XR21V141X_UART_PARITY_SHIFT)
78 #define XR21V141X_UART_PARITY_MARK (0x3 << XR21V141X_UART_PARITY_SHIFT)
79 #define XR21V141X_UART_PARITY_SPACE (0x4 << XR21V141X_UART_PARITY_SHIFT)
81 #define XR21V141X_UART_STOP_MASK BIT(7)
82 #define XR21V141X_UART_STOP_SHIFT 7
83 #define XR21V141X_UART_STOP_1 (0x0 << XR21V141X_UART_STOP_SHIFT)
84 #define XR21V141X_UART_STOP_2 (0x1 << XR21V141X_UART_STOP_SHIFT)
86 #define XR21V141X_UART_FLOW_MODE_NONE 0x0
87 #define XR21V141X_UART_FLOW_MODE_HW 0x1
88 #define XR21V141X_UART_FLOW_MODE_SW 0x2
90 #define XR21V141X_UART_MODE_GPIO_MASK GENMASK(2, 0)
91 #define XR21V141X_UART_MODE_RTS_CTS 0x1
92 #define XR21V141X_UART_MODE_DTR_DSR 0x2
93 #define XR21V141X_UART_MODE_RS485 0x3
94 #define XR21V141X_UART_MODE_RS485_ADDR 0x4
96 #define XR21V141X_REG_ENABLE 0x03
97 #define XR21V141X_REG_FORMAT 0x0b
98 #define XR21V141X_REG_FLOW_CTRL 0x0c
99 #define XR21V141X_REG_XON_CHAR 0x10
100 #define XR21V141X_REG_XOFF_CHAR 0x11
101 #define XR21V141X_REG_LOOPBACK 0x12
102 #define XR21V141X_REG_TX_BREAK 0x14
103 #define XR21V141X_REG_RS845_DELAY 0x15
104 #define XR21V141X_REG_GPIO_MODE 0x1a
105 #define XR21V141X_REG_GPIO_DIR 0x1b
106 #define XR21V141X_REG_GPIO_INT_MASK 0x1c
107 #define XR21V141X_REG_GPIO_SET 0x1d
108 #define XR21V141X_REG_GPIO_CLR 0x1e
109 #define XR21V141X_REG_GPIO_STATUS 0x1f
111 static int xr_set_reg(struct usb_serial_port *port, u8 block, u8 reg, u8 val)
113 struct usb_serial *serial = port->serial;
116 ret = usb_control_msg(serial->dev,
117 usb_sndctrlpipe(serial->dev, 0),
119 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
120 val, reg | (block << 8), NULL, 0,
121 USB_CTRL_SET_TIMEOUT);
123 dev_err(&port->dev, "Failed to set reg 0x%02x: %d\n", reg, ret);
130 static int xr_get_reg(struct usb_serial_port *port, u8 block, u8 reg, u8 *val)
132 struct usb_serial *serial = port->serial;
136 dmabuf = kmalloc(1, GFP_KERNEL);
140 ret = usb_control_msg(serial->dev,
141 usb_rcvctrlpipe(serial->dev, 0),
143 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
144 0, reg | (block << 8), dmabuf, 1,
145 USB_CTRL_GET_TIMEOUT);
150 dev_err(&port->dev, "Failed to get reg 0x%02x: %d\n", reg, ret);
160 static int xr_set_reg_uart(struct usb_serial_port *port, u8 reg, u8 val)
162 return xr_set_reg(port, XR21V141X_UART_REG_BLOCK, reg, val);
165 static int xr_get_reg_uart(struct usb_serial_port *port, u8 reg, u8 *val)
167 return xr_get_reg(port, XR21V141X_UART_REG_BLOCK, reg, val);
170 static int xr_set_reg_um(struct usb_serial_port *port, u8 reg, u8 val)
172 return xr_set_reg(port, XR21V141X_UM_REG_BLOCK, reg, val);
176 * According to datasheet, below is the recommended sequence for enabling UART
177 * module in XR21V141X:
183 static int xr_uart_enable(struct usb_serial_port *port)
187 ret = xr_set_reg_um(port, XR21V141X_UM_FIFO_ENABLE_REG,
188 XR21V141X_UM_ENABLE_TX_FIFO);
192 ret = xr_set_reg_uart(port, XR21V141X_REG_ENABLE,
193 XR21V141X_UART_ENABLE_TX | XR21V141X_UART_ENABLE_RX);
197 ret = xr_set_reg_um(port, XR21V141X_UM_FIFO_ENABLE_REG,
198 XR21V141X_UM_ENABLE_TX_FIFO | XR21V141X_UM_ENABLE_RX_FIFO);
201 xr_set_reg_uart(port, XR21V141X_REG_ENABLE, 0);
206 static int xr_uart_disable(struct usb_serial_port *port)
210 ret = xr_set_reg_uart(port, XR21V141X_REG_ENABLE, 0);
214 ret = xr_set_reg_um(port, XR21V141X_UM_FIFO_ENABLE_REG, 0);
219 static int xr_tiocmget(struct tty_struct *tty)
221 struct usb_serial_port *port = tty->driver_data;
225 ret = xr_get_reg_uart(port, XR21V141X_REG_GPIO_STATUS, &status);
230 * Modem control pins are active low, so reading '0' means it is active
231 * and '1' means not active.
233 ret = ((status & XR21V141X_UART_MODE_DTR) ? 0 : TIOCM_DTR) |
234 ((status & XR21V141X_UART_MODE_RTS) ? 0 : TIOCM_RTS) |
235 ((status & XR21V141X_UART_MODE_CTS) ? 0 : TIOCM_CTS) |
236 ((status & XR21V141X_UART_MODE_DSR) ? 0 : TIOCM_DSR) |
237 ((status & XR21V141X_UART_MODE_RI) ? 0 : TIOCM_RI) |
238 ((status & XR21V141X_UART_MODE_CD) ? 0 : TIOCM_CD);
243 static int xr_tiocmset_port(struct usb_serial_port *port,
244 unsigned int set, unsigned int clear)
250 /* Modem control pins are active low, so set & clr are swapped */
252 gpio_clr |= XR21V141X_UART_MODE_RTS;
254 gpio_clr |= XR21V141X_UART_MODE_DTR;
255 if (clear & TIOCM_RTS)
256 gpio_set |= XR21V141X_UART_MODE_RTS;
257 if (clear & TIOCM_DTR)
258 gpio_set |= XR21V141X_UART_MODE_DTR;
260 /* Writing '0' to gpio_{set/clr} bits has no effect, so no need to do */
262 ret = xr_set_reg_uart(port, XR21V141X_REG_GPIO_CLR, gpio_clr);
265 ret = xr_set_reg_uart(port, XR21V141X_REG_GPIO_SET, gpio_set);
270 static int xr_tiocmset(struct tty_struct *tty,
271 unsigned int set, unsigned int clear)
273 struct usb_serial_port *port = tty->driver_data;
275 return xr_tiocmset_port(port, set, clear);
278 static void xr_dtr_rts(struct usb_serial_port *port, int on)
281 xr_tiocmset_port(port, TIOCM_DTR | TIOCM_RTS, 0);
283 xr_tiocmset_port(port, 0, TIOCM_DTR | TIOCM_RTS);
286 static void xr_break_ctl(struct tty_struct *tty, int break_state)
288 struct usb_serial_port *port = tty->driver_data;
291 if (break_state == 0)
292 state = XR21V141X_UART_BREAK_OFF;
294 state = XR21V141X_UART_BREAK_ON;
296 dev_dbg(&port->dev, "Turning break %s\n",
297 state == XR21V141X_UART_BREAK_OFF ? "off" : "on");
298 xr_set_reg_uart(port, XR21V141X_REG_TX_BREAK, state);
301 /* Tx and Rx clock mask values obtained from section 3.3.4 of datasheet */
302 static const struct xr_txrx_clk_mask xr21v141x_txrx_clk_masks[] = {
303 { 0x000, 0x000, 0x000 },
304 { 0x000, 0x000, 0x000 },
305 { 0x100, 0x000, 0x100 },
306 { 0x020, 0x400, 0x020 },
307 { 0x010, 0x100, 0x010 },
308 { 0x208, 0x040, 0x208 },
309 { 0x104, 0x820, 0x108 },
310 { 0x844, 0x210, 0x884 },
311 { 0x444, 0x110, 0x444 },
312 { 0x122, 0x888, 0x224 },
313 { 0x912, 0x448, 0x924 },
314 { 0x492, 0x248, 0x492 },
315 { 0x252, 0x928, 0x292 },
316 { 0x94a, 0x4a4, 0xa52 },
317 { 0x52a, 0xaa4, 0x54a },
318 { 0xaaa, 0x954, 0x4aa },
319 { 0xaaa, 0x554, 0xaaa },
320 { 0x555, 0xad4, 0x5aa },
321 { 0xb55, 0xab4, 0x55a },
322 { 0x6b5, 0x5ac, 0xb56 },
323 { 0x5b5, 0xd6c, 0x6d6 },
324 { 0xb6d, 0xb6a, 0xdb6 },
325 { 0x76d, 0x6da, 0xbb6 },
326 { 0xedd, 0xdda, 0x76e },
327 { 0xddd, 0xbba, 0xeee },
328 { 0x7bb, 0xf7a, 0xdde },
329 { 0xf7b, 0xef6, 0x7de },
330 { 0xdf7, 0xbf6, 0xf7e },
331 { 0x7f7, 0xfee, 0xefe },
332 { 0xfdf, 0xfbe, 0x7fe },
333 { 0xf7f, 0xefe, 0xffe },
334 { 0xfff, 0xffe, 0xffd },
337 static int xr_set_baudrate(struct tty_struct *tty,
338 struct usb_serial_port *port)
340 u32 divisor, baud, idx;
341 u16 tx_mask, rx_mask;
344 baud = tty->termios.c_ospeed;
348 baud = clamp(baud, XR21V141X_MIN_SPEED, XR21V141X_MAX_SPEED);
349 divisor = XR_INT_OSC_HZ / baud;
350 idx = ((32 * XR_INT_OSC_HZ) / baud) & 0x1f;
351 tx_mask = xr21v141x_txrx_clk_masks[idx].tx;
354 rx_mask = xr21v141x_txrx_clk_masks[idx].rx1;
356 rx_mask = xr21v141x_txrx_clk_masks[idx].rx0;
358 dev_dbg(&port->dev, "Setting baud rate: %u\n", baud);
360 * XR21V141X uses fractional baud rate generator with 48MHz internal
361 * oscillator and 19-bit programmable divisor. So theoretically it can
362 * generate most commonly used baud rates with high accuracy.
364 ret = xr_set_reg_uart(port, XR21V141X_CLOCK_DIVISOR_0,
369 ret = xr_set_reg_uart(port, XR21V141X_CLOCK_DIVISOR_1,
370 (divisor >> 8) & 0xff);
374 ret = xr_set_reg_uart(port, XR21V141X_CLOCK_DIVISOR_2,
375 (divisor >> 16) & 0xff);
379 ret = xr_set_reg_uart(port, XR21V141X_TX_CLOCK_MASK_0,
384 ret = xr_set_reg_uart(port, XR21V141X_TX_CLOCK_MASK_1,
385 (tx_mask >> 8) & 0xff);
389 ret = xr_set_reg_uart(port, XR21V141X_RX_CLOCK_MASK_0,
394 ret = xr_set_reg_uart(port, XR21V141X_RX_CLOCK_MASK_1,
395 (rx_mask >> 8) & 0xff);
399 tty_encode_baud_rate(tty, baud, baud);
404 static void xr_set_flow_mode(struct tty_struct *tty,
405 struct usb_serial_port *port,
406 struct ktermios *old_termios)
411 ret = xr_get_reg_uart(port, XR21V141X_REG_GPIO_MODE, &gpio_mode);
415 /* Set GPIO mode for controlling the pins manually by default. */
416 gpio_mode &= ~XR21V141X_UART_MODE_GPIO_MASK;
418 if (C_CRTSCTS(tty) && C_BAUD(tty) != B0) {
419 dev_dbg(&port->dev, "Enabling hardware flow ctrl\n");
420 gpio_mode |= XR21V141X_UART_MODE_RTS_CTS;
421 flow = XR21V141X_UART_FLOW_MODE_HW;
422 } else if (I_IXON(tty)) {
423 u8 start_char = START_CHAR(tty);
424 u8 stop_char = STOP_CHAR(tty);
426 dev_dbg(&port->dev, "Enabling sw flow ctrl\n");
427 flow = XR21V141X_UART_FLOW_MODE_SW;
429 xr_set_reg_uart(port, XR21V141X_REG_XON_CHAR, start_char);
430 xr_set_reg_uart(port, XR21V141X_REG_XOFF_CHAR, stop_char);
432 dev_dbg(&port->dev, "Disabling flow ctrl\n");
433 flow = XR21V141X_UART_FLOW_MODE_NONE;
437 * As per the datasheet, UART needs to be disabled while writing to
438 * FLOW_CONTROL register.
440 xr_uart_disable(port);
441 xr_set_reg_uart(port, XR21V141X_REG_FLOW_CTRL, flow);
442 xr_uart_enable(port);
444 xr_set_reg_uart(port, XR21V141X_REG_GPIO_MODE, gpio_mode);
446 if (C_BAUD(tty) == B0)
448 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
452 static void xr_set_termios(struct tty_struct *tty,
453 struct usb_serial_port *port,
454 struct ktermios *old_termios)
456 struct ktermios *termios = &tty->termios;
460 if (!old_termios || (tty->termios.c_ospeed != old_termios->c_ospeed))
461 xr_set_baudrate(tty, port);
463 switch (C_CSIZE(tty)) {
466 /* CS5 and CS6 are not supported, so just restore old setting */
467 termios->c_cflag &= ~CSIZE;
469 termios->c_cflag |= old_termios->c_cflag & CSIZE;
471 bits |= XR21V141X_UART_DATA_8;
474 bits |= XR21V141X_UART_DATA_7;
478 bits |= XR21V141X_UART_DATA_8;
485 bits |= XR21V141X_UART_PARITY_MARK;
487 bits |= XR21V141X_UART_PARITY_SPACE;
490 bits |= XR21V141X_UART_PARITY_ODD;
492 bits |= XR21V141X_UART_PARITY_EVEN;
497 bits |= XR21V141X_UART_STOP_2;
499 bits |= XR21V141X_UART_STOP_1;
501 ret = xr_set_reg_uart(port, XR21V141X_REG_FORMAT, bits);
505 xr_set_flow_mode(tty, port, old_termios);
508 static int xr_open(struct tty_struct *tty, struct usb_serial_port *port)
513 ret = xr_uart_enable(port);
515 dev_err(&port->dev, "Failed to enable UART\n");
520 * Configure DTR and RTS as outputs and RI, CD, DSR and CTS as
523 gpio_dir = XR21V141X_UART_MODE_DTR | XR21V141X_UART_MODE_RTS;
524 xr_set_reg_uart(port, XR21V141X_REG_GPIO_DIR, gpio_dir);
528 xr_set_termios(tty, port, NULL);
530 ret = usb_serial_generic_open(tty, port);
532 xr_uart_disable(port);
539 static void xr_close(struct usb_serial_port *port)
541 usb_serial_generic_close(port);
543 xr_uart_disable(port);
546 static int xr_probe(struct usb_serial *serial, const struct usb_device_id *id)
548 struct usb_driver *driver = serial->type->usb_driver;
549 struct usb_interface *control_interface;
552 /* Don't bind to control interface */
553 if (serial->interface->cur_altsetting->desc.bInterfaceNumber == 0)
556 /* But claim the control interface during data interface probe */
557 control_interface = usb_ifnum_to_if(serial->dev, 0);
558 if (!control_interface)
561 ret = usb_driver_claim_interface(driver, control_interface, NULL);
563 dev_err(&serial->interface->dev, "Failed to claim control interface\n");
570 static void xr_disconnect(struct usb_serial *serial)
572 struct usb_driver *driver = serial->type->usb_driver;
573 struct usb_interface *control_interface;
575 control_interface = usb_ifnum_to_if(serial->dev, 0);
576 usb_driver_release_interface(driver, control_interface);
579 static const struct usb_device_id id_table[] = {
580 { USB_DEVICE(0x04e2, 0x1410) }, /* XR21V141X */
583 MODULE_DEVICE_TABLE(usb, id_table);
585 static struct usb_serial_driver xr_device = {
587 .owner = THIS_MODULE,
590 .id_table = id_table,
593 .disconnect = xr_disconnect,
596 .break_ctl = xr_break_ctl,
597 .set_termios = xr_set_termios,
598 .tiocmget = xr_tiocmget,
599 .tiocmset = xr_tiocmset,
600 .dtr_rts = xr_dtr_rts
603 static struct usb_serial_driver * const serial_drivers[] = {
607 module_usb_serial_driver(serial_drivers, id_table);
610 MODULE_DESCRIPTION("MaxLinear/Exar USB to Serial driver");
611 MODULE_LICENSE("GPL");