1 // SPDX-License-Identifier: GPL-2.0
3 * Test driver to test endpoint functionality
5 * Copyright (C) 2017 Texas Instruments
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
11 #include <linux/dmaengine.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/pci_ids.h>
16 #include <linux/random.h>
18 #include <linux/pci-epc.h>
19 #include <linux/pci-epf.h>
20 #include <linux/pci_regs.h>
22 #define IRQ_TYPE_INTX 0
23 #define IRQ_TYPE_MSI 1
24 #define IRQ_TYPE_MSIX 2
26 #define COMMAND_RAISE_INTX_IRQ BIT(0)
27 #define COMMAND_RAISE_MSI_IRQ BIT(1)
28 #define COMMAND_RAISE_MSIX_IRQ BIT(2)
29 #define COMMAND_READ BIT(3)
30 #define COMMAND_WRITE BIT(4)
31 #define COMMAND_COPY BIT(5)
33 #define STATUS_READ_SUCCESS BIT(0)
34 #define STATUS_READ_FAIL BIT(1)
35 #define STATUS_WRITE_SUCCESS BIT(2)
36 #define STATUS_WRITE_FAIL BIT(3)
37 #define STATUS_COPY_SUCCESS BIT(4)
38 #define STATUS_COPY_FAIL BIT(5)
39 #define STATUS_IRQ_RAISED BIT(6)
40 #define STATUS_SRC_ADDR_INVALID BIT(7)
41 #define STATUS_DST_ADDR_INVALID BIT(8)
43 #define FLAG_USE_DMA BIT(0)
45 #define TIMER_RESOLUTION 1
47 static struct workqueue_struct *kpcitest_workqueue;
50 void *reg[PCI_STD_NUM_BARS];
52 enum pci_barno test_reg_bar;
53 size_t msix_table_offset;
54 struct delayed_work cmd_handler;
55 struct dma_chan *dma_chan_tx;
56 struct dma_chan *dma_chan_rx;
57 struct dma_chan *transfer_chan;
58 dma_cookie_t transfer_cookie;
59 enum dma_status transfer_status;
60 struct completion transfer_complete;
63 const struct pci_epc_features *epc_features;
66 struct pci_epf_test_reg {
79 static struct pci_epf_header test_header = {
80 .vendorid = PCI_ANY_ID,
81 .deviceid = PCI_ANY_ID,
82 .baseclass_code = PCI_CLASS_OTHERS,
83 .interrupt_pin = PCI_INTERRUPT_INTA,
86 static size_t bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
88 static void pci_epf_test_dma_callback(void *param)
90 struct pci_epf_test *epf_test = param;
91 struct dma_tx_state state;
93 epf_test->transfer_status =
94 dmaengine_tx_status(epf_test->transfer_chan,
95 epf_test->transfer_cookie, &state);
96 if (epf_test->transfer_status == DMA_COMPLETE ||
97 epf_test->transfer_status == DMA_ERROR)
98 complete(&epf_test->transfer_complete);
102 * pci_epf_test_data_transfer() - Function that uses dmaengine API to transfer
103 * data between PCIe EP and remote PCIe RC
104 * @epf_test: the EPF test device that performs the data transfer operation
105 * @dma_dst: The destination address of the data transfer. It can be a physical
106 * address given by pci_epc_mem_alloc_addr or DMA mapping APIs.
107 * @dma_src: The source address of the data transfer. It can be a physical
108 * address given by pci_epc_mem_alloc_addr or DMA mapping APIs.
109 * @len: The size of the data transfer
110 * @dma_remote: remote RC physical address
111 * @dir: DMA transfer direction
113 * Function that uses dmaengine API to transfer data between PCIe EP and remote
114 * PCIe RC. The source and destination address can be a physical address given
115 * by pci_epc_mem_alloc_addr or the one obtained using DMA mapping APIs.
117 * The function returns '0' on success and negative value on failure.
119 static int pci_epf_test_data_transfer(struct pci_epf_test *epf_test,
120 dma_addr_t dma_dst, dma_addr_t dma_src,
121 size_t len, dma_addr_t dma_remote,
122 enum dma_transfer_direction dir)
124 struct dma_chan *chan = (dir == DMA_MEM_TO_DEV) ?
125 epf_test->dma_chan_tx : epf_test->dma_chan_rx;
126 dma_addr_t dma_local = (dir == DMA_MEM_TO_DEV) ? dma_src : dma_dst;
127 enum dma_ctrl_flags flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
128 struct pci_epf *epf = epf_test->epf;
129 struct dma_async_tx_descriptor *tx;
130 struct dma_slave_config sconf = {};
131 struct device *dev = &epf->dev;
134 if (IS_ERR_OR_NULL(chan)) {
135 dev_err(dev, "Invalid DMA memcpy channel\n");
139 if (epf_test->dma_private) {
140 sconf.direction = dir;
141 if (dir == DMA_MEM_TO_DEV)
142 sconf.dst_addr = dma_remote;
144 sconf.src_addr = dma_remote;
146 if (dmaengine_slave_config(chan, &sconf)) {
147 dev_err(dev, "DMA slave config fail\n");
150 tx = dmaengine_prep_slave_single(chan, dma_local, len, dir,
153 tx = dmaengine_prep_dma_memcpy(chan, dma_dst, dma_src, len,
158 dev_err(dev, "Failed to prepare DMA memcpy\n");
162 reinit_completion(&epf_test->transfer_complete);
163 epf_test->transfer_chan = chan;
164 tx->callback = pci_epf_test_dma_callback;
165 tx->callback_param = epf_test;
166 epf_test->transfer_cookie = dmaengine_submit(tx);
168 ret = dma_submit_error(epf_test->transfer_cookie);
170 dev_err(dev, "Failed to do DMA tx_submit %d\n", ret);
174 dma_async_issue_pending(chan);
175 ret = wait_for_completion_interruptible(&epf_test->transfer_complete);
177 dev_err(dev, "DMA wait_for_completion interrupted\n");
181 if (epf_test->transfer_status == DMA_ERROR) {
182 dev_err(dev, "DMA transfer failed\n");
187 dmaengine_terminate_sync(chan);
192 struct epf_dma_filter {
197 static bool epf_dma_filter_fn(struct dma_chan *chan, void *node)
199 struct epf_dma_filter *filter = node;
200 struct dma_slave_caps caps;
202 memset(&caps, 0, sizeof(caps));
203 dma_get_slave_caps(chan, &caps);
205 return chan->device->dev == filter->dev
206 && (filter->dma_mask & caps.directions);
210 * pci_epf_test_init_dma_chan() - Function to initialize EPF test DMA channel
211 * @epf_test: the EPF test device that performs data transfer operation
213 * Function to initialize EPF test DMA channel.
215 static int pci_epf_test_init_dma_chan(struct pci_epf_test *epf_test)
217 struct pci_epf *epf = epf_test->epf;
218 struct device *dev = &epf->dev;
219 struct epf_dma_filter filter;
220 struct dma_chan *dma_chan;
224 filter.dev = epf->epc->dev.parent;
225 filter.dma_mask = BIT(DMA_DEV_TO_MEM);
228 dma_cap_set(DMA_SLAVE, mask);
229 dma_chan = dma_request_channel(mask, epf_dma_filter_fn, &filter);
231 dev_info(dev, "Failed to get private DMA rx channel. Falling back to generic one\n");
235 epf_test->dma_chan_rx = dma_chan;
237 filter.dma_mask = BIT(DMA_MEM_TO_DEV);
238 dma_chan = dma_request_channel(mask, epf_dma_filter_fn, &filter);
241 dev_info(dev, "Failed to get private DMA tx channel. Falling back to generic one\n");
245 epf_test->dma_chan_tx = dma_chan;
246 epf_test->dma_private = true;
248 init_completion(&epf_test->transfer_complete);
253 dma_release_channel(epf_test->dma_chan_rx);
254 epf_test->dma_chan_tx = NULL;
258 dma_cap_set(DMA_MEMCPY, mask);
260 dma_chan = dma_request_chan_by_mask(&mask);
261 if (IS_ERR(dma_chan)) {
262 ret = PTR_ERR(dma_chan);
263 if (ret != -EPROBE_DEFER)
264 dev_err(dev, "Failed to get DMA channel\n");
267 init_completion(&epf_test->transfer_complete);
269 epf_test->dma_chan_tx = epf_test->dma_chan_rx = dma_chan;
275 * pci_epf_test_clean_dma_chan() - Function to cleanup EPF test DMA channel
276 * @epf_test: the EPF test device that performs data transfer operation
278 * Helper to cleanup EPF test DMA channel.
280 static void pci_epf_test_clean_dma_chan(struct pci_epf_test *epf_test)
282 if (!epf_test->dma_supported)
285 dma_release_channel(epf_test->dma_chan_tx);
286 if (epf_test->dma_chan_tx == epf_test->dma_chan_rx) {
287 epf_test->dma_chan_tx = NULL;
288 epf_test->dma_chan_rx = NULL;
292 dma_release_channel(epf_test->dma_chan_rx);
293 epf_test->dma_chan_rx = NULL;
298 static void pci_epf_test_print_rate(struct pci_epf_test *epf_test,
299 const char *op, u64 size,
300 struct timespec64 *start,
301 struct timespec64 *end, bool dma)
303 struct timespec64 ts = timespec64_sub(*end, *start);
306 /* calculate the rate */
307 ns = timespec64_to_ns(&ts);
309 rate = div64_u64(size * NSEC_PER_SEC, ns * 1000);
311 dev_info(&epf_test->epf->dev,
312 "%s => Size: %llu B, DMA: %s, Time: %llu.%09u s, Rate: %llu KB/s\n",
313 op, size, dma ? "YES" : "NO",
314 (u64)ts.tv_sec, (u32)ts.tv_nsec, rate);
317 static void pci_epf_test_copy(struct pci_epf_test *epf_test,
318 struct pci_epf_test_reg *reg)
321 void __iomem *src_addr;
322 void __iomem *dst_addr;
323 phys_addr_t src_phys_addr;
324 phys_addr_t dst_phys_addr;
325 struct timespec64 start, end;
326 struct pci_epf *epf = epf_test->epf;
327 struct device *dev = &epf->dev;
328 struct pci_epc *epc = epf->epc;
330 src_addr = pci_epc_mem_alloc_addr(epc, &src_phys_addr, reg->size);
332 dev_err(dev, "Failed to allocate source address\n");
333 reg->status = STATUS_SRC_ADDR_INVALID;
338 ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, src_phys_addr,
339 reg->src_addr, reg->size);
341 dev_err(dev, "Failed to map source address\n");
342 reg->status = STATUS_SRC_ADDR_INVALID;
346 dst_addr = pci_epc_mem_alloc_addr(epc, &dst_phys_addr, reg->size);
348 dev_err(dev, "Failed to allocate destination address\n");
349 reg->status = STATUS_DST_ADDR_INVALID;
351 goto err_src_map_addr;
354 ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, dst_phys_addr,
355 reg->dst_addr, reg->size);
357 dev_err(dev, "Failed to map destination address\n");
358 reg->status = STATUS_DST_ADDR_INVALID;
362 ktime_get_ts64(&start);
363 if (reg->flags & FLAG_USE_DMA) {
364 if (epf_test->dma_private) {
365 dev_err(dev, "Cannot transfer data using DMA\n");
370 ret = pci_epf_test_data_transfer(epf_test, dst_phys_addr,
371 src_phys_addr, reg->size, 0,
374 dev_err(dev, "Data transfer failed\n");
378 buf = kzalloc(reg->size, GFP_KERNEL);
384 memcpy_fromio(buf, src_addr, reg->size);
385 memcpy_toio(dst_addr, buf, reg->size);
388 ktime_get_ts64(&end);
389 pci_epf_test_print_rate(epf_test, "COPY", reg->size, &start, &end,
390 reg->flags & FLAG_USE_DMA);
393 pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, dst_phys_addr);
396 pci_epc_mem_free_addr(epc, dst_phys_addr, dst_addr, reg->size);
399 pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, src_phys_addr);
402 pci_epc_mem_free_addr(epc, src_phys_addr, src_addr, reg->size);
406 reg->status |= STATUS_COPY_SUCCESS;
408 reg->status |= STATUS_COPY_FAIL;
411 static void pci_epf_test_read(struct pci_epf_test *epf_test,
412 struct pci_epf_test_reg *reg)
415 void __iomem *src_addr;
418 phys_addr_t phys_addr;
419 phys_addr_t dst_phys_addr;
420 struct timespec64 start, end;
421 struct pci_epf *epf = epf_test->epf;
422 struct device *dev = &epf->dev;
423 struct pci_epc *epc = epf->epc;
424 struct device *dma_dev = epf->epc->dev.parent;
426 src_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
428 dev_err(dev, "Failed to allocate address\n");
429 reg->status = STATUS_SRC_ADDR_INVALID;
434 ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, phys_addr,
435 reg->src_addr, reg->size);
437 dev_err(dev, "Failed to map address\n");
438 reg->status = STATUS_SRC_ADDR_INVALID;
442 buf = kzalloc(reg->size, GFP_KERNEL);
448 if (reg->flags & FLAG_USE_DMA) {
449 dst_phys_addr = dma_map_single(dma_dev, buf, reg->size,
451 if (dma_mapping_error(dma_dev, dst_phys_addr)) {
452 dev_err(dev, "Failed to map destination buffer addr\n");
457 ktime_get_ts64(&start);
458 ret = pci_epf_test_data_transfer(epf_test, dst_phys_addr,
459 phys_addr, reg->size,
460 reg->src_addr, DMA_DEV_TO_MEM);
462 dev_err(dev, "Data transfer failed\n");
463 ktime_get_ts64(&end);
465 dma_unmap_single(dma_dev, dst_phys_addr, reg->size,
468 ktime_get_ts64(&start);
469 memcpy_fromio(buf, src_addr, reg->size);
470 ktime_get_ts64(&end);
473 pci_epf_test_print_rate(epf_test, "READ", reg->size, &start, &end,
474 reg->flags & FLAG_USE_DMA);
476 crc32 = crc32_le(~0, buf, reg->size);
477 if (crc32 != reg->checksum)
484 pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, phys_addr);
487 pci_epc_mem_free_addr(epc, phys_addr, src_addr, reg->size);
491 reg->status |= STATUS_READ_SUCCESS;
493 reg->status |= STATUS_READ_FAIL;
496 static void pci_epf_test_write(struct pci_epf_test *epf_test,
497 struct pci_epf_test_reg *reg)
500 void __iomem *dst_addr;
502 phys_addr_t phys_addr;
503 phys_addr_t src_phys_addr;
504 struct timespec64 start, end;
505 struct pci_epf *epf = epf_test->epf;
506 struct device *dev = &epf->dev;
507 struct pci_epc *epc = epf->epc;
508 struct device *dma_dev = epf->epc->dev.parent;
510 dst_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
512 dev_err(dev, "Failed to allocate address\n");
513 reg->status = STATUS_DST_ADDR_INVALID;
518 ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, phys_addr,
519 reg->dst_addr, reg->size);
521 dev_err(dev, "Failed to map address\n");
522 reg->status = STATUS_DST_ADDR_INVALID;
526 buf = kzalloc(reg->size, GFP_KERNEL);
532 get_random_bytes(buf, reg->size);
533 reg->checksum = crc32_le(~0, buf, reg->size);
535 if (reg->flags & FLAG_USE_DMA) {
536 src_phys_addr = dma_map_single(dma_dev, buf, reg->size,
538 if (dma_mapping_error(dma_dev, src_phys_addr)) {
539 dev_err(dev, "Failed to map source buffer addr\n");
544 ktime_get_ts64(&start);
546 ret = pci_epf_test_data_transfer(epf_test, phys_addr,
547 src_phys_addr, reg->size,
551 dev_err(dev, "Data transfer failed\n");
552 ktime_get_ts64(&end);
554 dma_unmap_single(dma_dev, src_phys_addr, reg->size,
557 ktime_get_ts64(&start);
558 memcpy_toio(dst_addr, buf, reg->size);
559 ktime_get_ts64(&end);
562 pci_epf_test_print_rate(epf_test, "WRITE", reg->size, &start, &end,
563 reg->flags & FLAG_USE_DMA);
566 * wait 1ms inorder for the write to complete. Without this delay L3
567 * error in observed in the host system.
569 usleep_range(1000, 2000);
575 pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, phys_addr);
578 pci_epc_mem_free_addr(epc, phys_addr, dst_addr, reg->size);
582 reg->status |= STATUS_WRITE_SUCCESS;
584 reg->status |= STATUS_WRITE_FAIL;
587 static void pci_epf_test_raise_irq(struct pci_epf_test *epf_test,
588 struct pci_epf_test_reg *reg)
590 struct pci_epf *epf = epf_test->epf;
591 struct device *dev = &epf->dev;
592 struct pci_epc *epc = epf->epc;
593 u32 status = reg->status | STATUS_IRQ_RAISED;
597 * Set the status before raising the IRQ to ensure that the host sees
598 * the updated value when it gets the IRQ.
600 WRITE_ONCE(reg->status, status);
602 switch (reg->irq_type) {
604 pci_epc_raise_irq(epc, epf->func_no, epf->vfunc_no,
608 count = pci_epc_get_msi(epc, epf->func_no, epf->vfunc_no);
609 if (reg->irq_number > count || count <= 0) {
610 dev_err(dev, "Invalid MSI IRQ number %d / %d\n",
611 reg->irq_number, count);
614 pci_epc_raise_irq(epc, epf->func_no, epf->vfunc_no,
615 PCI_IRQ_MSI, reg->irq_number);
618 count = pci_epc_get_msix(epc, epf->func_no, epf->vfunc_no);
619 if (reg->irq_number > count || count <= 0) {
620 dev_err(dev, "Invalid MSIX IRQ number %d / %d\n",
621 reg->irq_number, count);
624 pci_epc_raise_irq(epc, epf->func_no, epf->vfunc_no,
625 PCI_IRQ_MSIX, reg->irq_number);
628 dev_err(dev, "Failed to raise IRQ, unknown type\n");
633 static void pci_epf_test_cmd_handler(struct work_struct *work)
636 struct pci_epf_test *epf_test = container_of(work, struct pci_epf_test,
638 struct pci_epf *epf = epf_test->epf;
639 struct device *dev = &epf->dev;
640 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
641 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
643 command = READ_ONCE(reg->command);
647 WRITE_ONCE(reg->command, 0);
648 WRITE_ONCE(reg->status, 0);
650 if ((READ_ONCE(reg->flags) & FLAG_USE_DMA) &&
651 !epf_test->dma_supported) {
652 dev_err(dev, "Cannot transfer data using DMA\n");
656 if (reg->irq_type > IRQ_TYPE_MSIX) {
657 dev_err(dev, "Failed to detect IRQ type\n");
662 case COMMAND_RAISE_INTX_IRQ:
663 case COMMAND_RAISE_MSI_IRQ:
664 case COMMAND_RAISE_MSIX_IRQ:
665 pci_epf_test_raise_irq(epf_test, reg);
668 pci_epf_test_write(epf_test, reg);
669 pci_epf_test_raise_irq(epf_test, reg);
672 pci_epf_test_read(epf_test, reg);
673 pci_epf_test_raise_irq(epf_test, reg);
676 pci_epf_test_copy(epf_test, reg);
677 pci_epf_test_raise_irq(epf_test, reg);
680 dev_err(dev, "Invalid command 0x%x\n", command);
685 queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
686 msecs_to_jiffies(1));
689 static void pci_epf_test_unbind(struct pci_epf *epf)
691 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
692 struct pci_epc *epc = epf->epc;
693 struct pci_epf_bar *epf_bar;
696 cancel_delayed_work(&epf_test->cmd_handler);
697 pci_epf_test_clean_dma_chan(epf_test);
698 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
699 epf_bar = &epf->bar[bar];
701 if (epf_test->reg[bar]) {
702 pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no,
704 pci_epf_free_space(epf, epf_test->reg[bar], bar,
710 static int pci_epf_test_set_bar(struct pci_epf *epf)
714 struct pci_epf_bar *epf_bar;
715 struct pci_epc *epc = epf->epc;
716 struct device *dev = &epf->dev;
717 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
718 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
719 const struct pci_epc_features *epc_features;
721 epc_features = epf_test->epc_features;
723 for (bar = 0; bar < PCI_STD_NUM_BARS; bar += add) {
724 epf_bar = &epf->bar[bar];
726 * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64
727 * if the specific implementation required a 64-bit BAR,
728 * even if we only requested a 32-bit BAR.
730 add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1;
732 if (epc_features->bar[bar].type == BAR_RESERVED)
735 ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no,
738 pci_epf_free_space(epf, epf_test->reg[bar], bar,
740 dev_err(dev, "Failed to set BAR%d\n", bar);
741 if (bar == test_reg_bar)
749 static int pci_epf_test_core_init(struct pci_epf *epf)
751 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
752 struct pci_epf_header *header = epf->header;
753 const struct pci_epc_features *epc_features;
754 struct pci_epc *epc = epf->epc;
755 struct device *dev = &epf->dev;
756 bool msix_capable = false;
757 bool msi_capable = true;
760 epc_features = pci_epc_get_features(epc, epf->func_no, epf->vfunc_no);
762 msix_capable = epc_features->msix_capable;
763 msi_capable = epc_features->msi_capable;
766 if (epf->vfunc_no <= 1) {
767 ret = pci_epc_write_header(epc, epf->func_no, epf->vfunc_no, header);
769 dev_err(dev, "Configuration header write failed\n");
774 ret = pci_epf_test_set_bar(epf);
779 ret = pci_epc_set_msi(epc, epf->func_no, epf->vfunc_no,
780 epf->msi_interrupts);
782 dev_err(dev, "MSI configuration failed\n");
788 ret = pci_epc_set_msix(epc, epf->func_no, epf->vfunc_no,
789 epf->msix_interrupts,
790 epf_test->test_reg_bar,
791 epf_test->msix_table_offset);
793 dev_err(dev, "MSI-X configuration failed\n");
801 static int pci_epf_test_link_up(struct pci_epf *epf)
803 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
805 queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
806 msecs_to_jiffies(1));
811 static const struct pci_epc_event_ops pci_epf_test_event_ops = {
812 .core_init = pci_epf_test_core_init,
813 .link_up = pci_epf_test_link_up,
816 static int pci_epf_test_alloc_space(struct pci_epf *epf)
818 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
819 struct device *dev = &epf->dev;
820 struct pci_epf_bar *epf_bar;
821 size_t msix_table_size = 0;
822 size_t test_reg_bar_size;
827 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
828 const struct pci_epc_features *epc_features;
829 size_t test_reg_size;
831 epc_features = epf_test->epc_features;
833 test_reg_bar_size = ALIGN(sizeof(struct pci_epf_test_reg), 128);
835 msix_capable = epc_features->msix_capable;
837 msix_table_size = PCI_MSIX_ENTRY_SIZE * epf->msix_interrupts;
838 epf_test->msix_table_offset = test_reg_bar_size;
839 /* Align to QWORD or 8 Bytes */
840 pba_size = ALIGN(DIV_ROUND_UP(epf->msix_interrupts, 8), 8);
842 test_reg_size = test_reg_bar_size + msix_table_size + pba_size;
844 base = pci_epf_alloc_space(epf, test_reg_size, test_reg_bar,
845 epc_features, PRIMARY_INTERFACE);
847 dev_err(dev, "Failed to allocated register space\n");
850 epf_test->reg[test_reg_bar] = base;
852 for (bar = 0; bar < PCI_STD_NUM_BARS; bar += add) {
853 epf_bar = &epf->bar[bar];
854 add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1;
856 if (bar == test_reg_bar)
859 if (epc_features->bar[bar].type == BAR_RESERVED)
862 base = pci_epf_alloc_space(epf, bar_size[bar], bar,
863 epc_features, PRIMARY_INTERFACE);
865 dev_err(dev, "Failed to allocate space for BAR%d\n",
867 epf_test->reg[bar] = base;
873 static void pci_epf_configure_bar(struct pci_epf *epf,
874 const struct pci_epc_features *epc_features)
876 struct pci_epf_bar *epf_bar;
879 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
880 epf_bar = &epf->bar[i];
881 if (epc_features->bar[i].only_64bit)
882 epf_bar->flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
886 static int pci_epf_test_bind(struct pci_epf *epf)
889 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
890 const struct pci_epc_features *epc_features;
891 enum pci_barno test_reg_bar = BAR_0;
892 struct pci_epc *epc = epf->epc;
893 bool linkup_notifier = false;
894 bool core_init_notifier = false;
896 if (WARN_ON_ONCE(!epc))
899 epc_features = pci_epc_get_features(epc, epf->func_no, epf->vfunc_no);
901 dev_err(&epf->dev, "epc_features not implemented\n");
905 linkup_notifier = epc_features->linkup_notifier;
906 core_init_notifier = epc_features->core_init_notifier;
907 test_reg_bar = pci_epc_get_first_free_bar(epc_features);
908 if (test_reg_bar < 0)
910 pci_epf_configure_bar(epf, epc_features);
912 epf_test->test_reg_bar = test_reg_bar;
913 epf_test->epc_features = epc_features;
915 ret = pci_epf_test_alloc_space(epf);
919 if (!core_init_notifier) {
920 ret = pci_epf_test_core_init(epf);
925 epf_test->dma_supported = true;
927 ret = pci_epf_test_init_dma_chan(epf_test);
929 epf_test->dma_supported = false;
931 if (!linkup_notifier && !core_init_notifier)
932 queue_work(kpcitest_workqueue, &epf_test->cmd_handler.work);
937 static const struct pci_epf_device_id pci_epf_test_ids[] = {
939 .name = "pci_epf_test",
944 static int pci_epf_test_probe(struct pci_epf *epf,
945 const struct pci_epf_device_id *id)
947 struct pci_epf_test *epf_test;
948 struct device *dev = &epf->dev;
950 epf_test = devm_kzalloc(dev, sizeof(*epf_test), GFP_KERNEL);
954 epf->header = &test_header;
957 INIT_DELAYED_WORK(&epf_test->cmd_handler, pci_epf_test_cmd_handler);
959 epf->event_ops = &pci_epf_test_event_ops;
961 epf_set_drvdata(epf, epf_test);
965 static const struct pci_epf_ops ops = {
966 .unbind = pci_epf_test_unbind,
967 .bind = pci_epf_test_bind,
970 static struct pci_epf_driver test_driver = {
971 .driver.name = "pci_epf_test",
972 .probe = pci_epf_test_probe,
973 .id_table = pci_epf_test_ids,
975 .owner = THIS_MODULE,
978 static int __init pci_epf_test_init(void)
982 kpcitest_workqueue = alloc_workqueue("kpcitest",
983 WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
984 if (!kpcitest_workqueue) {
985 pr_err("Failed to allocate the kpcitest work queue\n");
989 ret = pci_epf_register_driver(&test_driver);
991 destroy_workqueue(kpcitest_workqueue);
992 pr_err("Failed to register pci epf test driver --> %d\n", ret);
998 module_init(pci_epf_test_init);
1000 static void __exit pci_epf_test_exit(void)
1002 if (kpcitest_workqueue)
1003 destroy_workqueue(kpcitest_workqueue);
1004 pci_epf_unregister_driver(&test_driver);
1006 module_exit(pci_epf_test_exit);
1008 MODULE_DESCRIPTION("PCI EPF TEST DRIVER");
1010 MODULE_LICENSE("GPL v2");