1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2023 Intel Corporation
8 #include "regulatory.h"
9 #include "fw/runtime.h"
12 #define GET_BIOS_TABLE(__name, ...) \
15 if (fwrt->uefi_tables_lock_status > UEFI_WIFI_GUID_UNLOCKED) \
16 ret = iwl_uefi_get_ ## __name(__VA_ARGS__); \
18 ret = iwl_acpi_get_ ## __name(__VA_ARGS__); \
22 #define IWL_BIOS_TABLE_LOADER(__name) \
23 int iwl_bios_get_ ## __name(struct iwl_fw_runtime *fwrt) \
24 {GET_BIOS_TABLE(__name, fwrt); } \
25 IWL_EXPORT_SYMBOL(iwl_bios_get_ ## __name)
27 #define IWL_BIOS_TABLE_LOADER_DATA(__name, data_type) \
28 int iwl_bios_get_ ## __name(struct iwl_fw_runtime *fwrt, \
30 {GET_BIOS_TABLE(__name, fwrt, data); } \
31 IWL_EXPORT_SYMBOL(iwl_bios_get_ ## __name)
33 IWL_BIOS_TABLE_LOADER(wrds_table);
34 IWL_BIOS_TABLE_LOADER(ewrd_table);
35 IWL_BIOS_TABLE_LOADER(wgds_table);
36 IWL_BIOS_TABLE_LOADER(ppag_table);
37 IWL_BIOS_TABLE_LOADER_DATA(tas_table, struct iwl_tas_data);
38 IWL_BIOS_TABLE_LOADER_DATA(pwr_limit, u64);
39 IWL_BIOS_TABLE_LOADER_DATA(mcc, char);
40 IWL_BIOS_TABLE_LOADER_DATA(eckv, u32);
43 static const struct dmi_system_id dmi_ppag_approved_list[] = {
46 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
51 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
56 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
61 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
64 { .ident = "GOOGLE-HP",
66 DMI_MATCH(DMI_SYS_VENDOR, "Google"),
67 DMI_MATCH(DMI_BOARD_VENDOR, "HP"),
70 { .ident = "GOOGLE-ASUS",
72 DMI_MATCH(DMI_SYS_VENDOR, "Google"),
73 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTek COMPUTER INC."),
76 { .ident = "GOOGLE-SAMSUNG",
78 DMI_MATCH(DMI_SYS_VENDOR, "Google"),
79 DMI_MATCH(DMI_BOARD_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
84 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
89 DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
94 DMI_MATCH(DMI_SYS_VENDOR, "Razer"),
99 DMI_MATCH(DMI_SYS_VENDOR, "HONOR"),
105 static const struct dmi_system_id dmi_tas_approved_list[] = {
108 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
111 { .ident = "SAMSUNG",
113 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
118 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
123 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
128 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
133 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
138 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
141 { .ident = "GOOGLE-HP",
143 DMI_MATCH(DMI_SYS_VENDOR, "Google"),
144 DMI_MATCH(DMI_BOARD_VENDOR, "HP"),
149 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."),
154 DMI_MATCH(DMI_SYS_VENDOR, "HONOR"),
161 bool iwl_sar_geo_support(struct iwl_fw_runtime *fwrt)
164 * The PER_CHAIN_LIMIT_OFFSET_CMD command is not supported on
165 * earlier firmware versions. Unfortunately, we don't have a
166 * TLV API flag to rely on, so rely on the major version which
167 * is in the first byte of ucode_ver. This was implemented
168 * initially on version 38 and then backported to 17. It was
169 * also backported to 29, but only for 7265D devices. The
170 * intention was to have it in 36 as well, but not all 8000
171 * family got this feature enabled. The 8000 family is the
172 * only one using version 36, so skip this version entirely.
174 return IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) >= 38 ||
175 (IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) == 17 &&
176 fwrt->trans->hw_rev != CSR_HW_REV_TYPE_3160) ||
177 (IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) == 29 &&
178 ((fwrt->trans->hw_rev & CSR_HW_REV_TYPE_MSK) ==
179 CSR_HW_REV_TYPE_7265D));
181 IWL_EXPORT_SYMBOL(iwl_sar_geo_support);
183 int iwl_sar_geo_fill_table(struct iwl_fw_runtime *fwrt,
184 struct iwl_per_chain_offset *table,
185 u32 n_bands, u32 n_profiles)
189 if (!fwrt->geo_enabled)
192 if (!iwl_sar_geo_support(fwrt))
195 for (i = 0; i < n_profiles; i++) {
196 for (j = 0; j < n_bands; j++) {
197 struct iwl_per_chain_offset *chain =
198 &table[i * n_bands + j];
200 chain->max_tx_power =
201 cpu_to_le16(fwrt->geo_profiles[i].bands[j].max);
203 fwrt->geo_profiles[i].bands[j].chains[0];
205 fwrt->geo_profiles[i].bands[j].chains[1];
206 IWL_DEBUG_RADIO(fwrt,
207 "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
209 fwrt->geo_profiles[i].bands[j].chains[0],
210 fwrt->geo_profiles[i].bands[j].chains[1],
211 fwrt->geo_profiles[i].bands[j].max);
217 IWL_EXPORT_SYMBOL(iwl_sar_geo_fill_table);
219 static int iwl_sar_fill_table(struct iwl_fw_runtime *fwrt,
220 __le16 *per_chain, u32 n_subbands,
221 int prof_a, int prof_b)
223 int profs[BIOS_SAR_NUM_CHAINS] = { prof_a, prof_b };
226 for (i = 0; i < BIOS_SAR_NUM_CHAINS; i++) {
227 struct iwl_sar_profile *prof;
229 /* don't allow SAR to be disabled (profile 0 means disable) */
233 /* we are off by one, so allow up to BIOS_SAR_MAX_PROFILE_NUM */
234 if (profs[i] > BIOS_SAR_MAX_PROFILE_NUM)
237 /* profiles go from 1 to 4, so decrement to access the array */
238 prof = &fwrt->sar_profiles[profs[i] - 1];
240 /* if the profile is disabled, do nothing */
241 if (!prof->enabled) {
242 IWL_DEBUG_RADIO(fwrt, "SAR profile %d is disabled.\n",
245 * if one of the profiles is disabled, we
246 * ignore all of them and return 1 to
247 * differentiate disabled from other failures.
253 "SAR EWRD: chain %d profile index %d\n",
255 IWL_DEBUG_RADIO(fwrt, " Chain[%d]:\n", i);
256 for (j = 0; j < n_subbands; j++) {
257 per_chain[i * n_subbands + j] =
258 cpu_to_le16(prof->chains[i].subbands[j]);
259 IWL_DEBUG_RADIO(fwrt, " Band[%d] = %d * .125dBm\n",
260 j, prof->chains[i].subbands[j]);
267 int iwl_sar_fill_profile(struct iwl_fw_runtime *fwrt,
268 __le16 *per_chain, u32 n_tables, u32 n_subbands,
269 int prof_a, int prof_b)
273 for (i = 0; i < n_tables; i++) {
274 ret = iwl_sar_fill_table(fwrt,
275 &per_chain[i * n_subbands * BIOS_SAR_NUM_CHAINS],
276 n_subbands, prof_a, prof_b);
283 IWL_EXPORT_SYMBOL(iwl_sar_fill_profile);
285 static bool iwl_ppag_value_valid(struct iwl_fw_runtime *fwrt, int chain,
288 s8 ppag_val = fwrt->ppag_chains[chain].subbands[subband];
291 (ppag_val > IWL_PPAG_MAX_LB || ppag_val < IWL_PPAG_MIN_LB)) ||
293 (ppag_val > IWL_PPAG_MAX_HB || ppag_val < IWL_PPAG_MIN_HB))) {
294 IWL_DEBUG_RADIO(fwrt, "Invalid PPAG value: %d\n", ppag_val);
300 int iwl_fill_ppag_table(struct iwl_fw_runtime *fwrt,
301 union iwl_ppag_table_cmd *cmd, int *cmd_size)
304 int i, j, num_sub_bands;
306 bool send_ppag_always;
308 /* many firmware images for JF lie about this */
309 if (CSR_HW_RFID_TYPE(fwrt->trans->hw_rf_id) ==
310 CSR_HW_RFID_TYPE(CSR_HW_RF_ID_TYPE_JF))
313 if (!fw_has_capa(&fwrt->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
314 IWL_DEBUG_RADIO(fwrt,
315 "PPAG capability not supported by FW, command not sent.\n");
319 cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
320 WIDE_ID(PHY_OPS_GROUP,
321 PER_PLATFORM_ANT_GAIN_CMD), 1);
323 * Starting from ver 4, driver needs to send the PPAG CMD regardless
324 * if PPAG is enabled/disabled or valid/invalid.
326 send_ppag_always = cmd_ver > 3;
328 /* Don't send PPAG if it is disabled */
329 if (!send_ppag_always && !fwrt->ppag_flags) {
330 IWL_DEBUG_RADIO(fwrt, "PPAG not enabled, command not sent.\n");
334 /* The 'flags' field is the same in v1 and in v2 so we can just
335 * use v1 to access it.
337 cmd->v1.flags = cpu_to_le32(fwrt->ppag_flags);
339 IWL_DEBUG_RADIO(fwrt, "PPAG cmd ver is %d\n", cmd_ver);
341 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
342 gain = cmd->v1.gain[0];
343 *cmd_size = sizeof(cmd->v1);
344 if (fwrt->ppag_ver >= 1) {
345 /* in this case FW supports revision 0 */
346 IWL_DEBUG_RADIO(fwrt,
347 "PPAG table rev is %d, send truncated table\n",
350 } else if (cmd_ver >= 2 && cmd_ver <= 5) {
351 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
352 gain = cmd->v2.gain[0];
353 *cmd_size = sizeof(cmd->v2);
354 if (fwrt->ppag_ver == 0) {
355 /* in this case FW supports revisions 1,2 or 3 */
356 IWL_DEBUG_RADIO(fwrt,
357 "PPAG table rev is 0, send padded table\n");
360 IWL_DEBUG_RADIO(fwrt, "Unsupported PPAG command version\n");
365 IWL_DEBUG_RADIO(fwrt,
366 "PPAG MODE bits were read from bios: %d\n",
367 le32_to_cpu(cmd->v1.flags));
370 cmd->v1.flags &= cpu_to_le32(IWL_PPAG_CMD_V5_MASK);
371 else if (cmd_ver < 5)
372 cmd->v1.flags &= cpu_to_le32(IWL_PPAG_CMD_V4_MASK);
375 !fw_has_capa(&fwrt->fw->ucode_capa,
376 IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT)) ||
377 (cmd_ver == 2 && fwrt->ppag_ver >= 2)) {
378 cmd->v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
379 IWL_DEBUG_RADIO(fwrt, "masking ppag China bit\n");
381 IWL_DEBUG_RADIO(fwrt, "isn't masking ppag China bit\n");
384 IWL_DEBUG_RADIO(fwrt,
385 "PPAG MODE bits going to be sent: %d\n",
386 le32_to_cpu(cmd->v1.flags));
388 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
389 for (j = 0; j < num_sub_bands; j++) {
390 if (!send_ppag_always &&
391 !iwl_ppag_value_valid(fwrt, i, j))
394 gain[i * num_sub_bands + j] =
395 fwrt->ppag_chains[i].subbands[j];
396 IWL_DEBUG_RADIO(fwrt,
397 "PPAG table: chain[%d] band[%d]: gain = %d\n",
398 i, j, gain[i * num_sub_bands + j]);
404 IWL_EXPORT_SYMBOL(iwl_fill_ppag_table);
406 bool iwl_is_ppag_approved(struct iwl_fw_runtime *fwrt)
408 if (!dmi_check_system(dmi_ppag_approved_list)) {
409 IWL_DEBUG_RADIO(fwrt,
410 "System vendor '%s' is not in the approved list, disabling PPAG.\n",
411 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
412 fwrt->ppag_flags = 0;
418 IWL_EXPORT_SYMBOL(iwl_is_ppag_approved);
420 bool iwl_is_tas_approved(void)
422 return dmi_check_system(dmi_tas_approved_list);
424 IWL_EXPORT_SYMBOL(iwl_is_tas_approved);
426 int iwl_parse_tas_selection(struct iwl_fw_runtime *fwrt,
427 struct iwl_tas_data *tas_data,
428 const u32 tas_selection)
430 u8 override_iec = u32_get_bits(tas_selection,
431 IWL_WTAS_OVERRIDE_IEC_MSK);
432 u8 enabled_iec = u32_get_bits(tas_selection, IWL_WTAS_ENABLE_IEC_MSK);
433 u8 usa_tas_uhb = u32_get_bits(tas_selection, IWL_WTAS_USA_UHB_MSK);
434 int enabled = tas_selection & IWL_WTAS_ENABLED_MSK;
436 IWL_DEBUG_RADIO(fwrt, "TAS selection as read from BIOS: 0x%x\n",
439 tas_data->usa_tas_uhb_allowed = usa_tas_uhb;
440 tas_data->override_tas_iec = override_iec;
441 tas_data->enable_tas_iec = enabled_iec;
446 __le32 iwl_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt)
450 __le32 config_bitmap = 0;
452 switch (CSR_HW_RFID_TYPE(fwrt->trans->hw_rf_id)) {
453 case IWL_CFG_RF_TYPE_HR1:
454 case IWL_CFG_RF_TYPE_HR2:
455 case IWL_CFG_RF_TYPE_JF1:
456 case IWL_CFG_RF_TYPE_JF2:
457 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_INDONESIA_5G2,
460 if (!ret && val == DSM_VALUE_INDONESIA_ENABLE)
462 cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK);
468 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_DISABLE_SRD, &val);
470 if (val == DSM_VALUE_SRD_PASSIVE)
472 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK);
473 else if (val == DSM_VALUE_SRD_DISABLE)
475 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK);
478 if (fw_has_capa(&fwrt->fw->ucode_capa,
479 IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT)) {
480 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_REGULATORY_CONFIG,
483 * China 2022 enable if the BIOS object does not exist or
484 * if it is enabled in BIOS.
486 if (ret < 0 || val & DSM_MASK_CHINA_22_REG)
488 cpu_to_le32(LARI_CONFIG_ENABLE_CHINA_22_REG_SUPPORT_MSK);
491 return config_bitmap;
493 IWL_EXPORT_SYMBOL(iwl_get_lari_config_bitmap);
495 int iwl_bios_get_dsm(struct iwl_fw_runtime *fwrt, enum iwl_dsm_funcs func,
498 GET_BIOS_TABLE(dsm, fwrt, func, value);
500 IWL_EXPORT_SYMBOL(iwl_bios_get_dsm);