]> Git Repo - J-linux.git/blob - drivers/net/phy/broadcom.c
Merge tag 'kbuild-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy...
[J-linux.git] / drivers / net / phy / broadcom.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *      drivers/net/phy/broadcom.c
4  *
5  *      Broadcom BCM5411, BCM5421 and BCM5461 Gigabit Ethernet
6  *      transceivers.
7  *
8  *      Copyright (c) 2006  Maciej W. Rozycki
9  *
10  *      Inspired by code written by Amy Fong.
11  */
12
13 #include "bcm-phy-lib.h"
14 #include <linux/delay.h>
15 #include <linux/module.h>
16 #include <linux/phy.h>
17 #include <linux/pm_wakeup.h>
18 #include <linux/brcmphy.h>
19 #include <linux/of.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
22 #include <linux/gpio/consumer.h>
23
24 #define BRCM_PHY_MODEL(phydev) \
25         ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
26
27 #define BRCM_PHY_REV(phydev) \
28         ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
29
30 MODULE_DESCRIPTION("Broadcom PHY driver");
31 MODULE_AUTHOR("Maciej W. Rozycki");
32 MODULE_LICENSE("GPL");
33
34 struct bcm54xx_phy_priv {
35         u64     *stats;
36         struct bcm_ptp_private *ptp;
37         int     wake_irq;
38         bool    wake_irq_enabled;
39 };
40
41 static bool bcm54xx_phy_can_wakeup(struct phy_device *phydev)
42 {
43         struct bcm54xx_phy_priv *priv = phydev->priv;
44
45         return phy_interrupt_is_valid(phydev) || priv->wake_irq >= 0;
46 }
47
48 static int bcm54xx_config_clock_delay(struct phy_device *phydev)
49 {
50         int rc, val;
51
52         /* handling PHY's internal RX clock delay */
53         val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
54         val |= MII_BCM54XX_AUXCTL_MISC_WREN;
55         if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||
56             phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
57                 /* Disable RGMII RXC-RXD skew */
58                 val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN;
59         }
60         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
61             phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
62                 /* Enable RGMII RXC-RXD skew */
63                 val |= MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN;
64         }
65         rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
66                                   val);
67         if (rc < 0)
68                 return rc;
69
70         /* handling PHY's internal TX clock delay */
71         val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL);
72         if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||
73             phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
74                 /* Disable internal TX clock delay */
75                 val &= ~BCM54810_SHD_CLK_CTL_GTXCLK_EN;
76         }
77         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
78             phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
79                 /* Enable internal TX clock delay */
80                 val |= BCM54810_SHD_CLK_CTL_GTXCLK_EN;
81         }
82         rc = bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val);
83         if (rc < 0)
84                 return rc;
85
86         return 0;
87 }
88
89 static int bcm54210e_config_init(struct phy_device *phydev)
90 {
91         int val;
92
93         bcm54xx_config_clock_delay(phydev);
94
95         if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) {
96                 val = phy_read(phydev, MII_CTRL1000);
97                 val |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER;
98                 phy_write(phydev, MII_CTRL1000, val);
99         }
100
101         return 0;
102 }
103
104 static int bcm54612e_config_init(struct phy_device *phydev)
105 {
106         int reg;
107
108         bcm54xx_config_clock_delay(phydev);
109
110         /* Enable CLK125 MUX on LED4 if ref clock is enabled. */
111         if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {
112                 int err;
113
114                 reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);
115                 err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,
116                                         BCM54612E_LED4_CLK125OUT_EN | reg);
117
118                 if (err < 0)
119                         return err;
120         }
121
122         return 0;
123 }
124
125 static int bcm54616s_config_init(struct phy_device *phydev)
126 {
127         int rc, val;
128
129         if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
130             phydev->interface != PHY_INTERFACE_MODE_1000BASEX)
131                 return 0;
132
133         /* Ensure proper interface mode is selected. */
134         /* Disable RGMII mode */
135         val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
136         if (val < 0)
137                 return val;
138         val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_EN;
139         val |= MII_BCM54XX_AUXCTL_MISC_WREN;
140         rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
141                                   val);
142         if (rc < 0)
143                 return rc;
144
145         /* Select 1000BASE-X register set (primary SerDes) */
146         val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);
147         if (val < 0)
148                 return val;
149         val |= BCM54XX_SHD_MODE_1000BX;
150         rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);
151         if (rc < 0)
152                 return rc;
153
154         /* Power down SerDes interface */
155         rc = phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN);
156         if (rc < 0)
157                 return rc;
158
159         /* Select proper interface mode */
160         val &= ~BCM54XX_SHD_INTF_SEL_MASK;
161         val |= phydev->interface == PHY_INTERFACE_MODE_SGMII ?
162                 BCM54XX_SHD_INTF_SEL_SGMII :
163                 BCM54XX_SHD_INTF_SEL_GBIC;
164         rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);
165         if (rc < 0)
166                 return rc;
167
168         /* Power up SerDes interface */
169         rc = phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
170         if (rc < 0)
171                 return rc;
172
173         /* Select copper register set */
174         val &= ~BCM54XX_SHD_MODE_1000BX;
175         rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);
176         if (rc < 0)
177                 return rc;
178
179         /* Power up copper interface */
180         return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);
181 }
182
183 /* Needs SMDSP clock enabled via bcm54xx_phydsp_config() */
184 static int bcm50610_a0_workaround(struct phy_device *phydev)
185 {
186         int err;
187
188         err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH0,
189                                 MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN |
190                                 MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF);
191         if (err < 0)
192                 return err;
193
194         err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH3,
195                                 MII_BCM54XX_EXP_AADJ1CH3_ADCCKADJ);
196         if (err < 0)
197                 return err;
198
199         err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75,
200                                 MII_BCM54XX_EXP_EXP75_VDACCTRL);
201         if (err < 0)
202                 return err;
203
204         err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP96,
205                                 MII_BCM54XX_EXP_EXP96_MYST);
206         if (err < 0)
207                 return err;
208
209         err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP97,
210                                 MII_BCM54XX_EXP_EXP97_MYST);
211
212         return err;
213 }
214
215 static int bcm54xx_phydsp_config(struct phy_device *phydev)
216 {
217         int err, err2;
218
219         /* Enable the SMDSP clock */
220         err = bcm54xx_auxctl_write(phydev,
221                                    MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL,
222                                    MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA |
223                                    MII_BCM54XX_AUXCTL_ACTL_TX_6DB);
224         if (err < 0)
225                 return err;
226
227         if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
228             BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) {
229                 /* Clear bit 9 to fix a phy interop issue. */
230                 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08,
231                                         MII_BCM54XX_EXP_EXP08_RJCT_2MHZ);
232                 if (err < 0)
233                         goto error;
234
235                 if (phydev->drv->phy_id == PHY_ID_BCM50610) {
236                         err = bcm50610_a0_workaround(phydev);
237                         if (err < 0)
238                                 goto error;
239                 }
240         }
241
242         if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM57780) {
243                 int val;
244
245                 val = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP75);
246                 if (val < 0)
247                         goto error;
248
249                 val |= MII_BCM54XX_EXP_EXP75_CM_OSC;
250                 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75, val);
251         }
252
253 error:
254         /* Disable the SMDSP clock */
255         err2 = bcm54xx_auxctl_write(phydev,
256                                     MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL,
257                                     MII_BCM54XX_AUXCTL_ACTL_TX_6DB);
258
259         /* Return the first error reported. */
260         return err ? err : err2;
261 }
262
263 static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
264 {
265         u32 orig;
266         int val;
267         bool clk125en = true;
268
269         /* Abort if we are using an untested phy. */
270         if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 &&
271             BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 &&
272             BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M &&
273             BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54210E &&
274             BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810 &&
275             BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811)
276                 return;
277
278         val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3);
279         if (val < 0)
280                 return;
281
282         orig = val;
283
284         if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
285              BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&
286             BRCM_PHY_REV(phydev) >= 0x3) {
287                 /*
288                  * Here, bit 0 _disables_ CLK125 when set.
289                  * This bit is set by default.
290                  */
291                 clk125en = false;
292         } else {
293                 if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) {
294                         if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) {
295                                 /* Here, bit 0 _enables_ CLK125 when set */
296                                 val &= ~BCM54XX_SHD_SCR3_DEF_CLK125;
297                         }
298                         clk125en = false;
299                 }
300         }
301
302         if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
303                 val &= ~BCM54XX_SHD_SCR3_DLLAPD_DIS;
304         else
305                 val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
306
307         if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) {
308                 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E ||
309                     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 ||
310                     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54811)
311                         val |= BCM54XX_SHD_SCR3_RXCTXC_DIS;
312                 else
313                         val |= BCM54XX_SHD_SCR3_TRDDAPD;
314         }
315
316         if (orig != val)
317                 bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val);
318
319         val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD);
320         if (val < 0)
321                 return;
322
323         orig = val;
324
325         if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
326                 val |= BCM54XX_SHD_APD_EN;
327         else
328                 val &= ~BCM54XX_SHD_APD_EN;
329
330         if (orig != val)
331                 bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val);
332 }
333
334 static void bcm54xx_ptp_stop(struct phy_device *phydev)
335 {
336         struct bcm54xx_phy_priv *priv = phydev->priv;
337
338         if (priv->ptp)
339                 bcm_ptp_stop(priv->ptp);
340 }
341
342 static void bcm54xx_ptp_config_init(struct phy_device *phydev)
343 {
344         struct bcm54xx_phy_priv *priv = phydev->priv;
345
346         if (priv->ptp)
347                 bcm_ptp_config_init(phydev);
348 }
349
350 static int bcm54xx_config_init(struct phy_device *phydev)
351 {
352         int reg, err, val;
353
354         reg = phy_read(phydev, MII_BCM54XX_ECR);
355         if (reg < 0)
356                 return reg;
357
358         /* Mask interrupts globally.  */
359         reg |= MII_BCM54XX_ECR_IM;
360         err = phy_write(phydev, MII_BCM54XX_ECR, reg);
361         if (err < 0)
362                 return err;
363
364         /* Unmask events we are interested in.  */
365         reg = ~(MII_BCM54XX_INT_DUPLEX |
366                 MII_BCM54XX_INT_SPEED |
367                 MII_BCM54XX_INT_LINK);
368         err = phy_write(phydev, MII_BCM54XX_IMR, reg);
369         if (err < 0)
370                 return err;
371
372         if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
373              BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&
374             (phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE))
375                 bcm_phy_write_shadow(phydev, BCM54XX_SHD_RGMII_MODE, 0);
376
377         bcm54xx_adjust_rxrefclk(phydev);
378
379         switch (BRCM_PHY_MODEL(phydev)) {
380         case PHY_ID_BCM50610:
381         case PHY_ID_BCM50610M:
382                 err = bcm54xx_config_clock_delay(phydev);
383                 break;
384         case PHY_ID_BCM54210E:
385                 err = bcm54210e_config_init(phydev);
386                 break;
387         case PHY_ID_BCM54612E:
388                 err = bcm54612e_config_init(phydev);
389                 break;
390         case PHY_ID_BCM54616S:
391                 err = bcm54616s_config_init(phydev);
392                 break;
393         case PHY_ID_BCM54810:
394                 /* For BCM54810, we need to disable BroadR-Reach function */
395                 val = bcm_phy_read_exp(phydev,
396                                        BCM54810_EXP_BROADREACH_LRE_MISC_CTL);
397                 val &= ~BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN;
398                 err = bcm_phy_write_exp(phydev,
399                                         BCM54810_EXP_BROADREACH_LRE_MISC_CTL,
400                                         val);
401                 break;
402         }
403         if (err)
404                 return err;
405
406         bcm54xx_phydsp_config(phydev);
407
408         /* For non-SFP setups, encode link speed into LED1 and LED3 pair
409          * (green/amber).
410          * Also flash these two LEDs on activity. This means configuring
411          * them for MULTICOLOR and encoding link/activity into them.
412          * Don't do this for devices on an SFP module, since some of these
413          * use the LED outputs to control the SFP LOS signal, and changing
414          * these settings will cause LOS to malfunction.
415          */
416         if (!phy_on_sfp(phydev)) {
417                 val = BCM54XX_SHD_LEDS1_LED1(BCM_LED_SRC_MULTICOLOR1) |
418                         BCM54XX_SHD_LEDS1_LED3(BCM_LED_SRC_MULTICOLOR1);
419                 bcm_phy_write_shadow(phydev, BCM54XX_SHD_LEDS1, val);
420
421                 val = BCM_LED_MULTICOLOR_IN_PHASE |
422                         BCM54XX_SHD_LEDS1_LED1(BCM_LED_MULTICOLOR_LINK_ACT) |
423                         BCM54XX_SHD_LEDS1_LED3(BCM_LED_MULTICOLOR_LINK_ACT);
424                 bcm_phy_write_exp(phydev, BCM_EXP_MULTICOLOR, val);
425         }
426
427         bcm54xx_ptp_config_init(phydev);
428
429         /* Acknowledge any left over interrupt and charge the device for
430          * wake-up.
431          */
432         err = bcm_phy_read_exp(phydev, BCM54XX_WOL_INT_STATUS);
433         if (err < 0)
434                 return err;
435
436         if (err)
437                 pm_wakeup_event(&phydev->mdio.dev, 0);
438
439         return 0;
440 }
441
442 static int bcm54xx_iddq_set(struct phy_device *phydev, bool enable)
443 {
444         int ret = 0;
445
446         if (!(phydev->dev_flags & PHY_BRCM_IDDQ_SUSPEND))
447                 return ret;
448
449         ret = bcm_phy_read_exp(phydev, BCM54XX_TOP_MISC_IDDQ_CTRL);
450         if (ret < 0)
451                 goto out;
452
453         if (enable)
454                 ret |= BCM54XX_TOP_MISC_IDDQ_SR | BCM54XX_TOP_MISC_IDDQ_LP;
455         else
456                 ret &= ~(BCM54XX_TOP_MISC_IDDQ_SR | BCM54XX_TOP_MISC_IDDQ_LP);
457
458         ret = bcm_phy_write_exp(phydev, BCM54XX_TOP_MISC_IDDQ_CTRL, ret);
459 out:
460         return ret;
461 }
462
463 static int bcm54xx_set_wakeup_irq(struct phy_device *phydev, bool state)
464 {
465         struct bcm54xx_phy_priv *priv = phydev->priv;
466         int ret = 0;
467
468         if (!bcm54xx_phy_can_wakeup(phydev))
469                 return ret;
470
471         if (priv->wake_irq_enabled != state) {
472                 if (state)
473                         ret = enable_irq_wake(priv->wake_irq);
474                 else
475                         ret = disable_irq_wake(priv->wake_irq);
476                 priv->wake_irq_enabled = state;
477         }
478
479         return ret;
480 }
481
482 static int bcm54xx_suspend(struct phy_device *phydev)
483 {
484         int ret = 0;
485
486         bcm54xx_ptp_stop(phydev);
487
488         /* Acknowledge any Wake-on-LAN interrupt prior to suspend */
489         ret = bcm_phy_read_exp(phydev, BCM54XX_WOL_INT_STATUS);
490         if (ret < 0)
491                 return ret;
492
493         if (phydev->wol_enabled)
494                 return bcm54xx_set_wakeup_irq(phydev, true);
495
496         /* We cannot use a read/modify/write here otherwise the PHY gets into
497          * a bad state where its LEDs keep flashing, thus defeating the purpose
498          * of low power mode.
499          */
500         ret = phy_write(phydev, MII_BMCR, BMCR_PDOWN);
501         if (ret < 0)
502                 return ret;
503
504         return bcm54xx_iddq_set(phydev, true);
505 }
506
507 static int bcm54xx_resume(struct phy_device *phydev)
508 {
509         int ret = 0;
510
511         if (phydev->wol_enabled) {
512                 ret = bcm54xx_set_wakeup_irq(phydev, false);
513                 if (ret)
514                         return ret;
515         }
516
517         ret = bcm54xx_iddq_set(phydev, false);
518         if (ret < 0)
519                 return ret;
520
521         /* Writes to register other than BMCR would be ignored
522          * unless we clear the PDOWN bit first
523          */
524         ret = genphy_resume(phydev);
525         if (ret < 0)
526                 return ret;
527
528         /* Upon exiting power down, the PHY remains in an internal reset state
529          * for 40us
530          */
531         fsleep(40);
532
533         /* Issue a soft reset after clearing the power down bit
534          * and before doing any other configuration.
535          */
536         if (phydev->dev_flags & PHY_BRCM_IDDQ_SUSPEND) {
537                 ret = genphy_soft_reset(phydev);
538                 if (ret < 0)
539                         return ret;
540         }
541
542         return bcm54xx_config_init(phydev);
543 }
544
545 static int bcm54810_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
546 {
547         return -EOPNOTSUPP;
548 }
549
550 static int bcm54810_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
551                               u16 val)
552 {
553         return -EOPNOTSUPP;
554 }
555
556 static int bcm54811_config_init(struct phy_device *phydev)
557 {
558         int err, reg;
559
560         /* Disable BroadR-Reach function. */
561         reg = bcm_phy_read_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL);
562         reg &= ~BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN;
563         err = bcm_phy_write_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL,
564                                 reg);
565         if (err < 0)
566                 return err;
567
568         err = bcm54xx_config_init(phydev);
569
570         /* Enable CLK125 MUX on LED4 if ref clock is enabled. */
571         if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {
572                 reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);
573                 err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,
574                                         BCM54612E_LED4_CLK125OUT_EN | reg);
575                 if (err < 0)
576                         return err;
577         }
578
579         return err;
580 }
581
582 static int bcm5481_config_aneg(struct phy_device *phydev)
583 {
584         struct device_node *np = phydev->mdio.dev.of_node;
585         int ret;
586
587         /* Aneg firstly. */
588         ret = genphy_config_aneg(phydev);
589
590         /* Then we can set up the delay. */
591         bcm54xx_config_clock_delay(phydev);
592
593         if (of_property_read_bool(np, "enet-phy-lane-swap")) {
594                 /* Lane Swap - Undocumented register...magic! */
595                 ret = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_SEL_ER + 0x9,
596                                         0x11B);
597                 if (ret < 0)
598                         return ret;
599         }
600
601         return ret;
602 }
603
604 struct bcm54616s_phy_priv {
605         bool mode_1000bx_en;
606 };
607
608 static int bcm54616s_probe(struct phy_device *phydev)
609 {
610         struct bcm54616s_phy_priv *priv;
611         int val;
612
613         priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
614         if (!priv)
615                 return -ENOMEM;
616
617         phydev->priv = priv;
618
619         val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);
620         if (val < 0)
621                 return val;
622
623         /* The PHY is strapped in RGMII-fiber mode when INTERF_SEL[1:0]
624          * is 01b, and the link between PHY and its link partner can be
625          * either 1000Base-X or 100Base-FX.
626          * RGMII-1000Base-X is properly supported, but RGMII-100Base-FX
627          * support is still missing as of now.
628          */
629         if ((val & BCM54XX_SHD_INTF_SEL_MASK) == BCM54XX_SHD_INTF_SEL_RGMII) {
630                 val = bcm_phy_read_shadow(phydev, BCM54616S_SHD_100FX_CTRL);
631                 if (val < 0)
632                         return val;
633
634                 /* Bit 0 of the SerDes 100-FX Control register, when set
635                  * to 1, sets the MII/RGMII -> 100BASE-FX configuration.
636                  * When this bit is set to 0, it sets the GMII/RGMII ->
637                  * 1000BASE-X configuration.
638                  */
639                 if (!(val & BCM54616S_100FX_MODE))
640                         priv->mode_1000bx_en = true;
641
642                 phydev->port = PORT_FIBRE;
643         }
644
645         return 0;
646 }
647
648 static int bcm54616s_config_aneg(struct phy_device *phydev)
649 {
650         struct bcm54616s_phy_priv *priv = phydev->priv;
651         int ret;
652
653         /* Aneg firstly. */
654         if (priv->mode_1000bx_en)
655                 ret = genphy_c37_config_aneg(phydev);
656         else
657                 ret = genphy_config_aneg(phydev);
658
659         /* Then we can set up the delay. */
660         bcm54xx_config_clock_delay(phydev);
661
662         return ret;
663 }
664
665 static int bcm54616s_read_status(struct phy_device *phydev)
666 {
667         struct bcm54616s_phy_priv *priv = phydev->priv;
668         bool changed;
669         int err;
670
671         if (priv->mode_1000bx_en)
672                 err = genphy_c37_read_status(phydev, &changed);
673         else
674                 err = genphy_read_status(phydev);
675
676         return err;
677 }
678
679 static int brcm_fet_config_init(struct phy_device *phydev)
680 {
681         int reg, err, err2, brcmtest;
682
683         /* Reset the PHY to bring it to a known state. */
684         err = phy_write(phydev, MII_BMCR, BMCR_RESET);
685         if (err < 0)
686                 return err;
687
688         /* The datasheet indicates the PHY needs up to 1us to complete a reset,
689          * build some slack here.
690          */
691         usleep_range(1000, 2000);
692
693         /* The PHY requires 65 MDC clock cycles to complete a write operation
694          * and turnaround the line properly.
695          *
696          * We ignore -EIO here as the MDIO controller (e.g.: mdio-bcm-unimac)
697          * may flag the lack of turn-around as a read failure. This is
698          * particularly true with this combination since the MDIO controller
699          * only used 64 MDC cycles. This is not a critical failure in this
700          * specific case and it has no functional impact otherwise, so we let
701          * that one go through. If there is a genuine bus error, the next read
702          * of MII_BRCM_FET_INTREG will error out.
703          */
704         err = phy_read(phydev, MII_BMCR);
705         if (err < 0 && err != -EIO)
706                 return err;
707
708         /* Read to clear status bits */
709         reg = phy_read(phydev, MII_BRCM_FET_INTREG);
710         if (reg < 0)
711                 return reg;
712
713         /* Unmask events we are interested in and mask interrupts globally. */
714         if (phydev->phy_id == PHY_ID_BCM5221)
715                 reg = MII_BRCM_FET_IR_ENABLE |
716                       MII_BRCM_FET_IR_MASK;
717         else
718                 reg = MII_BRCM_FET_IR_DUPLEX_EN |
719                       MII_BRCM_FET_IR_SPEED_EN |
720                       MII_BRCM_FET_IR_LINK_EN |
721                       MII_BRCM_FET_IR_ENABLE |
722                       MII_BRCM_FET_IR_MASK;
723
724         err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);
725         if (err < 0)
726                 return err;
727
728         /* Enable shadow register access */
729         brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST);
730         if (brcmtest < 0)
731                 return brcmtest;
732
733         reg = brcmtest | MII_BRCM_FET_BT_SRE;
734
735         phy_lock_mdio_bus(phydev);
736
737         err = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);
738         if (err < 0) {
739                 phy_unlock_mdio_bus(phydev);
740                 return err;
741         }
742
743         if (phydev->phy_id != PHY_ID_BCM5221) {
744                 /* Set the LED mode */
745                 reg = __phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4);
746                 if (reg < 0) {
747                         err = reg;
748                         goto done;
749                 }
750
751                 err = __phy_modify(phydev, MII_BRCM_FET_SHDW_AUXMODE4,
752                                    MII_BRCM_FET_SHDW_AM4_LED_MASK,
753                                    MII_BRCM_FET_SHDW_AM4_LED_MODE1);
754                 if (err < 0)
755                         goto done;
756
757                 /* Enable auto MDIX */
758                 err = __phy_set_bits(phydev, MII_BRCM_FET_SHDW_MISCCTRL,
759                                      MII_BRCM_FET_SHDW_MC_FAME);
760                 if (err < 0)
761                         goto done;
762         }
763
764         if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) {
765                 /* Enable auto power down */
766                 err = __phy_set_bits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2,
767                                      MII_BRCM_FET_SHDW_AS2_APDE);
768         }
769
770 done:
771         /* Disable shadow register access */
772         err2 = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);
773         if (!err)
774                 err = err2;
775
776         phy_unlock_mdio_bus(phydev);
777
778         return err;
779 }
780
781 static int brcm_fet_ack_interrupt(struct phy_device *phydev)
782 {
783         int reg;
784
785         /* Clear pending interrupts.  */
786         reg = phy_read(phydev, MII_BRCM_FET_INTREG);
787         if (reg < 0)
788                 return reg;
789
790         return 0;
791 }
792
793 static int brcm_fet_config_intr(struct phy_device *phydev)
794 {
795         int reg, err;
796
797         reg = phy_read(phydev, MII_BRCM_FET_INTREG);
798         if (reg < 0)
799                 return reg;
800
801         if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
802                 err = brcm_fet_ack_interrupt(phydev);
803                 if (err)
804                         return err;
805
806                 reg &= ~MII_BRCM_FET_IR_MASK;
807                 err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);
808         } else {
809                 reg |= MII_BRCM_FET_IR_MASK;
810                 err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);
811                 if (err)
812                         return err;
813
814                 err = brcm_fet_ack_interrupt(phydev);
815         }
816
817         return err;
818 }
819
820 static irqreturn_t brcm_fet_handle_interrupt(struct phy_device *phydev)
821 {
822         int irq_status;
823
824         irq_status = phy_read(phydev, MII_BRCM_FET_INTREG);
825         if (irq_status < 0) {
826                 phy_error(phydev);
827                 return IRQ_NONE;
828         }
829
830         if (irq_status == 0)
831                 return IRQ_NONE;
832
833         phy_trigger_machine(phydev);
834
835         return IRQ_HANDLED;
836 }
837
838 static int brcm_fet_suspend(struct phy_device *phydev)
839 {
840         int reg, err, err2, brcmtest;
841
842         /* We cannot use a read/modify/write here otherwise the PHY continues
843          * to drive LEDs which defeats the purpose of low power mode.
844          */
845         err = phy_write(phydev, MII_BMCR, BMCR_PDOWN);
846         if (err < 0)
847                 return err;
848
849         /* Enable shadow register access */
850         brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST);
851         if (brcmtest < 0)
852                 return brcmtest;
853
854         reg = brcmtest | MII_BRCM_FET_BT_SRE;
855
856         phy_lock_mdio_bus(phydev);
857
858         err = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);
859         if (err < 0) {
860                 phy_unlock_mdio_bus(phydev);
861                 return err;
862         }
863
864         if (phydev->phy_id == PHY_ID_BCM5221)
865                 /* Force Low Power Mode with clock enabled */
866                 reg = BCM5221_SHDW_AM4_EN_CLK_LPM | BCM5221_SHDW_AM4_FORCE_LPM;
867         else
868                 /* Set standby mode */
869                 reg = MII_BRCM_FET_SHDW_AM4_STANDBY;
870
871         err = __phy_set_bits(phydev, MII_BRCM_FET_SHDW_AUXMODE4, reg);
872
873         /* Disable shadow register access */
874         err2 = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);
875         if (!err)
876                 err = err2;
877
878         phy_unlock_mdio_bus(phydev);
879
880         return err;
881 }
882
883 static int bcm5221_config_aneg(struct phy_device *phydev)
884 {
885         int ret, val;
886
887         ret = genphy_config_aneg(phydev);
888         if (ret)
889                 return ret;
890
891         switch (phydev->mdix_ctrl) {
892         case ETH_TP_MDI:
893                 val = BCM5221_AEGSR_MDIX_DIS;
894                 break;
895         case ETH_TP_MDI_X:
896                 val = BCM5221_AEGSR_MDIX_DIS | BCM5221_AEGSR_MDIX_MAN_SWAP;
897                 break;
898         case ETH_TP_MDI_AUTO:
899                 val = 0;
900                 break;
901         default:
902                 return 0;
903         }
904
905         return phy_modify(phydev, BCM5221_AEGSR, BCM5221_AEGSR_MDIX_MAN_SWAP |
906                                                  BCM5221_AEGSR_MDIX_DIS,
907                                                  val);
908 }
909
910 static int bcm5221_read_status(struct phy_device *phydev)
911 {
912         int ret;
913
914         /* Read MDIX status */
915         ret = phy_read(phydev, BCM5221_AEGSR);
916         if (ret < 0)
917                 return ret;
918
919         if (ret & BCM5221_AEGSR_MDIX_DIS) {
920                 if (ret & BCM5221_AEGSR_MDIX_MAN_SWAP)
921                         phydev->mdix_ctrl = ETH_TP_MDI_X;
922                 else
923                         phydev->mdix_ctrl = ETH_TP_MDI;
924         } else {
925                 phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
926         }
927
928         if (ret & BCM5221_AEGSR_MDIX_STATUS)
929                 phydev->mdix = ETH_TP_MDI_X;
930         else
931                 phydev->mdix = ETH_TP_MDI;
932
933         return genphy_read_status(phydev);
934 }
935
936 static void bcm54xx_phy_get_wol(struct phy_device *phydev,
937                                 struct ethtool_wolinfo *wol)
938 {
939         /* We cannot wake-up if we do not have a dedicated PHY interrupt line
940          * or an out of band GPIO descriptor for wake-up. Zeroing
941          * wol->supported allows the caller (MAC driver) to play through and
942          * offer its own Wake-on-LAN scheme if available.
943          */
944         if (!bcm54xx_phy_can_wakeup(phydev)) {
945                 wol->supported = 0;
946                 return;
947         }
948
949         bcm_phy_get_wol(phydev, wol);
950 }
951
952 static int bcm54xx_phy_set_wol(struct phy_device *phydev,
953                                struct ethtool_wolinfo *wol)
954 {
955         int ret;
956
957         /* We cannot wake-up if we do not have a dedicated PHY interrupt line
958          * or an out of band GPIO descriptor for wake-up. Returning -EOPNOTSUPP
959          * allows the caller (MAC driver) to play through and offer its own
960          * Wake-on-LAN scheme if available.
961          */
962         if (!bcm54xx_phy_can_wakeup(phydev))
963                 return -EOPNOTSUPP;
964
965         ret = bcm_phy_set_wol(phydev, wol);
966         if (ret < 0)
967                 return ret;
968
969         return 0;
970 }
971
972 static int bcm54xx_phy_probe(struct phy_device *phydev)
973 {
974         struct bcm54xx_phy_priv *priv;
975         struct gpio_desc *wakeup_gpio;
976         int ret = 0;
977
978         priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
979         if (!priv)
980                 return -ENOMEM;
981
982         priv->wake_irq = -ENXIO;
983
984         phydev->priv = priv;
985
986         priv->stats = devm_kcalloc(&phydev->mdio.dev,
987                                    bcm_phy_get_sset_count(phydev), sizeof(u64),
988                                    GFP_KERNEL);
989         if (!priv->stats)
990                 return -ENOMEM;
991
992         priv->ptp = bcm_ptp_probe(phydev);
993         if (IS_ERR(priv->ptp))
994                 return PTR_ERR(priv->ptp);
995
996         /* We cannot utilize the _optional variant here since we want to know
997          * whether the GPIO descriptor exists or not to advertise Wake-on-LAN
998          * support or not.
999          */
1000         wakeup_gpio = devm_gpiod_get(&phydev->mdio.dev, "wakeup", GPIOD_IN);
1001         if (PTR_ERR(wakeup_gpio) == -EPROBE_DEFER)
1002                 return PTR_ERR(wakeup_gpio);
1003
1004         if (!IS_ERR(wakeup_gpio)) {
1005                 priv->wake_irq = gpiod_to_irq(wakeup_gpio);
1006
1007                 /* Dummy interrupt handler which is not enabled but is provided
1008                  * in order for the interrupt descriptor to be fully set-up.
1009                  */
1010                 ret = devm_request_irq(&phydev->mdio.dev, priv->wake_irq,
1011                                        bcm_phy_wol_isr,
1012                                        IRQF_TRIGGER_LOW | IRQF_NO_AUTOEN,
1013                                        dev_name(&phydev->mdio.dev), phydev);
1014                 if (ret)
1015                         return ret;
1016         }
1017
1018         /* If we do not have a main interrupt or a side-band wake-up interrupt,
1019          * then the device cannot be marked as wake-up capable.
1020          */
1021         if (!bcm54xx_phy_can_wakeup(phydev))
1022                 return 0;
1023
1024         return device_init_wakeup(&phydev->mdio.dev, true);
1025 }
1026
1027 static void bcm54xx_get_stats(struct phy_device *phydev,
1028                               struct ethtool_stats *stats, u64 *data)
1029 {
1030         struct bcm54xx_phy_priv *priv = phydev->priv;
1031
1032         bcm_phy_get_stats(phydev, priv->stats, stats, data);
1033 }
1034
1035 static void bcm54xx_link_change_notify(struct phy_device *phydev)
1036 {
1037         u16 mask = MII_BCM54XX_EXP_EXP08_EARLY_DAC_WAKE |
1038                    MII_BCM54XX_EXP_EXP08_FORCE_DAC_WAKE;
1039         int ret;
1040
1041         if (phydev->state != PHY_RUNNING)
1042                 return;
1043
1044         /* Don't change the DAC wake settings if auto power down
1045          * is not requested.
1046          */
1047         if (!(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
1048                 return;
1049
1050         ret = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP08);
1051         if (ret < 0)
1052                 return;
1053
1054         /* Enable/disable 10BaseT auto and forced early DAC wake depending
1055          * on the negotiated speed, those settings should only be done
1056          * for 10Mbits/sec.
1057          */
1058         if (phydev->speed == SPEED_10)
1059                 ret |= mask;
1060         else
1061                 ret &= ~mask;
1062         bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08, ret);
1063 }
1064
1065 static struct phy_driver broadcom_drivers[] = {
1066 {
1067         .phy_id         = PHY_ID_BCM5411,
1068         .phy_id_mask    = 0xfffffff0,
1069         .name           = "Broadcom BCM5411",
1070         /* PHY_GBIT_FEATURES */
1071         .get_sset_count = bcm_phy_get_sset_count,
1072         .get_strings    = bcm_phy_get_strings,
1073         .get_stats      = bcm54xx_get_stats,
1074         .probe          = bcm54xx_phy_probe,
1075         .config_init    = bcm54xx_config_init,
1076         .config_intr    = bcm_phy_config_intr,
1077         .handle_interrupt = bcm_phy_handle_interrupt,
1078         .link_change_notify     = bcm54xx_link_change_notify,
1079 }, {
1080         .phy_id         = PHY_ID_BCM5421,
1081         .phy_id_mask    = 0xfffffff0,
1082         .name           = "Broadcom BCM5421",
1083         /* PHY_GBIT_FEATURES */
1084         .get_sset_count = bcm_phy_get_sset_count,
1085         .get_strings    = bcm_phy_get_strings,
1086         .get_stats      = bcm54xx_get_stats,
1087         .probe          = bcm54xx_phy_probe,
1088         .config_init    = bcm54xx_config_init,
1089         .config_intr    = bcm_phy_config_intr,
1090         .handle_interrupt = bcm_phy_handle_interrupt,
1091         .link_change_notify     = bcm54xx_link_change_notify,
1092 }, {
1093         .phy_id         = PHY_ID_BCM54210E,
1094         .phy_id_mask    = 0xfffffff0,
1095         .name           = "Broadcom BCM54210E",
1096         /* PHY_GBIT_FEATURES */
1097         .flags          = PHY_ALWAYS_CALL_SUSPEND,
1098         .get_sset_count = bcm_phy_get_sset_count,
1099         .get_strings    = bcm_phy_get_strings,
1100         .get_stats      = bcm54xx_get_stats,
1101         .probe          = bcm54xx_phy_probe,
1102         .config_init    = bcm54xx_config_init,
1103         .config_intr    = bcm_phy_config_intr,
1104         .handle_interrupt = bcm_phy_handle_interrupt,
1105         .link_change_notify     = bcm54xx_link_change_notify,
1106         .suspend        = bcm54xx_suspend,
1107         .resume         = bcm54xx_resume,
1108         .get_wol        = bcm54xx_phy_get_wol,
1109         .set_wol        = bcm54xx_phy_set_wol,
1110         .led_brightness_set     = bcm_phy_led_brightness_set,
1111 }, {
1112         .phy_id         = PHY_ID_BCM5461,
1113         .phy_id_mask    = 0xfffffff0,
1114         .name           = "Broadcom BCM5461",
1115         /* PHY_GBIT_FEATURES */
1116         .get_sset_count = bcm_phy_get_sset_count,
1117         .get_strings    = bcm_phy_get_strings,
1118         .get_stats      = bcm54xx_get_stats,
1119         .probe          = bcm54xx_phy_probe,
1120         .config_init    = bcm54xx_config_init,
1121         .config_intr    = bcm_phy_config_intr,
1122         .handle_interrupt = bcm_phy_handle_interrupt,
1123         .link_change_notify     = bcm54xx_link_change_notify,
1124         .led_brightness_set     = bcm_phy_led_brightness_set,
1125 }, {
1126         .phy_id         = PHY_ID_BCM54612E,
1127         .phy_id_mask    = 0xfffffff0,
1128         .name           = "Broadcom BCM54612E",
1129         /* PHY_GBIT_FEATURES */
1130         .get_sset_count = bcm_phy_get_sset_count,
1131         .get_strings    = bcm_phy_get_strings,
1132         .get_stats      = bcm54xx_get_stats,
1133         .probe          = bcm54xx_phy_probe,
1134         .config_init    = bcm54xx_config_init,
1135         .config_intr    = bcm_phy_config_intr,
1136         .handle_interrupt = bcm_phy_handle_interrupt,
1137         .link_change_notify     = bcm54xx_link_change_notify,
1138         .led_brightness_set     = bcm_phy_led_brightness_set,
1139         .suspend        = bcm54xx_suspend,
1140         .resume         = bcm54xx_resume,
1141 }, {
1142         .phy_id         = PHY_ID_BCM54616S,
1143         .phy_id_mask    = 0xfffffff0,
1144         .name           = "Broadcom BCM54616S",
1145         /* PHY_GBIT_FEATURES */
1146         .soft_reset     = genphy_soft_reset,
1147         .config_init    = bcm54xx_config_init,
1148         .config_aneg    = bcm54616s_config_aneg,
1149         .config_intr    = bcm_phy_config_intr,
1150         .handle_interrupt = bcm_phy_handle_interrupt,
1151         .read_status    = bcm54616s_read_status,
1152         .probe          = bcm54616s_probe,
1153         .link_change_notify     = bcm54xx_link_change_notify,
1154         .led_brightness_set     = bcm_phy_led_brightness_set,
1155 }, {
1156         .phy_id         = PHY_ID_BCM5464,
1157         .phy_id_mask    = 0xfffffff0,
1158         .name           = "Broadcom BCM5464",
1159         /* PHY_GBIT_FEATURES */
1160         .get_sset_count = bcm_phy_get_sset_count,
1161         .get_strings    = bcm_phy_get_strings,
1162         .get_stats      = bcm54xx_get_stats,
1163         .probe          = bcm54xx_phy_probe,
1164         .config_init    = bcm54xx_config_init,
1165         .config_intr    = bcm_phy_config_intr,
1166         .handle_interrupt = bcm_phy_handle_interrupt,
1167         .suspend        = genphy_suspend,
1168         .resume         = genphy_resume,
1169         .link_change_notify     = bcm54xx_link_change_notify,
1170         .led_brightness_set     = bcm_phy_led_brightness_set,
1171 }, {
1172         .phy_id         = PHY_ID_BCM5481,
1173         .phy_id_mask    = 0xfffffff0,
1174         .name           = "Broadcom BCM5481",
1175         /* PHY_GBIT_FEATURES */
1176         .get_sset_count = bcm_phy_get_sset_count,
1177         .get_strings    = bcm_phy_get_strings,
1178         .get_stats      = bcm54xx_get_stats,
1179         .probe          = bcm54xx_phy_probe,
1180         .config_init    = bcm54xx_config_init,
1181         .config_aneg    = bcm5481_config_aneg,
1182         .config_intr    = bcm_phy_config_intr,
1183         .handle_interrupt = bcm_phy_handle_interrupt,
1184         .link_change_notify     = bcm54xx_link_change_notify,
1185         .led_brightness_set     = bcm_phy_led_brightness_set,
1186 }, {
1187         .phy_id         = PHY_ID_BCM54810,
1188         .phy_id_mask    = 0xfffffff0,
1189         .name           = "Broadcom BCM54810",
1190         /* PHY_GBIT_FEATURES */
1191         .get_sset_count = bcm_phy_get_sset_count,
1192         .get_strings    = bcm_phy_get_strings,
1193         .get_stats      = bcm54xx_get_stats,
1194         .probe          = bcm54xx_phy_probe,
1195         .read_mmd       = bcm54810_read_mmd,
1196         .write_mmd      = bcm54810_write_mmd,
1197         .config_init    = bcm54xx_config_init,
1198         .config_aneg    = bcm5481_config_aneg,
1199         .config_intr    = bcm_phy_config_intr,
1200         .handle_interrupt = bcm_phy_handle_interrupt,
1201         .suspend        = bcm54xx_suspend,
1202         .resume         = bcm54xx_resume,
1203         .link_change_notify     = bcm54xx_link_change_notify,
1204         .led_brightness_set     = bcm_phy_led_brightness_set,
1205 }, {
1206         .phy_id         = PHY_ID_BCM54811,
1207         .phy_id_mask    = 0xfffffff0,
1208         .name           = "Broadcom BCM54811",
1209         /* PHY_GBIT_FEATURES */
1210         .get_sset_count = bcm_phy_get_sset_count,
1211         .get_strings    = bcm_phy_get_strings,
1212         .get_stats      = bcm54xx_get_stats,
1213         .probe          = bcm54xx_phy_probe,
1214         .config_init    = bcm54811_config_init,
1215         .config_aneg    = bcm5481_config_aneg,
1216         .config_intr    = bcm_phy_config_intr,
1217         .handle_interrupt = bcm_phy_handle_interrupt,
1218         .suspend        = bcm54xx_suspend,
1219         .resume         = bcm54xx_resume,
1220         .link_change_notify     = bcm54xx_link_change_notify,
1221         .led_brightness_set     = bcm_phy_led_brightness_set,
1222 }, {
1223         .phy_id         = PHY_ID_BCM5482,
1224         .phy_id_mask    = 0xfffffff0,
1225         .name           = "Broadcom BCM5482",
1226         /* PHY_GBIT_FEATURES */
1227         .get_sset_count = bcm_phy_get_sset_count,
1228         .get_strings    = bcm_phy_get_strings,
1229         .get_stats      = bcm54xx_get_stats,
1230         .probe          = bcm54xx_phy_probe,
1231         .config_init    = bcm54xx_config_init,
1232         .config_intr    = bcm_phy_config_intr,
1233         .handle_interrupt = bcm_phy_handle_interrupt,
1234         .link_change_notify     = bcm54xx_link_change_notify,
1235         .led_brightness_set     = bcm_phy_led_brightness_set,
1236 }, {
1237         .phy_id         = PHY_ID_BCM50610,
1238         .phy_id_mask    = 0xfffffff0,
1239         .name           = "Broadcom BCM50610",
1240         /* PHY_GBIT_FEATURES */
1241         .get_sset_count = bcm_phy_get_sset_count,
1242         .get_strings    = bcm_phy_get_strings,
1243         .get_stats      = bcm54xx_get_stats,
1244         .probe          = bcm54xx_phy_probe,
1245         .config_init    = bcm54xx_config_init,
1246         .config_intr    = bcm_phy_config_intr,
1247         .handle_interrupt = bcm_phy_handle_interrupt,
1248         .link_change_notify     = bcm54xx_link_change_notify,
1249         .suspend        = bcm54xx_suspend,
1250         .resume         = bcm54xx_resume,
1251         .led_brightness_set     = bcm_phy_led_brightness_set,
1252 }, {
1253         .phy_id         = PHY_ID_BCM50610M,
1254         .phy_id_mask    = 0xfffffff0,
1255         .name           = "Broadcom BCM50610M",
1256         /* PHY_GBIT_FEATURES */
1257         .get_sset_count = bcm_phy_get_sset_count,
1258         .get_strings    = bcm_phy_get_strings,
1259         .get_stats      = bcm54xx_get_stats,
1260         .probe          = bcm54xx_phy_probe,
1261         .config_init    = bcm54xx_config_init,
1262         .config_intr    = bcm_phy_config_intr,
1263         .handle_interrupt = bcm_phy_handle_interrupt,
1264         .link_change_notify     = bcm54xx_link_change_notify,
1265         .suspend        = bcm54xx_suspend,
1266         .resume         = bcm54xx_resume,
1267         .led_brightness_set     = bcm_phy_led_brightness_set,
1268 }, {
1269         .phy_id         = PHY_ID_BCM57780,
1270         .phy_id_mask    = 0xfffffff0,
1271         .name           = "Broadcom BCM57780",
1272         /* PHY_GBIT_FEATURES */
1273         .get_sset_count = bcm_phy_get_sset_count,
1274         .get_strings    = bcm_phy_get_strings,
1275         .get_stats      = bcm54xx_get_stats,
1276         .probe          = bcm54xx_phy_probe,
1277         .config_init    = bcm54xx_config_init,
1278         .config_intr    = bcm_phy_config_intr,
1279         .handle_interrupt = bcm_phy_handle_interrupt,
1280         .link_change_notify     = bcm54xx_link_change_notify,
1281         .led_brightness_set     = bcm_phy_led_brightness_set,
1282 }, {
1283         .phy_id         = PHY_ID_BCMAC131,
1284         .phy_id_mask    = 0xfffffff0,
1285         .name           = "Broadcom BCMAC131",
1286         /* PHY_BASIC_FEATURES */
1287         .config_init    = brcm_fet_config_init,
1288         .config_intr    = brcm_fet_config_intr,
1289         .handle_interrupt = brcm_fet_handle_interrupt,
1290         .suspend        = brcm_fet_suspend,
1291         .resume         = brcm_fet_config_init,
1292 }, {
1293         .phy_id         = PHY_ID_BCM5241,
1294         .phy_id_mask    = 0xfffffff0,
1295         .name           = "Broadcom BCM5241",
1296         /* PHY_BASIC_FEATURES */
1297         .config_init    = brcm_fet_config_init,
1298         .config_intr    = brcm_fet_config_intr,
1299         .handle_interrupt = brcm_fet_handle_interrupt,
1300         .suspend        = brcm_fet_suspend,
1301         .resume         = brcm_fet_config_init,
1302 }, {
1303         .phy_id         = PHY_ID_BCM5221,
1304         .phy_id_mask    = 0xfffffff0,
1305         .name           = "Broadcom BCM5221",
1306         /* PHY_BASIC_FEATURES */
1307         .config_init    = brcm_fet_config_init,
1308         .config_intr    = brcm_fet_config_intr,
1309         .handle_interrupt = brcm_fet_handle_interrupt,
1310         .suspend        = brcm_fet_suspend,
1311         .resume         = brcm_fet_config_init,
1312         .config_aneg    = bcm5221_config_aneg,
1313         .read_status    = bcm5221_read_status,
1314 }, {
1315         .phy_id         = PHY_ID_BCM5395,
1316         .phy_id_mask    = 0xfffffff0,
1317         .name           = "Broadcom BCM5395",
1318         .flags          = PHY_IS_INTERNAL,
1319         /* PHY_GBIT_FEATURES */
1320         .get_sset_count = bcm_phy_get_sset_count,
1321         .get_strings    = bcm_phy_get_strings,
1322         .get_stats      = bcm54xx_get_stats,
1323         .probe          = bcm54xx_phy_probe,
1324         .link_change_notify     = bcm54xx_link_change_notify,
1325         .led_brightness_set     = bcm_phy_led_brightness_set,
1326 }, {
1327         .phy_id         = PHY_ID_BCM53125,
1328         .phy_id_mask    = 0xfffffff0,
1329         .name           = "Broadcom BCM53125",
1330         .flags          = PHY_IS_INTERNAL,
1331         /* PHY_GBIT_FEATURES */
1332         .get_sset_count = bcm_phy_get_sset_count,
1333         .get_strings    = bcm_phy_get_strings,
1334         .get_stats      = bcm54xx_get_stats,
1335         .probe          = bcm54xx_phy_probe,
1336         .config_init    = bcm54xx_config_init,
1337         .config_intr    = bcm_phy_config_intr,
1338         .handle_interrupt = bcm_phy_handle_interrupt,
1339         .link_change_notify     = bcm54xx_link_change_notify,
1340         .led_brightness_set     = bcm_phy_led_brightness_set,
1341 }, {
1342         .phy_id         = PHY_ID_BCM53128,
1343         .phy_id_mask    = 0xfffffff0,
1344         .name           = "Broadcom BCM53128",
1345         .flags          = PHY_IS_INTERNAL,
1346         /* PHY_GBIT_FEATURES */
1347         .get_sset_count = bcm_phy_get_sset_count,
1348         .get_strings    = bcm_phy_get_strings,
1349         .get_stats      = bcm54xx_get_stats,
1350         .probe          = bcm54xx_phy_probe,
1351         .config_init    = bcm54xx_config_init,
1352         .config_intr    = bcm_phy_config_intr,
1353         .handle_interrupt = bcm_phy_handle_interrupt,
1354         .link_change_notify     = bcm54xx_link_change_notify,
1355         .led_brightness_set     = bcm_phy_led_brightness_set,
1356 }, {
1357         .phy_id         = PHY_ID_BCM89610,
1358         .phy_id_mask    = 0xfffffff0,
1359         .name           = "Broadcom BCM89610",
1360         /* PHY_GBIT_FEATURES */
1361         .get_sset_count = bcm_phy_get_sset_count,
1362         .get_strings    = bcm_phy_get_strings,
1363         .get_stats      = bcm54xx_get_stats,
1364         .probe          = bcm54xx_phy_probe,
1365         .config_init    = bcm54xx_config_init,
1366         .config_intr    = bcm_phy_config_intr,
1367         .handle_interrupt = bcm_phy_handle_interrupt,
1368         .link_change_notify     = bcm54xx_link_change_notify,
1369 } };
1370
1371 module_phy_driver(broadcom_drivers);
1372
1373 static struct mdio_device_id __maybe_unused broadcom_tbl[] = {
1374         { PHY_ID_BCM5411, 0xfffffff0 },
1375         { PHY_ID_BCM5421, 0xfffffff0 },
1376         { PHY_ID_BCM54210E, 0xfffffff0 },
1377         { PHY_ID_BCM5461, 0xfffffff0 },
1378         { PHY_ID_BCM54612E, 0xfffffff0 },
1379         { PHY_ID_BCM54616S, 0xfffffff0 },
1380         { PHY_ID_BCM5464, 0xfffffff0 },
1381         { PHY_ID_BCM5481, 0xfffffff0 },
1382         { PHY_ID_BCM54810, 0xfffffff0 },
1383         { PHY_ID_BCM54811, 0xfffffff0 },
1384         { PHY_ID_BCM5482, 0xfffffff0 },
1385         { PHY_ID_BCM50610, 0xfffffff0 },
1386         { PHY_ID_BCM50610M, 0xfffffff0 },
1387         { PHY_ID_BCM57780, 0xfffffff0 },
1388         { PHY_ID_BCMAC131, 0xfffffff0 },
1389         { PHY_ID_BCM5221, 0xfffffff0 },
1390         { PHY_ID_BCM5241, 0xfffffff0 },
1391         { PHY_ID_BCM5395, 0xfffffff0 },
1392         { PHY_ID_BCM53125, 0xfffffff0 },
1393         { PHY_ID_BCM53128, 0xfffffff0 },
1394         { PHY_ID_BCM89610, 0xfffffff0 },
1395         { }
1396 };
1397
1398 MODULE_DEVICE_TABLE(mdio, broadcom_tbl);
This page took 0.141683 seconds and 4 git commands to generate.