1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
4 #include <linux/module.h>
5 #include <linux/netdevice.h>
10 #include "ionic_lif.h"
11 #include "ionic_ethtool.h"
12 #include "ionic_stats.h"
14 static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf)
18 for (i = 0; i < ionic_num_stats_grps; i++)
19 ionic_stats_groups[i].get_strings(lif, &buf);
22 static void ionic_get_stats(struct net_device *netdev,
23 struct ethtool_stats *stats, u64 *buf)
25 struct ionic_lif *lif = netdev_priv(netdev);
28 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
31 memset(buf, 0, stats->n_stats * sizeof(*buf));
32 for (i = 0; i < ionic_num_stats_grps; i++)
33 ionic_stats_groups[i].get_values(lif, &buf);
36 static int ionic_get_stats_count(struct ionic_lif *lif)
40 for (i = 0; i < ionic_num_stats_grps; i++)
41 num_stats += ionic_stats_groups[i].get_count(lif);
46 static int ionic_get_sset_count(struct net_device *netdev, int sset)
48 struct ionic_lif *lif = netdev_priv(netdev);
53 count = ionic_get_stats_count(lif);
59 static void ionic_get_strings(struct net_device *netdev,
62 struct ionic_lif *lif = netdev_priv(netdev);
66 ionic_get_stats_strings(lif, buf);
71 static void ionic_get_drvinfo(struct net_device *netdev,
72 struct ethtool_drvinfo *drvinfo)
74 struct ionic_lif *lif = netdev_priv(netdev);
75 struct ionic *ionic = lif->ionic;
77 strscpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver));
78 strscpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version,
79 sizeof(drvinfo->fw_version));
80 strscpy(drvinfo->bus_info, ionic_bus_info(ionic),
81 sizeof(drvinfo->bus_info));
84 static int ionic_get_regs_len(struct net_device *netdev)
86 return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32);
89 static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
92 struct ionic_lif *lif = netdev_priv(netdev);
93 struct ionic_dev *idev;
97 regs->version = IONIC_DEV_CMD_REG_VERSION;
99 idev = &lif->ionic->idev;
100 if (!idev->dev_info_regs)
104 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
105 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
108 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
109 memcpy_fromio(p + offset, idev->dev_cmd_regs->words, size);
112 static void ionic_get_link_ext_stats(struct net_device *netdev,
113 struct ethtool_link_ext_stats *stats)
115 struct ionic_lif *lif = netdev_priv(netdev);
117 if (lif->ionic->pdev->is_physfn)
118 stats->link_down_events = lif->link_down_count;
121 static int ionic_get_link_ksettings(struct net_device *netdev,
122 struct ethtool_link_ksettings *ks)
124 struct ionic_lif *lif = netdev_priv(netdev);
125 struct ionic_dev *idev = &lif->ionic->idev;
128 ethtool_link_ksettings_zero_link_mode(ks, supported);
130 if (!idev->port_info) {
131 netdev_err(netdev, "port_info not initialized\n");
135 /* The port_info data is found in a DMA space that the NIC keeps
136 * up-to-date, so there's no need to request the data from the
137 * NIC, we already have it in our memory space.
140 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) {
142 case IONIC_XCVR_PID_QSFP_100G_CR4:
143 ethtool_link_ksettings_add_link_mode(ks, supported,
147 case IONIC_XCVR_PID_QSFP_40GBASE_CR4:
148 ethtool_link_ksettings_add_link_mode(ks, supported,
152 case IONIC_XCVR_PID_SFP_25GBASE_CR_S:
153 case IONIC_XCVR_PID_SFP_25GBASE_CR_L:
154 case IONIC_XCVR_PID_SFP_25GBASE_CR_N:
155 ethtool_link_ksettings_add_link_mode(ks, supported,
159 case IONIC_XCVR_PID_SFP_10GBASE_AOC:
160 case IONIC_XCVR_PID_SFP_10GBASE_CU:
161 ethtool_link_ksettings_add_link_mode(ks, supported,
167 case IONIC_XCVR_PID_QSFP_100G_SR4:
168 case IONIC_XCVR_PID_QSFP_100G_AOC:
169 ethtool_link_ksettings_add_link_mode(ks, supported,
172 case IONIC_XCVR_PID_QSFP_100G_CWDM4:
173 case IONIC_XCVR_PID_QSFP_100G_PSM4:
174 case IONIC_XCVR_PID_QSFP_100G_LR4:
175 ethtool_link_ksettings_add_link_mode(ks, supported,
176 100000baseLR4_ER4_Full);
178 case IONIC_XCVR_PID_QSFP_100G_ER4:
179 ethtool_link_ksettings_add_link_mode(ks, supported,
180 100000baseLR4_ER4_Full);
182 case IONIC_XCVR_PID_QSFP_40GBASE_SR4:
183 case IONIC_XCVR_PID_QSFP_40GBASE_AOC:
184 ethtool_link_ksettings_add_link_mode(ks, supported,
187 case IONIC_XCVR_PID_QSFP_40GBASE_LR4:
188 ethtool_link_ksettings_add_link_mode(ks, supported,
191 case IONIC_XCVR_PID_SFP_25GBASE_SR:
192 case IONIC_XCVR_PID_SFP_25GBASE_AOC:
193 case IONIC_XCVR_PID_SFP_25GBASE_ACC:
194 ethtool_link_ksettings_add_link_mode(ks, supported,
197 case IONIC_XCVR_PID_SFP_10GBASE_SR:
198 ethtool_link_ksettings_add_link_mode(ks, supported,
201 case IONIC_XCVR_PID_SFP_10GBASE_LR:
202 ethtool_link_ksettings_add_link_mode(ks, supported,
205 case IONIC_XCVR_PID_SFP_10GBASE_LRM:
206 ethtool_link_ksettings_add_link_mode(ks, supported,
209 case IONIC_XCVR_PID_SFP_10GBASE_ER:
210 ethtool_link_ksettings_add_link_mode(ks, supported,
213 case IONIC_XCVR_PID_SFP_10GBASE_T:
214 ethtool_link_ksettings_add_link_mode(ks, supported,
217 case IONIC_XCVR_PID_SFP_1000BASE_T:
218 ethtool_link_ksettings_add_link_mode(ks, supported,
221 case IONIC_XCVR_PID_UNKNOWN:
222 /* This means there's no module plugged in */
225 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n",
226 idev->port_info->status.xcvr.pid,
227 idev->port_info->status.xcvr.pid);
231 linkmode_copy(ks->link_modes.advertising, ks->link_modes.supported);
233 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
234 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
235 if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_FC)
236 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER);
237 else if (idev->port_info->config.fec_type == IONIC_PORT_FEC_TYPE_RS)
238 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
240 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
241 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
243 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER ||
245 ks->base.port = PORT_DA;
246 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER)
247 ks->base.port = PORT_FIBRE;
249 ks->base.port = PORT_NONE;
251 if (ks->base.port != PORT_NONE) {
252 ks->base.speed = le32_to_cpu(lif->info->status.link_speed);
254 if (le16_to_cpu(lif->info->status.link_status))
255 ks->base.duplex = DUPLEX_FULL;
257 ks->base.duplex = DUPLEX_UNKNOWN;
259 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
261 if (idev->port_info->config.an_enable) {
262 ethtool_link_ksettings_add_link_mode(ks, advertising,
264 ks->base.autoneg = AUTONEG_ENABLE;
271 static int ionic_set_link_ksettings(struct net_device *netdev,
272 const struct ethtool_link_ksettings *ks)
274 struct ionic_lif *lif = netdev_priv(netdev);
275 struct ionic_dev *idev = &lif->ionic->idev;
276 struct ionic *ionic = lif->ionic;
279 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
283 if (ks->base.autoneg != idev->port_info->config.an_enable) {
284 mutex_lock(&ionic->dev_cmd_lock);
285 ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg);
286 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
287 mutex_unlock(&ionic->dev_cmd_lock);
293 if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) {
294 mutex_lock(&ionic->dev_cmd_lock);
295 ionic_dev_cmd_port_speed(idev, ks->base.speed);
296 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
297 mutex_unlock(&ionic->dev_cmd_lock);
305 static void ionic_get_pauseparam(struct net_device *netdev,
306 struct ethtool_pauseparam *pause)
308 struct ionic_lif *lif = netdev_priv(netdev);
313 pause_type = lif->ionic->idev.port_info->config.pause_type;
315 pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0;
316 pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0;
320 static int ionic_set_pauseparam(struct net_device *netdev,
321 struct ethtool_pauseparam *pause)
323 struct ionic_lif *lif = netdev_priv(netdev);
324 struct ionic *ionic = lif->ionic;
328 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
334 /* change both at the same time */
335 requested_pause = IONIC_PORT_PAUSE_TYPE_LINK;
337 requested_pause |= IONIC_PAUSE_F_RX;
339 requested_pause |= IONIC_PAUSE_F_TX;
341 if (requested_pause == lif->ionic->idev.port_info->config.pause_type)
344 mutex_lock(&ionic->dev_cmd_lock);
345 ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause);
346 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
347 mutex_unlock(&ionic->dev_cmd_lock);
354 static int ionic_get_fecparam(struct net_device *netdev,
355 struct ethtool_fecparam *fec)
357 struct ionic_lif *lif = netdev_priv(netdev);
359 switch (lif->ionic->idev.port_info->config.fec_type) {
360 case IONIC_PORT_FEC_TYPE_NONE:
361 fec->active_fec = ETHTOOL_FEC_OFF;
363 case IONIC_PORT_FEC_TYPE_RS:
364 fec->active_fec = ETHTOOL_FEC_RS;
366 case IONIC_PORT_FEC_TYPE_FC:
367 fec->active_fec = ETHTOOL_FEC_BASER;
371 fec->fec = ETHTOOL_FEC_OFF | ETHTOOL_FEC_RS | ETHTOOL_FEC_BASER;
376 static int ionic_set_fecparam(struct net_device *netdev,
377 struct ethtool_fecparam *fec)
379 struct ionic_lif *lif = netdev_priv(netdev);
383 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
386 if (lif->ionic->idev.port_info->config.an_enable) {
387 netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n");
392 case ETHTOOL_FEC_NONE:
393 fec_type = IONIC_PORT_FEC_TYPE_NONE;
395 case ETHTOOL_FEC_OFF:
396 fec_type = IONIC_PORT_FEC_TYPE_NONE;
399 fec_type = IONIC_PORT_FEC_TYPE_RS;
401 case ETHTOOL_FEC_BASER:
402 fec_type = IONIC_PORT_FEC_TYPE_FC;
404 case ETHTOOL_FEC_AUTO:
406 netdev_err(netdev, "FEC request 0x%04x not supported\n",
411 if (fec_type != lif->ionic->idev.port_info->config.fec_type) {
412 mutex_lock(&lif->ionic->dev_cmd_lock);
413 ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type);
414 ret = ionic_dev_cmd_wait(lif->ionic, DEVCMD_TIMEOUT);
415 mutex_unlock(&lif->ionic->dev_cmd_lock);
421 static int ionic_get_coalesce(struct net_device *netdev,
422 struct ethtool_coalesce *coalesce,
423 struct kernel_ethtool_coalesce *kernel_coal,
424 struct netlink_ext_ack *extack)
426 struct ionic_lif *lif = netdev_priv(netdev);
428 coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs;
429 coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs;
431 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
432 coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
434 coalesce->use_adaptive_tx_coalesce = 0;
436 coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
441 static int ionic_set_coalesce(struct net_device *netdev,
442 struct ethtool_coalesce *coalesce,
443 struct kernel_ethtool_coalesce *kernel_coal,
444 struct netlink_ext_ack *extack)
446 struct ionic_lif *lif = netdev_priv(netdev);
447 struct ionic_identity *ident;
452 ident = &lif->ionic->ident;
453 if (ident->dev.intr_coal_div == 0) {
454 netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n",
455 ident->dev.intr_coal_div);
459 /* Tx normally shares Rx interrupt, so only change Rx if not split */
460 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) &&
461 (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs ||
462 coalesce->use_adaptive_tx_coalesce)) {
463 netdev_warn(netdev, "only rx parameters can be changed\n");
467 /* Convert the usec request to a HW usable value. If they asked
468 * for non-zero and it resolved to zero, bump it up
470 rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs);
471 if (!rx_coal && coalesce->rx_coalesce_usecs)
473 tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs);
474 if (!tx_coal && coalesce->tx_coalesce_usecs)
477 if (rx_coal > IONIC_INTR_CTRL_COAL_MAX ||
478 tx_coal > IONIC_INTR_CTRL_COAL_MAX)
481 /* Save the new values */
482 lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs;
483 lif->rx_coalesce_hw = rx_coal;
485 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
486 lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs;
488 lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs;
489 lif->tx_coalesce_hw = tx_coal;
491 if (coalesce->use_adaptive_rx_coalesce) {
492 set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
495 clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
499 if (coalesce->use_adaptive_tx_coalesce) {
500 set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
503 clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
507 if (test_bit(IONIC_LIF_F_UP, lif->state)) {
508 for (i = 0; i < lif->nxqs; i++) {
509 if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) {
510 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
511 lif->rxqcqs[i]->intr.index,
512 lif->rx_coalesce_hw);
513 lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim;
516 if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) {
517 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
518 lif->txqcqs[i]->intr.index,
519 lif->tx_coalesce_hw);
520 lif->txqcqs[i]->intr.dim_coal_hw = tx_dim;
528 static int ionic_validate_cmb_config(struct ionic_lif *lif,
529 struct ionic_queue_params *qparam)
531 int pages_have, pages_required = 0;
534 if (!lif->ionic->idev.cmb_inuse &&
535 (qparam->cmb_tx || qparam->cmb_rx)) {
536 netdev_info(lif->netdev, "CMB rings are not supported on this device\n");
540 if (qparam->cmb_tx) {
541 if (!(lif->qtype_info[IONIC_QTYPE_TXQ].features & IONIC_QIDENT_F_CMB)) {
542 netdev_info(lif->netdev,
543 "CMB rings for tx-push are not supported on this device\n");
547 sz = sizeof(struct ionic_txq_desc) * qparam->ntxq_descs * qparam->nxqs;
548 pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
551 if (qparam->cmb_rx) {
552 if (!(lif->qtype_info[IONIC_QTYPE_RXQ].features & IONIC_QIDENT_F_CMB)) {
553 netdev_info(lif->netdev,
554 "CMB rings for rx-push are not supported on this device\n");
558 sz = sizeof(struct ionic_rxq_desc) * qparam->nrxq_descs * qparam->nxqs;
559 pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
562 pages_have = lif->ionic->bars[IONIC_PCI_BAR_CMB].len / PAGE_SIZE;
563 if (pages_required > pages_have) {
564 netdev_info(lif->netdev,
565 "Not enough CMB pages for number of queues and size of descriptor rings, need %d have %d",
566 pages_required, pages_have);
570 return pages_required;
573 static int ionic_cmb_rings_toggle(struct ionic_lif *lif, bool cmb_tx, bool cmb_rx)
575 struct ionic_queue_params qparam;
578 if (netif_running(lif->netdev)) {
579 netdev_info(lif->netdev, "Please stop device to toggle CMB for tx/rx-push\n");
583 ionic_init_queue_params(lif, &qparam);
584 qparam.cmb_tx = cmb_tx;
585 qparam.cmb_rx = cmb_rx;
586 pages_used = ionic_validate_cmb_config(lif, &qparam);
591 set_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
593 clear_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
596 set_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
598 clear_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
600 if (cmb_tx || cmb_rx)
601 netdev_info(lif->netdev, "Enabling CMB %s %s rings - %d pages\n",
602 cmb_tx ? "TX" : "", cmb_rx ? "RX" : "", pages_used);
604 netdev_info(lif->netdev, "Disabling CMB rings\n");
609 static void ionic_get_ringparam(struct net_device *netdev,
610 struct ethtool_ringparam *ring,
611 struct kernel_ethtool_ringparam *kernel_ring,
612 struct netlink_ext_ack *extack)
614 struct ionic_lif *lif = netdev_priv(netdev);
616 ring->tx_max_pending = IONIC_MAX_TX_DESC;
617 ring->tx_pending = lif->ntxq_descs;
618 ring->rx_max_pending = IONIC_MAX_RX_DESC;
619 ring->rx_pending = lif->nrxq_descs;
620 kernel_ring->tx_push = test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state);
621 kernel_ring->rx_push = test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state);
624 static int ionic_set_ringparam(struct net_device *netdev,
625 struct ethtool_ringparam *ring,
626 struct kernel_ethtool_ringparam *kernel_ring,
627 struct netlink_ext_ack *extack)
629 struct ionic_lif *lif = netdev_priv(netdev);
630 struct ionic_queue_params qparam;
633 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
636 ionic_init_queue_params(lif, &qparam);
638 if (ring->rx_mini_pending || ring->rx_jumbo_pending) {
639 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");
643 if (!is_power_of_2(ring->tx_pending) ||
644 !is_power_of_2(ring->rx_pending)) {
645 netdev_info(netdev, "Descriptor count must be a power of 2\n");
649 /* if nothing to do return success */
650 if (ring->tx_pending == lif->ntxq_descs &&
651 ring->rx_pending == lif->nrxq_descs &&
652 kernel_ring->tx_push == test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state) &&
653 kernel_ring->rx_push == test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state))
656 qparam.ntxq_descs = ring->tx_pending;
657 qparam.nrxq_descs = ring->rx_pending;
658 qparam.cmb_tx = kernel_ring->tx_push;
659 qparam.cmb_rx = kernel_ring->rx_push;
661 err = ionic_validate_cmb_config(lif, &qparam);
665 if (kernel_ring->tx_push != test_bit(IONIC_LIF_F_CMB_TX_RINGS, lif->state) ||
666 kernel_ring->rx_push != test_bit(IONIC_LIF_F_CMB_RX_RINGS, lif->state)) {
667 err = ionic_cmb_rings_toggle(lif, kernel_ring->tx_push,
668 kernel_ring->rx_push);
673 if (ring->tx_pending != lif->ntxq_descs)
674 netdev_info(netdev, "Changing Tx ring size from %d to %d\n",
675 lif->ntxq_descs, ring->tx_pending);
677 if (ring->rx_pending != lif->nrxq_descs)
678 netdev_info(netdev, "Changing Rx ring size from %d to %d\n",
679 lif->nrxq_descs, ring->rx_pending);
681 /* if we're not running, just set the values and return */
682 if (!netif_running(lif->netdev)) {
683 lif->ntxq_descs = ring->tx_pending;
684 lif->nrxq_descs = ring->rx_pending;
688 mutex_lock(&lif->queue_lock);
689 err = ionic_reconfigure_queues(lif, &qparam);
690 mutex_unlock(&lif->queue_lock);
692 netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err);
697 static void ionic_get_channels(struct net_device *netdev,
698 struct ethtool_channels *ch)
700 struct ionic_lif *lif = netdev_priv(netdev);
702 /* report maximum channels */
703 ch->max_combined = lif->ionic->ntxqs_per_lif;
704 ch->max_rx = lif->ionic->ntxqs_per_lif / 2;
705 ch->max_tx = lif->ionic->ntxqs_per_lif / 2;
707 /* report current channels */
708 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) {
709 ch->rx_count = lif->nxqs;
710 ch->tx_count = lif->nxqs;
712 ch->combined_count = lif->nxqs;
716 static int ionic_set_channels(struct net_device *netdev,
717 struct ethtool_channels *ch)
719 struct ionic_lif *lif = netdev_priv(netdev);
720 struct ionic_queue_params qparam;
724 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
727 ionic_init_queue_params(lif, &qparam);
729 if ((ch->rx_count || ch->tx_count) && lif->xdp_prog) {
730 netdev_info(lif->netdev, "Split Tx/Rx interrupts not available when using XDP\n");
734 if (ch->rx_count != ch->tx_count) {
735 netdev_info(netdev, "The rx and tx count must be equal\n");
739 if (ch->combined_count && ch->rx_count) {
740 netdev_info(netdev, "Use either combined or rx and tx, not both\n");
744 max_cnt = lif->ionic->ntxqs_per_lif;
745 if (ch->combined_count) {
746 if (ch->combined_count > max_cnt)
749 if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
750 netdev_info(lif->netdev, "Sharing queue interrupts\n");
751 else if (ch->combined_count == lif->nxqs)
754 if (lif->nxqs != ch->combined_count)
755 netdev_info(netdev, "Changing queue count from %d to %d\n",
756 lif->nxqs, ch->combined_count);
758 qparam.nxqs = ch->combined_count;
759 qparam.intr_split = false;
762 if (ch->rx_count > max_cnt)
765 if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
766 netdev_info(lif->netdev, "Splitting queue interrupts\n");
767 else if (ch->rx_count == lif->nxqs)
770 if (lif->nxqs != ch->rx_count)
771 netdev_info(netdev, "Changing queue count from %d to %d\n",
772 lif->nxqs, ch->rx_count);
774 qparam.nxqs = ch->rx_count;
775 qparam.intr_split = true;
778 err = ionic_validate_cmb_config(lif, &qparam);
782 /* if we're not running, just set the values and return */
783 if (!netif_running(lif->netdev)) {
784 lif->nxqs = qparam.nxqs;
786 if (qparam.intr_split) {
787 set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
789 clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
790 lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
791 lif->tx_coalesce_hw = lif->rx_coalesce_hw;
796 mutex_lock(&lif->queue_lock);
797 err = ionic_reconfigure_queues(lif, &qparam);
798 mutex_unlock(&lif->queue_lock);
800 netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err);
805 static int ionic_get_rxnfc(struct net_device *netdev,
806 struct ethtool_rxnfc *info, u32 *rules)
808 struct ionic_lif *lif = netdev_priv(netdev);
812 case ETHTOOL_GRXRINGS:
813 info->data = lif->nxqs;
816 netdev_dbg(netdev, "Command parameter %d is not supported\n",
824 static u32 ionic_get_rxfh_indir_size(struct net_device *netdev)
826 struct ionic_lif *lif = netdev_priv(netdev);
828 return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
831 static u32 ionic_get_rxfh_key_size(struct net_device *netdev)
833 return IONIC_RSS_HASH_KEY_SIZE;
836 static int ionic_get_rxfh(struct net_device *netdev,
837 struct ethtool_rxfh_param *rxfh)
839 struct ionic_lif *lif = netdev_priv(netdev);
840 unsigned int i, tbl_sz;
843 tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
844 for (i = 0; i < tbl_sz; i++)
845 rxfh->indir[i] = lif->rss_ind_tbl[i];
849 memcpy(rxfh->key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE);
851 rxfh->hfunc = ETH_RSS_HASH_TOP;
856 static int ionic_set_rxfh(struct net_device *netdev,
857 struct ethtool_rxfh_param *rxfh,
858 struct netlink_ext_ack *extack)
860 struct ionic_lif *lif = netdev_priv(netdev);
862 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
863 rxfh->hfunc != ETH_RSS_HASH_TOP)
866 return ionic_lif_rss_config(lif, lif->rss_types,
867 rxfh->key, rxfh->indir);
870 static int ionic_set_tunable(struct net_device *dev,
871 const struct ethtool_tunable *tuna,
874 struct ionic_lif *lif = netdev_priv(dev);
877 case ETHTOOL_RX_COPYBREAK:
878 lif->rx_copybreak = *(u32 *)data;
887 static int ionic_get_tunable(struct net_device *netdev,
888 const struct ethtool_tunable *tuna, void *data)
890 struct ionic_lif *lif = netdev_priv(netdev);
893 case ETHTOOL_RX_COPYBREAK:
894 *(u32 *)data = lif->rx_copybreak;
903 static int ionic_get_module_info(struct net_device *netdev,
904 struct ethtool_modinfo *modinfo)
907 struct ionic_lif *lif = netdev_priv(netdev);
908 struct ionic_dev *idev = &lif->ionic->idev;
909 struct ionic_xcvr_status *xcvr;
910 struct sfp_eeprom_base *sfp;
912 xcvr = &idev->port_info->status.xcvr;
913 sfp = (struct sfp_eeprom_base *) xcvr->sprom;
915 /* report the module data type and length */
916 switch (sfp->phys_id) {
918 modinfo->type = ETH_MODULE_SFF_8079;
919 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
921 case SFF8024_ID_QSFP_8436_8636:
922 case SFF8024_ID_QSFP28_8636:
923 modinfo->type = ETH_MODULE_SFF_8436;
924 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
927 netdev_info(netdev, "unknown xcvr type 0x%02x\n",
930 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
937 static int ionic_get_module_eeprom(struct net_device *netdev,
938 struct ethtool_eeprom *ee,
941 struct ionic_lif *lif = netdev_priv(netdev);
942 struct ionic_dev *idev = &lif->ionic->idev;
943 struct ionic_xcvr_status *xcvr;
944 char tbuf[sizeof(xcvr->sprom)];
948 /* The NIC keeps the module prom up-to-date in the DMA space
949 * so we can simply copy the module bytes into the data buffer.
951 xcvr = &idev->port_info->status.xcvr;
952 len = min_t(u32, sizeof(xcvr->sprom), ee->len);
955 memcpy(data, xcvr->sprom, len);
956 memcpy(tbuf, xcvr->sprom, len);
958 /* Let's make sure we got a consistent copy */
959 if (!memcmp(data, tbuf, len))
970 static int ionic_get_ts_info(struct net_device *netdev,
971 struct ethtool_ts_info *info)
973 struct ionic_lif *lif = netdev_priv(netdev);
974 struct ionic *ionic = lif->ionic;
977 if (!lif->phc || !lif->phc->ptp)
978 return ethtool_op_get_ts_info(netdev, info);
980 info->phc_index = ptp_clock_index(lif->phc->ptp);
982 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
983 SOF_TIMESTAMPING_RX_SOFTWARE |
984 SOF_TIMESTAMPING_SOFTWARE |
985 SOF_TIMESTAMPING_TX_HARDWARE |
986 SOF_TIMESTAMPING_RX_HARDWARE |
987 SOF_TIMESTAMPING_RAW_HARDWARE;
991 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
994 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC));
995 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
996 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
998 mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P));
999 if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
1000 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P);
1004 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1005 BIT(HWTSTAMP_FILTER_ALL);
1007 mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL);
1008 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1009 info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL);
1011 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC);
1012 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1013 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC);
1015 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ);
1016 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1017 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);
1019 mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL);
1020 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1021 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT);
1023 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC);
1024 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1025 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC);
1027 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ);
1028 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1029 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1031 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL);
1032 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1033 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
1035 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC);
1036 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1037 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC);
1039 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ);
1040 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1041 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1043 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL);
1044 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1045 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
1047 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC);
1048 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1049 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC);
1051 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ);
1052 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1053 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
1055 mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL);
1056 if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
1057 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
1062 static int ionic_nway_reset(struct net_device *netdev)
1064 struct ionic_lif *lif = netdev_priv(netdev);
1065 struct ionic *ionic = lif->ionic;
1068 if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
1071 /* flap the link to force auto-negotiation */
1073 mutex_lock(&ionic->dev_cmd_lock);
1075 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN);
1076 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
1079 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
1080 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
1083 mutex_unlock(&ionic->dev_cmd_lock);
1088 static const struct ethtool_ops ionic_ethtool_ops = {
1089 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1090 ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
1091 ETHTOOL_COALESCE_USE_ADAPTIVE_TX,
1092 .supported_ring_params = ETHTOOL_RING_USE_TX_PUSH |
1093 ETHTOOL_RING_USE_RX_PUSH,
1094 .get_drvinfo = ionic_get_drvinfo,
1095 .get_regs_len = ionic_get_regs_len,
1096 .get_regs = ionic_get_regs,
1097 .get_link = ethtool_op_get_link,
1098 .get_link_ext_stats = ionic_get_link_ext_stats,
1099 .get_link_ksettings = ionic_get_link_ksettings,
1100 .set_link_ksettings = ionic_set_link_ksettings,
1101 .get_coalesce = ionic_get_coalesce,
1102 .set_coalesce = ionic_set_coalesce,
1103 .get_ringparam = ionic_get_ringparam,
1104 .set_ringparam = ionic_set_ringparam,
1105 .get_channels = ionic_get_channels,
1106 .set_channels = ionic_set_channels,
1107 .get_strings = ionic_get_strings,
1108 .get_ethtool_stats = ionic_get_stats,
1109 .get_sset_count = ionic_get_sset_count,
1110 .get_rxnfc = ionic_get_rxnfc,
1111 .get_rxfh_indir_size = ionic_get_rxfh_indir_size,
1112 .get_rxfh_key_size = ionic_get_rxfh_key_size,
1113 .get_rxfh = ionic_get_rxfh,
1114 .set_rxfh = ionic_set_rxfh,
1115 .get_tunable = ionic_get_tunable,
1116 .set_tunable = ionic_set_tunable,
1117 .get_module_info = ionic_get_module_info,
1118 .get_module_eeprom = ionic_get_module_eeprom,
1119 .get_pauseparam = ionic_get_pauseparam,
1120 .set_pauseparam = ionic_set_pauseparam,
1121 .get_fecparam = ionic_get_fecparam,
1122 .set_fecparam = ionic_set_fecparam,
1123 .get_ts_info = ionic_get_ts_info,
1124 .nway_reset = ionic_nway_reset,
1127 void ionic_ethtool_set_ops(struct net_device *netdev)
1129 netdev->ethtool_ops = &ionic_ethtool_ops;