1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
3 * Copyright (c) 2018, Mellanox Technologies inc. All rights reserved.
6 #include <rdma/ib_user_verbs.h>
7 #include <rdma/ib_verbs.h>
8 #include <rdma/uverbs_types.h>
9 #include <rdma/uverbs_ioctl.h>
10 #include <rdma/mlx5_user_ioctl_cmds.h>
11 #include <rdma/mlx5_user_ioctl_verbs.h>
12 #include <rdma/ib_umem.h>
13 #include <rdma/uverbs_std_types.h>
14 #include <linux/mlx5/driver.h>
15 #include <linux/mlx5/fs.h>
19 #include <linux/xarray.h>
21 #define UVERBS_MODULE_NAME mlx5_ib
22 #include <rdma/uverbs_named_ioctl.h>
24 static void dispatch_event_fd(struct list_head *fd_list, const void *data);
27 DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0,
28 DEVX_OBJ_FLAGS_DCT = 1 << 1,
29 DEVX_OBJ_FLAGS_CQ = 1 << 2,
32 struct devx_async_data {
33 struct mlx5_ib_dev *mdev;
34 struct list_head list;
35 struct devx_async_cmd_event_file *ev_file;
36 struct mlx5_async_work cb_work;
38 /* must be last field in this structure */
39 struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
42 struct devx_async_event_data {
43 struct list_head list; /* headed in ev_file->event_list */
44 struct mlx5_ib_uapi_devx_async_event_hdr hdr;
47 /* first level XA value data structure */
49 struct xarray object_ids; /* second XA level, Key = object id */
50 struct list_head unaffiliated_list;
53 /* second level XA value data structure */
54 struct devx_obj_event {
56 struct list_head obj_sub_list;
59 struct devx_event_subscription {
60 struct list_head file_list; /* headed in ev_file->
61 * subscribed_events_list
63 struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
64 * devx_obj_event->obj_sub_list
66 struct list_head obj_list; /* headed in devx_object */
67 struct list_head event_list; /* headed in ev_file->event_list or in
68 * temp list via subscription
76 struct devx_async_event_file *ev_file;
77 struct eventfd_ctx *eventfd;
80 struct devx_async_event_file {
81 struct ib_uobject uobj;
82 /* Head of events that are subscribed to this FD */
83 struct list_head subscribed_events_list;
85 wait_queue_head_t poll_wait;
86 struct list_head event_list;
87 struct mlx5_ib_dev *dev;
94 struct mlx5_core_dev *mdev;
97 u32 dinbox[MLX5_ST_SZ_DW(destroy_umem_in)];
100 struct devx_umem_reg_cmd {
103 u32 out[MLX5_ST_SZ_DW(create_umem_out)];
106 static struct mlx5_ib_ucontext *
107 devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
109 return to_mucontext(ib_uverbs_get_ucontext(attrs));
112 int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
114 u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {};
115 u32 out[MLX5_ST_SZ_DW(create_uctx_out)] = {};
121 /* 0 means not supported */
122 if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
125 uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
126 if (is_user && capable(CAP_NET_RAW) &&
127 (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
128 cap |= MLX5_UCTX_CAP_RAW_TX;
129 if (is_user && capable(CAP_SYS_RAWIO) &&
130 (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
131 MLX5_UCTX_CAP_INTERNAL_DEV_RES))
132 cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
134 MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
135 MLX5_SET(uctx, uctx, cap, cap);
137 err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
141 uid = MLX5_GET(create_uctx_out, out, uid);
145 void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
147 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {};
148 u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {};
150 MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
151 MLX5_SET(destroy_uctx_in, in, uid, uid);
153 mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
156 static bool is_legacy_unaffiliated_event_num(u16 event_num)
159 case MLX5_EVENT_TYPE_PORT_CHANGE:
166 static bool is_legacy_obj_event_num(u16 event_num)
169 case MLX5_EVENT_TYPE_PATH_MIG:
170 case MLX5_EVENT_TYPE_COMM_EST:
171 case MLX5_EVENT_TYPE_SQ_DRAINED:
172 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
173 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
174 case MLX5_EVENT_TYPE_CQ_ERROR:
175 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
176 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
177 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
178 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
179 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
180 case MLX5_EVENT_TYPE_DCT_DRAINED:
181 case MLX5_EVENT_TYPE_COMP:
182 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
183 case MLX5_EVENT_TYPE_XRQ_ERROR:
190 static u16 get_legacy_obj_type(u16 opcode)
193 case MLX5_CMD_OP_CREATE_RQ:
194 return MLX5_EVENT_QUEUE_TYPE_RQ;
195 case MLX5_CMD_OP_CREATE_QP:
196 return MLX5_EVENT_QUEUE_TYPE_QP;
197 case MLX5_CMD_OP_CREATE_SQ:
198 return MLX5_EVENT_QUEUE_TYPE_SQ;
199 case MLX5_CMD_OP_CREATE_DCT:
200 return MLX5_EVENT_QUEUE_TYPE_DCT;
206 static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
210 opcode = (obj->obj_id >> 32) & 0xffff;
212 if (is_legacy_obj_event_num(event_num))
213 return get_legacy_obj_type(opcode);
216 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
217 return (obj->obj_id >> 48);
218 case MLX5_CMD_OP_CREATE_RQ:
219 return MLX5_OBJ_TYPE_RQ;
220 case MLX5_CMD_OP_CREATE_QP:
221 return MLX5_OBJ_TYPE_QP;
222 case MLX5_CMD_OP_CREATE_SQ:
223 return MLX5_OBJ_TYPE_SQ;
224 case MLX5_CMD_OP_CREATE_DCT:
225 return MLX5_OBJ_TYPE_DCT;
226 case MLX5_CMD_OP_CREATE_TIR:
227 return MLX5_OBJ_TYPE_TIR;
228 case MLX5_CMD_OP_CREATE_TIS:
229 return MLX5_OBJ_TYPE_TIS;
230 case MLX5_CMD_OP_CREATE_PSV:
231 return MLX5_OBJ_TYPE_PSV;
232 case MLX5_OBJ_TYPE_MKEY:
233 return MLX5_OBJ_TYPE_MKEY;
234 case MLX5_CMD_OP_CREATE_RMP:
235 return MLX5_OBJ_TYPE_RMP;
236 case MLX5_CMD_OP_CREATE_XRC_SRQ:
237 return MLX5_OBJ_TYPE_XRC_SRQ;
238 case MLX5_CMD_OP_CREATE_XRQ:
239 return MLX5_OBJ_TYPE_XRQ;
240 case MLX5_CMD_OP_CREATE_RQT:
241 return MLX5_OBJ_TYPE_RQT;
242 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
243 return MLX5_OBJ_TYPE_FLOW_COUNTER;
244 case MLX5_CMD_OP_CREATE_CQ:
245 return MLX5_OBJ_TYPE_CQ;
251 static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
253 switch (event_type) {
254 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
255 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
256 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
257 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
258 case MLX5_EVENT_TYPE_PATH_MIG:
259 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
260 case MLX5_EVENT_TYPE_COMM_EST:
261 case MLX5_EVENT_TYPE_SQ_DRAINED:
262 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
263 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
264 return eqe->data.qp_srq.type;
265 case MLX5_EVENT_TYPE_CQ_ERROR:
266 case MLX5_EVENT_TYPE_XRQ_ERROR:
268 case MLX5_EVENT_TYPE_DCT_DRAINED:
269 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
270 return MLX5_EVENT_QUEUE_TYPE_DCT;
272 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
276 static u32 get_dec_obj_id(u64 obj_id)
278 return (obj_id & 0xffffffff);
282 * As the obj_id in the firmware is not globally unique the object type
283 * must be considered upon checking for a valid object id.
284 * For that the opcode of the creator command is encoded as part of the obj_id.
286 static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
288 return ((u64)opcode << 32) | obj_id;
291 static u32 devx_get_created_obj_id(const void *in, const void *out, u16 opcode)
294 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
295 return MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
296 case MLX5_CMD_OP_CREATE_UMEM:
297 return MLX5_GET(create_umem_out, out, umem_id);
298 case MLX5_CMD_OP_CREATE_MKEY:
299 return MLX5_GET(create_mkey_out, out, mkey_index);
300 case MLX5_CMD_OP_CREATE_CQ:
301 return MLX5_GET(create_cq_out, out, cqn);
302 case MLX5_CMD_OP_ALLOC_PD:
303 return MLX5_GET(alloc_pd_out, out, pd);
304 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
305 return MLX5_GET(alloc_transport_domain_out, out,
307 case MLX5_CMD_OP_CREATE_RMP:
308 return MLX5_GET(create_rmp_out, out, rmpn);
309 case MLX5_CMD_OP_CREATE_SQ:
310 return MLX5_GET(create_sq_out, out, sqn);
311 case MLX5_CMD_OP_CREATE_RQ:
312 return MLX5_GET(create_rq_out, out, rqn);
313 case MLX5_CMD_OP_CREATE_RQT:
314 return MLX5_GET(create_rqt_out, out, rqtn);
315 case MLX5_CMD_OP_CREATE_TIR:
316 return MLX5_GET(create_tir_out, out, tirn);
317 case MLX5_CMD_OP_CREATE_TIS:
318 return MLX5_GET(create_tis_out, out, tisn);
319 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
320 return MLX5_GET(alloc_q_counter_out, out, counter_set_id);
321 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
322 return MLX5_GET(create_flow_table_out, out, table_id);
323 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
324 return MLX5_GET(create_flow_group_out, out, group_id);
325 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
326 return MLX5_GET(set_fte_in, in, flow_index);
327 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
328 return MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);
329 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
330 return MLX5_GET(alloc_packet_reformat_context_out, out,
332 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
333 return MLX5_GET(alloc_modify_header_context_out, out,
335 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
336 return MLX5_GET(create_scheduling_element_out, out,
337 scheduling_element_id);
338 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
339 return MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
340 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
341 return MLX5_GET(set_l2_table_entry_in, in, table_index);
342 case MLX5_CMD_OP_CREATE_QP:
343 return MLX5_GET(create_qp_out, out, qpn);
344 case MLX5_CMD_OP_CREATE_SRQ:
345 return MLX5_GET(create_srq_out, out, srqn);
346 case MLX5_CMD_OP_CREATE_XRC_SRQ:
347 return MLX5_GET(create_xrc_srq_out, out, xrc_srqn);
348 case MLX5_CMD_OP_CREATE_DCT:
349 return MLX5_GET(create_dct_out, out, dctn);
350 case MLX5_CMD_OP_CREATE_XRQ:
351 return MLX5_GET(create_xrq_out, out, xrqn);
352 case MLX5_CMD_OP_ATTACH_TO_MCG:
353 return MLX5_GET(attach_to_mcg_in, in, qpn);
354 case MLX5_CMD_OP_ALLOC_XRCD:
355 return MLX5_GET(alloc_xrcd_out, out, xrcd);
356 case MLX5_CMD_OP_CREATE_PSV:
357 return MLX5_GET(create_psv_out, out, psv0_index);
359 /* The entry must match to one of the devx_is_obj_create_cmd */
365 static u64 devx_get_obj_id(const void *in)
367 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
371 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
372 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
373 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJECT |
374 MLX5_GET(general_obj_in_cmd_hdr, in,
376 MLX5_GET(general_obj_in_cmd_hdr, in,
379 case MLX5_CMD_OP_QUERY_MKEY:
380 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
381 MLX5_GET(query_mkey_in, in,
384 case MLX5_CMD_OP_QUERY_CQ:
385 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
386 MLX5_GET(query_cq_in, in, cqn));
388 case MLX5_CMD_OP_MODIFY_CQ:
389 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
390 MLX5_GET(modify_cq_in, in, cqn));
392 case MLX5_CMD_OP_QUERY_SQ:
393 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
394 MLX5_GET(query_sq_in, in, sqn));
396 case MLX5_CMD_OP_MODIFY_SQ:
397 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
398 MLX5_GET(modify_sq_in, in, sqn));
400 case MLX5_CMD_OP_QUERY_RQ:
401 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
402 MLX5_GET(query_rq_in, in, rqn));
404 case MLX5_CMD_OP_MODIFY_RQ:
405 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
406 MLX5_GET(modify_rq_in, in, rqn));
408 case MLX5_CMD_OP_QUERY_RMP:
409 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
410 MLX5_GET(query_rmp_in, in, rmpn));
412 case MLX5_CMD_OP_MODIFY_RMP:
413 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
414 MLX5_GET(modify_rmp_in, in, rmpn));
416 case MLX5_CMD_OP_QUERY_RQT:
417 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
418 MLX5_GET(query_rqt_in, in, rqtn));
420 case MLX5_CMD_OP_MODIFY_RQT:
421 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
422 MLX5_GET(modify_rqt_in, in, rqtn));
424 case MLX5_CMD_OP_QUERY_TIR:
425 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
426 MLX5_GET(query_tir_in, in, tirn));
428 case MLX5_CMD_OP_MODIFY_TIR:
429 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
430 MLX5_GET(modify_tir_in, in, tirn));
432 case MLX5_CMD_OP_QUERY_TIS:
433 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
434 MLX5_GET(query_tis_in, in, tisn));
436 case MLX5_CMD_OP_MODIFY_TIS:
437 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
438 MLX5_GET(modify_tis_in, in, tisn));
440 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
441 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
442 MLX5_GET(query_flow_table_in, in,
445 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
446 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
447 MLX5_GET(modify_flow_table_in, in,
450 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
451 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
452 MLX5_GET(query_flow_group_in, in,
455 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
456 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
457 MLX5_GET(query_fte_in, in,
460 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
461 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
462 MLX5_GET(set_fte_in, in, flow_index));
464 case MLX5_CMD_OP_QUERY_Q_COUNTER:
465 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
466 MLX5_GET(query_q_counter_in, in,
469 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
470 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
471 MLX5_GET(query_flow_counter_in, in,
474 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
475 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
476 MLX5_GET(query_modify_header_context_in,
477 in, modify_header_id));
479 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
480 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
481 MLX5_GET(query_scheduling_element_in,
482 in, scheduling_element_id));
484 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
485 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
486 MLX5_GET(modify_scheduling_element_in,
487 in, scheduling_element_id));
489 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
490 obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
491 MLX5_GET(add_vxlan_udp_dport_in, in,
494 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
495 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
496 MLX5_GET(query_l2_table_entry_in, in,
499 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
500 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
501 MLX5_GET(set_l2_table_entry_in, in,
504 case MLX5_CMD_OP_QUERY_QP:
505 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
506 MLX5_GET(query_qp_in, in, qpn));
508 case MLX5_CMD_OP_RST2INIT_QP:
509 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
510 MLX5_GET(rst2init_qp_in, in, qpn));
512 case MLX5_CMD_OP_INIT2INIT_QP:
513 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
514 MLX5_GET(init2init_qp_in, in, qpn));
516 case MLX5_CMD_OP_INIT2RTR_QP:
517 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
518 MLX5_GET(init2rtr_qp_in, in, qpn));
520 case MLX5_CMD_OP_RTR2RTS_QP:
521 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
522 MLX5_GET(rtr2rts_qp_in, in, qpn));
524 case MLX5_CMD_OP_RTS2RTS_QP:
525 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
526 MLX5_GET(rts2rts_qp_in, in, qpn));
528 case MLX5_CMD_OP_SQERR2RTS_QP:
529 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
530 MLX5_GET(sqerr2rts_qp_in, in, qpn));
532 case MLX5_CMD_OP_2ERR_QP:
533 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
534 MLX5_GET(qp_2err_in, in, qpn));
536 case MLX5_CMD_OP_2RST_QP:
537 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
538 MLX5_GET(qp_2rst_in, in, qpn));
540 case MLX5_CMD_OP_QUERY_DCT:
541 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
542 MLX5_GET(query_dct_in, in, dctn));
544 case MLX5_CMD_OP_QUERY_XRQ:
545 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
546 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
547 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
548 MLX5_GET(query_xrq_in, in, xrqn));
550 case MLX5_CMD_OP_QUERY_XRC_SRQ:
551 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
552 MLX5_GET(query_xrc_srq_in, in,
555 case MLX5_CMD_OP_ARM_XRC_SRQ:
556 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
557 MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
559 case MLX5_CMD_OP_QUERY_SRQ:
560 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
561 MLX5_GET(query_srq_in, in, srqn));
563 case MLX5_CMD_OP_ARM_RQ:
564 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
565 MLX5_GET(arm_rq_in, in, srq_number));
567 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
568 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
569 MLX5_GET(drain_dct_in, in, dctn));
571 case MLX5_CMD_OP_ARM_XRQ:
572 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
573 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
574 case MLX5_CMD_OP_MODIFY_XRQ:
575 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
576 MLX5_GET(arm_xrq_in, in, xrqn));
578 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
579 obj_id = get_enc_obj_id
580 (MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
581 MLX5_GET(query_packet_reformat_context_in,
582 in, packet_reformat_id));
591 static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
592 struct ib_uobject *uobj, const void *in)
594 struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
595 u64 obj_id = devx_get_obj_id(in);
600 switch (uobj_get_object_id(uobj)) {
601 case UVERBS_OBJECT_CQ:
602 return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
603 to_mcq(uobj->object)->mcq.cqn) ==
606 case UVERBS_OBJECT_SRQ:
608 struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
611 switch (srq->common.res) {
613 opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
616 opcode = MLX5_CMD_OP_CREATE_XRQ;
619 if (!dev->mdev->issi)
620 opcode = MLX5_CMD_OP_CREATE_SRQ;
622 opcode = MLX5_CMD_OP_CREATE_RMP;
625 return get_enc_obj_id(opcode,
626 to_msrq(uobj->object)->msrq.srqn) ==
630 case UVERBS_OBJECT_QP:
632 struct mlx5_ib_qp *qp = to_mqp(uobj->object);
634 if (qp->type == IB_QPT_RAW_PACKET ||
635 (qp->flags & IB_QP_CREATE_SOURCE_QPN)) {
636 struct mlx5_ib_raw_packet_qp *raw_packet_qp =
638 struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
639 struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
641 return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
642 rq->base.mqp.qpn) == obj_id ||
643 get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
644 sq->base.mqp.qpn) == obj_id ||
645 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
646 rq->tirn) == obj_id ||
647 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
648 sq->tisn) == obj_id);
651 if (qp->type == MLX5_IB_QPT_DCT)
652 return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
653 qp->dct.mdct.mqp.qpn) == obj_id;
654 return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
655 qp->ibqp.qp_num) == obj_id;
658 case UVERBS_OBJECT_WQ:
659 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
660 to_mrwq(uobj->object)->core_qp.qpn) ==
663 case UVERBS_OBJECT_RWQ_IND_TBL:
664 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
665 to_mrwq_ind_table(uobj->object)->rqtn) ==
668 case MLX5_IB_OBJECT_DEVX_OBJ:
670 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
671 struct devx_obj *devx_uobj = uobj->object;
673 if (opcode == MLX5_CMD_OP_QUERY_FLOW_COUNTER &&
674 devx_uobj->flow_counter_bulk_size) {
677 end = devx_uobj->obj_id +
678 devx_uobj->flow_counter_bulk_size;
679 return devx_uobj->obj_id <= obj_id && end > obj_id;
682 return devx_uobj->obj_id == obj_id;
690 static void devx_set_umem_valid(const void *in)
692 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
695 case MLX5_CMD_OP_CREATE_MKEY:
696 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
698 case MLX5_CMD_OP_CREATE_CQ:
702 MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
703 cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
704 MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
707 case MLX5_CMD_OP_CREATE_QP:
711 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
712 MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
713 MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
717 case MLX5_CMD_OP_CREATE_RQ:
721 rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
722 wq = MLX5_ADDR_OF(rqc, rqc, wq);
723 MLX5_SET(wq, wq, dbr_umem_valid, 1);
724 MLX5_SET(wq, wq, wq_umem_valid, 1);
728 case MLX5_CMD_OP_CREATE_SQ:
732 sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
733 wq = MLX5_ADDR_OF(sqc, sqc, wq);
734 MLX5_SET(wq, wq, dbr_umem_valid, 1);
735 MLX5_SET(wq, wq, wq_umem_valid, 1);
739 case MLX5_CMD_OP_MODIFY_CQ:
740 MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
743 case MLX5_CMD_OP_CREATE_RMP:
747 rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
748 wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
749 MLX5_SET(wq, wq, dbr_umem_valid, 1);
750 MLX5_SET(wq, wq, wq_umem_valid, 1);
754 case MLX5_CMD_OP_CREATE_XRQ:
758 xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
759 wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
760 MLX5_SET(wq, wq, dbr_umem_valid, 1);
761 MLX5_SET(wq, wq, wq_umem_valid, 1);
765 case MLX5_CMD_OP_CREATE_XRC_SRQ:
769 MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
770 xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
771 xrc_srq_context_entry);
772 MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
781 static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
783 *opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
786 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
787 case MLX5_CMD_OP_CREATE_MKEY:
788 case MLX5_CMD_OP_CREATE_CQ:
789 case MLX5_CMD_OP_ALLOC_PD:
790 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
791 case MLX5_CMD_OP_CREATE_RMP:
792 case MLX5_CMD_OP_CREATE_SQ:
793 case MLX5_CMD_OP_CREATE_RQ:
794 case MLX5_CMD_OP_CREATE_RQT:
795 case MLX5_CMD_OP_CREATE_TIR:
796 case MLX5_CMD_OP_CREATE_TIS:
797 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
798 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
799 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
800 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
801 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
802 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
803 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
804 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
805 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
806 case MLX5_CMD_OP_CREATE_QP:
807 case MLX5_CMD_OP_CREATE_SRQ:
808 case MLX5_CMD_OP_CREATE_XRC_SRQ:
809 case MLX5_CMD_OP_CREATE_DCT:
810 case MLX5_CMD_OP_CREATE_XRQ:
811 case MLX5_CMD_OP_ATTACH_TO_MCG:
812 case MLX5_CMD_OP_ALLOC_XRCD:
814 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
816 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
821 case MLX5_CMD_OP_CREATE_PSV:
823 u8 num_psv = MLX5_GET(create_psv_in, in, num_psv);
834 static bool devx_is_obj_modify_cmd(const void *in)
836 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
839 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
840 case MLX5_CMD_OP_MODIFY_CQ:
841 case MLX5_CMD_OP_MODIFY_RMP:
842 case MLX5_CMD_OP_MODIFY_SQ:
843 case MLX5_CMD_OP_MODIFY_RQ:
844 case MLX5_CMD_OP_MODIFY_RQT:
845 case MLX5_CMD_OP_MODIFY_TIR:
846 case MLX5_CMD_OP_MODIFY_TIS:
847 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
848 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
849 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
850 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
851 case MLX5_CMD_OP_RST2INIT_QP:
852 case MLX5_CMD_OP_INIT2RTR_QP:
853 case MLX5_CMD_OP_INIT2INIT_QP:
854 case MLX5_CMD_OP_RTR2RTS_QP:
855 case MLX5_CMD_OP_RTS2RTS_QP:
856 case MLX5_CMD_OP_SQERR2RTS_QP:
857 case MLX5_CMD_OP_2ERR_QP:
858 case MLX5_CMD_OP_2RST_QP:
859 case MLX5_CMD_OP_ARM_XRC_SRQ:
860 case MLX5_CMD_OP_ARM_RQ:
861 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
862 case MLX5_CMD_OP_ARM_XRQ:
863 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
864 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
865 case MLX5_CMD_OP_MODIFY_XRQ:
867 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
869 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
880 static bool devx_is_obj_query_cmd(const void *in)
882 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
885 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
886 case MLX5_CMD_OP_QUERY_MKEY:
887 case MLX5_CMD_OP_QUERY_CQ:
888 case MLX5_CMD_OP_QUERY_RMP:
889 case MLX5_CMD_OP_QUERY_SQ:
890 case MLX5_CMD_OP_QUERY_RQ:
891 case MLX5_CMD_OP_QUERY_RQT:
892 case MLX5_CMD_OP_QUERY_TIR:
893 case MLX5_CMD_OP_QUERY_TIS:
894 case MLX5_CMD_OP_QUERY_Q_COUNTER:
895 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
896 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
897 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
898 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
899 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
900 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
901 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
902 case MLX5_CMD_OP_QUERY_QP:
903 case MLX5_CMD_OP_QUERY_SRQ:
904 case MLX5_CMD_OP_QUERY_XRC_SRQ:
905 case MLX5_CMD_OP_QUERY_DCT:
906 case MLX5_CMD_OP_QUERY_XRQ:
907 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
908 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
909 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
916 static bool devx_is_whitelist_cmd(void *in)
918 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
921 case MLX5_CMD_OP_QUERY_HCA_CAP:
922 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
923 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
924 case MLX5_CMD_OP_QUERY_ESW_FUNCTIONS:
931 static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
933 if (devx_is_whitelist_cmd(cmd_in)) {
934 struct mlx5_ib_dev *dev;
939 dev = to_mdev(c->ibucontext.device);
940 if (dev->devx_whitelist_uid)
941 return dev->devx_whitelist_uid;
952 static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
954 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
956 /* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
957 if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
958 MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
959 (opcode >= MLX5_CMD_OP_GENERAL_START &&
960 opcode < MLX5_CMD_OP_GENERAL_END))
964 case MLX5_CMD_OP_QUERY_HCA_CAP:
965 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
966 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
967 case MLX5_CMD_OP_QUERY_VPORT_STATE:
968 case MLX5_CMD_OP_QUERY_ADAPTER:
969 case MLX5_CMD_OP_QUERY_ISSI:
970 case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
971 case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
972 case MLX5_CMD_OP_QUERY_VNIC_ENV:
973 case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
974 case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
975 case MLX5_CMD_OP_NOP:
976 case MLX5_CMD_OP_QUERY_CONG_STATUS:
977 case MLX5_CMD_OP_QUERY_CONG_PARAMS:
978 case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
979 case MLX5_CMD_OP_QUERY_LAG:
980 case MLX5_CMD_OP_QUERY_ESW_FUNCTIONS:
987 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
988 struct uverbs_attr_bundle *attrs)
990 struct mlx5_ib_ucontext *c;
991 struct mlx5_ib_dev *dev;
996 if (uverbs_copy_from(&user_vector, attrs,
997 MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
1000 c = devx_ufile2uctx(attrs);
1003 dev = to_mdev(c->ibucontext.device);
1005 err = mlx5_comp_eqn_get(dev->mdev, user_vector, &dev_eqn);
1009 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
1010 &dev_eqn, sizeof(dev_eqn)))
1018 * The hardware protection mechanism works like this: Each device object that
1019 * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
1020 * the device specification manual) upon its creation. Then upon doorbell,
1021 * hardware fetches the object context for which the doorbell was rang, and
1022 * validates that the UAR through which the DB was rang matches the UAR ID
1024 * If no match the doorbell is silently ignored by the hardware. Of course,
1025 * the user cannot ring a doorbell on a UAR that was not mapped to it.
1026 * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
1027 * mailboxes (except tagging them with UID), we expose to the user its UAR
1028 * ID, so it can embed it in these objects in the expected specification
1029 * format. So the only thing the user can do is hurt itself by creating a
1030 * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
1031 * may ring a doorbell on its objects.
1032 * The consequence of that will be that another user can schedule a QP/SQ
1033 * of the buggy user for execution (just insert it to the hardware schedule
1034 * queue or arm its CQ for event generation), no further harm is expected.
1036 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
1037 struct uverbs_attr_bundle *attrs)
1039 struct mlx5_ib_ucontext *c;
1040 struct mlx5_ib_dev *dev;
1044 c = devx_ufile2uctx(attrs);
1047 dev = to_mdev(c->ibucontext.device);
1049 if (uverbs_copy_from(&user_idx, attrs,
1050 MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
1053 dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
1057 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
1058 &dev_idx, sizeof(dev_idx)))
1064 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
1065 struct uverbs_attr_bundle *attrs)
1067 struct mlx5_ib_ucontext *c;
1068 struct mlx5_ib_dev *dev;
1069 void *cmd_in = uverbs_attr_get_alloced_ptr(
1070 attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
1071 int cmd_out_len = uverbs_attr_get_len(attrs,
1072 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
1077 c = devx_ufile2uctx(attrs);
1080 dev = to_mdev(c->ibucontext.device);
1082 uid = devx_get_uid(c, cmd_in);
1086 /* Only white list of some general HCA commands are allowed for this method. */
1087 if (!devx_is_general_cmd(cmd_in, dev))
1090 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1091 if (IS_ERR(cmd_out))
1092 return PTR_ERR(cmd_out);
1094 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1095 err = mlx5_cmd_do(dev->mdev, cmd_in,
1096 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1097 cmd_out, cmd_out_len);
1098 if (err && err != -EREMOTEIO)
1101 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1107 static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1111 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
1112 u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1114 *obj_id = devx_get_created_obj_id(in, out, opcode);
1115 *dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1116 MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1119 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
1120 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJECT);
1121 MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1122 MLX5_SET(general_obj_in_cmd_hdr, din, obj_type,
1123 MLX5_GET(general_obj_in_cmd_hdr, in, obj_type));
1126 case MLX5_CMD_OP_CREATE_UMEM:
1127 MLX5_SET(destroy_umem_in, din, opcode,
1128 MLX5_CMD_OP_DESTROY_UMEM);
1129 MLX5_SET(destroy_umem_in, din, umem_id, *obj_id);
1131 case MLX5_CMD_OP_CREATE_MKEY:
1132 MLX5_SET(destroy_mkey_in, din, opcode,
1133 MLX5_CMD_OP_DESTROY_MKEY);
1134 MLX5_SET(destroy_mkey_in, din, mkey_index, *obj_id);
1136 case MLX5_CMD_OP_CREATE_CQ:
1137 MLX5_SET(destroy_cq_in, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1138 MLX5_SET(destroy_cq_in, din, cqn, *obj_id);
1140 case MLX5_CMD_OP_ALLOC_PD:
1141 MLX5_SET(dealloc_pd_in, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1142 MLX5_SET(dealloc_pd_in, din, pd, *obj_id);
1144 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1145 MLX5_SET(dealloc_transport_domain_in, din, opcode,
1146 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1147 MLX5_SET(dealloc_transport_domain_in, din, transport_domain,
1150 case MLX5_CMD_OP_CREATE_RMP:
1151 MLX5_SET(destroy_rmp_in, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1152 MLX5_SET(destroy_rmp_in, din, rmpn, *obj_id);
1154 case MLX5_CMD_OP_CREATE_SQ:
1155 MLX5_SET(destroy_sq_in, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1156 MLX5_SET(destroy_sq_in, din, sqn, *obj_id);
1158 case MLX5_CMD_OP_CREATE_RQ:
1159 MLX5_SET(destroy_rq_in, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1160 MLX5_SET(destroy_rq_in, din, rqn, *obj_id);
1162 case MLX5_CMD_OP_CREATE_RQT:
1163 MLX5_SET(destroy_rqt_in, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1164 MLX5_SET(destroy_rqt_in, din, rqtn, *obj_id);
1166 case MLX5_CMD_OP_CREATE_TIR:
1167 MLX5_SET(destroy_tir_in, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1168 MLX5_SET(destroy_tir_in, din, tirn, *obj_id);
1170 case MLX5_CMD_OP_CREATE_TIS:
1171 MLX5_SET(destroy_tis_in, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1172 MLX5_SET(destroy_tis_in, din, tisn, *obj_id);
1174 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1175 MLX5_SET(dealloc_q_counter_in, din, opcode,
1176 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1177 MLX5_SET(dealloc_q_counter_in, din, counter_set_id, *obj_id);
1179 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1180 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1181 MLX5_SET(destroy_flow_table_in, din, other_vport,
1182 MLX5_GET(create_flow_table_in, in, other_vport));
1183 MLX5_SET(destroy_flow_table_in, din, vport_number,
1184 MLX5_GET(create_flow_table_in, in, vport_number));
1185 MLX5_SET(destroy_flow_table_in, din, table_type,
1186 MLX5_GET(create_flow_table_in, in, table_type));
1187 MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1188 MLX5_SET(destroy_flow_table_in, din, opcode,
1189 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1191 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1192 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1193 MLX5_SET(destroy_flow_group_in, din, other_vport,
1194 MLX5_GET(create_flow_group_in, in, other_vport));
1195 MLX5_SET(destroy_flow_group_in, din, vport_number,
1196 MLX5_GET(create_flow_group_in, in, vport_number));
1197 MLX5_SET(destroy_flow_group_in, din, table_type,
1198 MLX5_GET(create_flow_group_in, in, table_type));
1199 MLX5_SET(destroy_flow_group_in, din, table_id,
1200 MLX5_GET(create_flow_group_in, in, table_id));
1201 MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1202 MLX5_SET(destroy_flow_group_in, din, opcode,
1203 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1205 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1206 *dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1207 MLX5_SET(delete_fte_in, din, other_vport,
1208 MLX5_GET(set_fte_in, in, other_vport));
1209 MLX5_SET(delete_fte_in, din, vport_number,
1210 MLX5_GET(set_fte_in, in, vport_number));
1211 MLX5_SET(delete_fte_in, din, table_type,
1212 MLX5_GET(set_fte_in, in, table_type));
1213 MLX5_SET(delete_fte_in, din, table_id,
1214 MLX5_GET(set_fte_in, in, table_id));
1215 MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1216 MLX5_SET(delete_fte_in, din, opcode,
1217 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1219 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1220 MLX5_SET(dealloc_flow_counter_in, din, opcode,
1221 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1222 MLX5_SET(dealloc_flow_counter_in, din, flow_counter_id,
1225 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1226 MLX5_SET(dealloc_packet_reformat_context_in, din, opcode,
1227 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1228 MLX5_SET(dealloc_packet_reformat_context_in, din,
1229 packet_reformat_id, *obj_id);
1231 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1232 MLX5_SET(dealloc_modify_header_context_in, din, opcode,
1233 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1234 MLX5_SET(dealloc_modify_header_context_in, din,
1235 modify_header_id, *obj_id);
1237 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1238 *dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1239 MLX5_SET(destroy_scheduling_element_in, din,
1240 scheduling_hierarchy,
1241 MLX5_GET(create_scheduling_element_in, in,
1242 scheduling_hierarchy));
1243 MLX5_SET(destroy_scheduling_element_in, din,
1244 scheduling_element_id, *obj_id);
1245 MLX5_SET(destroy_scheduling_element_in, din, opcode,
1246 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1248 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1249 *dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1250 MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1251 MLX5_SET(delete_vxlan_udp_dport_in, din, opcode,
1252 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1254 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1255 *dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1256 MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1257 MLX5_SET(delete_l2_table_entry_in, din, opcode,
1258 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1260 case MLX5_CMD_OP_CREATE_QP:
1261 MLX5_SET(destroy_qp_in, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1262 MLX5_SET(destroy_qp_in, din, qpn, *obj_id);
1264 case MLX5_CMD_OP_CREATE_SRQ:
1265 MLX5_SET(destroy_srq_in, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1266 MLX5_SET(destroy_srq_in, din, srqn, *obj_id);
1268 case MLX5_CMD_OP_CREATE_XRC_SRQ:
1269 MLX5_SET(destroy_xrc_srq_in, din, opcode,
1270 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1271 MLX5_SET(destroy_xrc_srq_in, din, xrc_srqn, *obj_id);
1273 case MLX5_CMD_OP_CREATE_DCT:
1274 MLX5_SET(destroy_dct_in, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1275 MLX5_SET(destroy_dct_in, din, dctn, *obj_id);
1277 case MLX5_CMD_OP_CREATE_XRQ:
1278 MLX5_SET(destroy_xrq_in, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1279 MLX5_SET(destroy_xrq_in, din, xrqn, *obj_id);
1281 case MLX5_CMD_OP_ATTACH_TO_MCG:
1282 *dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1283 MLX5_SET(detach_from_mcg_in, din, qpn,
1284 MLX5_GET(attach_to_mcg_in, in, qpn));
1285 memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1286 MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1287 MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1288 MLX5_SET(detach_from_mcg_in, din, opcode,
1289 MLX5_CMD_OP_DETACH_FROM_MCG);
1290 MLX5_SET(detach_from_mcg_in, din, qpn, *obj_id);
1292 case MLX5_CMD_OP_ALLOC_XRCD:
1293 MLX5_SET(dealloc_xrcd_in, din, opcode,
1294 MLX5_CMD_OP_DEALLOC_XRCD);
1295 MLX5_SET(dealloc_xrcd_in, din, xrcd, *obj_id);
1297 case MLX5_CMD_OP_CREATE_PSV:
1298 MLX5_SET(destroy_psv_in, din, opcode,
1299 MLX5_CMD_OP_DESTROY_PSV);
1300 MLX5_SET(destroy_psv_in, din, psvn, *obj_id);
1303 /* The entry must match to one of the devx_is_obj_create_cmd */
1309 static int devx_handle_mkey_indirect(struct devx_obj *obj,
1310 struct mlx5_ib_dev *dev,
1311 void *in, void *out)
1313 struct mlx5_ib_mkey *mkey = &obj->mkey;
1317 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1318 key = MLX5_GET(mkc, mkc, mkey_7_0);
1319 mkey->key = mlx5_idx_to_mkey(
1320 MLX5_GET(create_mkey_out, out, mkey_index)) | key;
1321 mkey->type = MLX5_MKEY_INDIRECT_DEVX;
1322 mkey->ndescs = MLX5_GET(mkc, mkc, translations_octword_size);
1323 init_waitqueue_head(&mkey->wait);
1325 return mlx5r_store_odp_mkey(dev, mkey);
1328 static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1329 struct devx_obj *obj,
1330 void *in, int in_len)
1332 int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1333 MLX5_FLD_SZ_BYTES(create_mkey_in,
1334 memory_key_mkey_entry);
1338 if (in_len < min_len)
1341 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1343 access_mode = MLX5_GET(mkc, mkc, access_mode_1_0);
1344 access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1346 if (access_mode == MLX5_MKC_ACCESS_MODE_KLMS ||
1347 access_mode == MLX5_MKC_ACCESS_MODE_KSM) {
1348 if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING))
1349 obj->flags |= DEVX_OBJ_FLAGS_INDIRECT_MKEY;
1353 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1357 static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1358 struct devx_event_subscription *sub)
1360 struct devx_event *event;
1361 struct devx_obj_event *xa_val_level2;
1363 if (sub->is_cleaned)
1366 sub->is_cleaned = 1;
1367 list_del_rcu(&sub->xa_list);
1369 if (list_empty(&sub->obj_list))
1372 list_del_rcu(&sub->obj_list);
1373 /* check whether key level 1 for this obj_sub_list is empty */
1374 event = xa_load(&dev->devx_event_table.event_xa,
1375 sub->xa_key_level1);
1378 xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1379 if (list_empty(&xa_val_level2->obj_sub_list)) {
1380 xa_erase(&event->object_ids,
1381 sub->xa_key_level2);
1382 kfree_rcu(xa_val_level2, rcu);
1386 static int devx_obj_cleanup(struct ib_uobject *uobject,
1387 enum rdma_remove_reason why,
1388 struct uverbs_attr_bundle *attrs)
1390 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1391 struct mlx5_devx_event_table *devx_event_table;
1392 struct devx_obj *obj = uobject->object;
1393 struct devx_event_subscription *sub_entry, *tmp;
1394 struct mlx5_ib_dev *dev;
1397 dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1398 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY &&
1399 xa_erase(&obj->ib_dev->odp_mkeys,
1400 mlx5_base_mkey(obj->mkey.key)))
1402 * The pagefault_single_data_segment() does commands against
1403 * the mmkey, we must wait for that to stop before freeing the
1404 * mkey, as another allocation could get the same mkey #.
1406 mlx5r_deref_wait_odp_mkey(&obj->mkey);
1408 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1409 ret = mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1410 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1411 ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1413 ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1414 obj->dinlen, out, sizeof(out));
1418 devx_event_table = &dev->devx_event_table;
1420 mutex_lock(&devx_event_table->event_xa_lock);
1421 list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1422 devx_cleanup_subscription(dev, sub_entry);
1423 mutex_unlock(&devx_event_table->event_xa_lock);
1429 static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1431 struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1432 struct mlx5_devx_event_table *table;
1433 struct devx_event *event;
1434 struct devx_obj_event *obj_event;
1435 u32 obj_id = mcq->cqn;
1437 table = &obj->ib_dev->devx_event_table;
1439 event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1443 obj_event = xa_load(&event->object_ids, obj_id);
1447 dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1452 static bool is_apu_cq(struct mlx5_ib_dev *dev, const void *in)
1454 if (!MLX5_CAP_GEN(dev->mdev, apu) ||
1455 !MLX5_GET(cqc, MLX5_ADDR_OF(create_cq_in, in, cq_context), apu_cq))
1461 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1462 struct uverbs_attr_bundle *attrs)
1464 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1465 int cmd_out_len = uverbs_attr_get_len(attrs,
1466 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1467 int cmd_in_len = uverbs_attr_get_len(attrs,
1468 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1470 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1471 attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1472 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1473 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1474 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1475 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1476 struct devx_obj *obj;
1483 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1486 uid = devx_get_uid(c, cmd_in);
1490 if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1493 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1494 if (IS_ERR(cmd_out))
1495 return PTR_ERR(cmd_out);
1497 obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1501 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1502 if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1503 err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1507 devx_set_umem_valid(cmd_in);
1510 if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1511 obj->flags |= DEVX_OBJ_FLAGS_DCT;
1512 err = mlx5_core_create_dct(dev, &obj->core_dct, cmd_in,
1513 cmd_in_len, cmd_out, cmd_out_len);
1514 } else if (opcode == MLX5_CMD_OP_CREATE_CQ &&
1515 !is_apu_cq(dev, cmd_in)) {
1516 obj->flags |= DEVX_OBJ_FLAGS_CQ;
1517 obj->core_cq.comp = devx_cq_comp;
1518 err = mlx5_create_cq(dev->mdev, &obj->core_cq,
1519 cmd_in, cmd_in_len, cmd_out,
1522 err = mlx5_cmd_do(dev->mdev, cmd_in, cmd_in_len,
1523 cmd_out, cmd_out_len);
1526 if (err == -EREMOTEIO)
1527 err2 = uverbs_copy_to(attrs,
1528 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
1529 cmd_out, cmd_out_len);
1533 if (opcode == MLX5_CMD_OP_ALLOC_FLOW_COUNTER) {
1534 u32 bulk = MLX5_GET(alloc_flow_counter_in,
1536 flow_counter_bulk_log_size);
1541 bulk = 128UL * MLX5_GET(alloc_flow_counter_in,
1544 obj->flow_counter_bulk_size = bulk;
1548 INIT_LIST_HEAD(&obj->event_sub);
1550 devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1552 WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1554 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1558 if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT)
1559 obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1560 obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1562 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1563 err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out);
1570 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1571 mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1572 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1573 mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1575 mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1582 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1583 struct uverbs_attr_bundle *attrs)
1585 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1586 int cmd_out_len = uverbs_attr_get_len(attrs,
1587 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1588 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1589 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1590 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1591 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1592 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1597 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1600 uid = devx_get_uid(c, cmd_in);
1604 if (!devx_is_obj_modify_cmd(cmd_in))
1607 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1610 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1611 if (IS_ERR(cmd_out))
1612 return PTR_ERR(cmd_out);
1614 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1615 devx_set_umem_valid(cmd_in);
1617 err = mlx5_cmd_do(mdev->mdev, cmd_in,
1618 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1619 cmd_out, cmd_out_len);
1620 if (err && err != -EREMOTEIO)
1623 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1624 cmd_out, cmd_out_len);
1629 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1630 struct uverbs_attr_bundle *attrs)
1632 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1633 int cmd_out_len = uverbs_attr_get_len(attrs,
1634 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1635 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1636 MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1637 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1638 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1642 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1644 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1647 uid = devx_get_uid(c, cmd_in);
1651 if (!devx_is_obj_query_cmd(cmd_in))
1654 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1657 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1658 if (IS_ERR(cmd_out))
1659 return PTR_ERR(cmd_out);
1661 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1662 err = mlx5_cmd_do(mdev->mdev, cmd_in,
1663 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1664 cmd_out, cmd_out_len);
1665 if (err && err != -EREMOTEIO)
1668 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1669 cmd_out, cmd_out_len);
1674 struct devx_async_event_queue {
1676 wait_queue_head_t poll_wait;
1677 struct list_head event_list;
1678 atomic_t bytes_in_use;
1682 struct devx_async_cmd_event_file {
1683 struct ib_uobject uobj;
1684 struct devx_async_event_queue ev_queue;
1685 struct mlx5_async_ctx async_ctx;
1688 static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1690 spin_lock_init(&ev_queue->lock);
1691 INIT_LIST_HEAD(&ev_queue->event_list);
1692 init_waitqueue_head(&ev_queue->poll_wait);
1693 atomic_set(&ev_queue->bytes_in_use, 0);
1694 ev_queue->is_destroyed = 0;
1697 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1698 struct uverbs_attr_bundle *attrs)
1700 struct devx_async_cmd_event_file *ev_file;
1702 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1703 attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1704 struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1706 ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1708 devx_init_event_queue(&ev_file->ev_queue);
1709 mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1713 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1714 struct uverbs_attr_bundle *attrs)
1716 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1717 attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1718 struct devx_async_event_file *ev_file;
1719 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1720 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1721 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1725 err = uverbs_get_flags32(&flags, attrs,
1726 MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1727 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1732 ev_file = container_of(uobj, struct devx_async_event_file,
1734 spin_lock_init(&ev_file->lock);
1735 INIT_LIST_HEAD(&ev_file->event_list);
1736 init_waitqueue_head(&ev_file->poll_wait);
1737 if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1738 ev_file->omit_data = 1;
1739 INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1741 get_device(&dev->ib_dev.dev);
1745 static void devx_query_callback(int status, struct mlx5_async_work *context)
1747 struct devx_async_data *async_data =
1748 container_of(context, struct devx_async_data, cb_work);
1749 struct devx_async_cmd_event_file *ev_file = async_data->ev_file;
1750 struct devx_async_event_queue *ev_queue = &ev_file->ev_queue;
1751 unsigned long flags;
1754 * Note that if the struct devx_async_cmd_event_file uobj begins to be
1755 * destroyed it will block at mlx5_cmd_cleanup_async_ctx() until this
1756 * routine returns, ensuring that it always remains valid here.
1758 spin_lock_irqsave(&ev_queue->lock, flags);
1759 list_add_tail(&async_data->list, &ev_queue->event_list);
1760 spin_unlock_irqrestore(&ev_queue->lock, flags);
1762 wake_up_interruptible(&ev_queue->poll_wait);
1765 #define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1767 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1768 struct uverbs_attr_bundle *attrs)
1770 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1771 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1772 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1774 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1776 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1777 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1778 struct ib_uobject *fd_uobj;
1781 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1782 struct devx_async_cmd_event_file *ev_file;
1783 struct devx_async_data *async_data;
1785 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1788 uid = devx_get_uid(c, cmd_in);
1792 if (!devx_is_obj_query_cmd(cmd_in))
1795 err = uverbs_get_const(&cmd_out_len, attrs,
1796 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1800 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1803 fd_uobj = uverbs_attr_get_uobject(attrs,
1804 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1805 if (IS_ERR(fd_uobj))
1806 return PTR_ERR(fd_uobj);
1808 ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1811 if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1812 MAX_ASYNC_BYTES_IN_USE) {
1813 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1817 async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1818 cmd_out_len), GFP_KERNEL);
1824 err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1825 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1829 async_data->cmd_out_len = cmd_out_len;
1830 async_data->mdev = mdev;
1831 async_data->ev_file = ev_file;
1833 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1834 err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1835 uverbs_attr_get_len(attrs,
1836 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1837 async_data->hdr.out_data,
1838 async_data->cmd_out_len,
1839 devx_query_callback, &async_data->cb_work);
1849 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1854 subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1859 struct devx_event *event;
1860 struct devx_obj_event *xa_val_level2;
1862 /* Level 1 is valid for future use, no need to free */
1866 event = xa_load(&devx_event_table->event_xa, key_level1);
1869 xa_val_level2 = xa_load(&event->object_ids,
1871 if (list_empty(&xa_val_level2->obj_sub_list)) {
1872 xa_erase(&event->object_ids,
1874 kfree_rcu(xa_val_level2, rcu);
1879 subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1884 struct devx_obj_event *obj_event;
1885 struct devx_event *event;
1888 event = xa_load(&devx_event_table->event_xa, key_level1);
1890 event = kzalloc(sizeof(*event), GFP_KERNEL);
1894 INIT_LIST_HEAD(&event->unaffiliated_list);
1895 xa_init(&event->object_ids);
1897 err = xa_insert(&devx_event_table->event_xa,
1910 obj_event = xa_load(&event->object_ids, key_level2);
1912 obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1914 /* Level1 is valid for future use, no need to free */
1917 err = xa_insert(&event->object_ids,
1925 INIT_LIST_HEAD(&obj_event->obj_sub_list);
1931 static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1932 struct devx_obj *obj)
1936 for (i = 0; i < num_events; i++) {
1938 if (!is_legacy_obj_event_num(event_type_num_list[i]))
1940 } else if (!is_legacy_unaffiliated_event_num(
1941 event_type_num_list[i])) {
1949 #define MAX_SUPP_EVENT_NUM 255
1950 static bool is_valid_events(struct mlx5_core_dev *dev,
1951 int num_events, u16 *event_type_num_list,
1952 struct devx_obj *obj)
1955 __be64 *unaff_events;
1960 if (MLX5_CAP_GEN(dev, event_cap)) {
1961 aff_events = MLX5_CAP_DEV_EVENT(dev,
1962 user_affiliated_events);
1963 unaff_events = MLX5_CAP_DEV_EVENT(dev,
1964 user_unaffiliated_events);
1966 return is_valid_events_legacy(num_events, event_type_num_list,
1970 for (i = 0; i < num_events; i++) {
1971 if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1974 mask_entry = event_type_num_list[i] / 64;
1975 mask_bit = event_type_num_list[i] % 64;
1979 if (event_type_num_list[i] == 0)
1982 if (!(be64_to_cpu(aff_events[mask_entry]) &
1983 (1ull << mask_bit)))
1989 if (!(be64_to_cpu(unaff_events[mask_entry]) &
1990 (1ull << mask_bit)))
1997 #define MAX_NUM_EVENTS 16
1998 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
1999 struct uverbs_attr_bundle *attrs)
2001 struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
2003 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
2004 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2005 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2006 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2007 struct ib_uobject *fd_uobj;
2008 struct devx_obj *obj = NULL;
2009 struct devx_async_event_file *ev_file;
2010 struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
2011 u16 *event_type_num_list;
2012 struct devx_event_subscription *event_sub, *tmp_sub;
2013 struct list_head sub_list;
2015 bool use_eventfd = false;
2026 if (!IS_ERR(devx_uobj)) {
2027 obj = (struct devx_obj *)devx_uobj->object;
2029 obj_id = get_dec_obj_id(obj->obj_id);
2032 fd_uobj = uverbs_attr_get_uobject(attrs,
2033 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
2034 if (IS_ERR(fd_uobj))
2035 return PTR_ERR(fd_uobj);
2037 ev_file = container_of(fd_uobj, struct devx_async_event_file,
2040 if (uverbs_attr_is_valid(attrs,
2041 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
2042 err = uverbs_copy_from(&redirect_fd, attrs,
2043 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
2050 if (uverbs_attr_is_valid(attrs,
2051 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
2055 err = uverbs_copy_from(&cookie, attrs,
2056 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
2061 num_events = uverbs_attr_ptr_get_array_size(
2062 attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2068 if (num_events > MAX_NUM_EVENTS)
2071 event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
2072 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
2074 if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
2077 INIT_LIST_HEAD(&sub_list);
2079 /* Protect from concurrent subscriptions to same XA entries to allow
2082 mutex_lock(&devx_event_table->event_xa_lock);
2083 for (i = 0; i < num_events; i++) {
2087 obj_type = get_dec_obj_type(obj,
2088 event_type_num_list[i]);
2089 key_level1 = event_type_num_list[i] | obj_type << 16;
2091 err = subscribe_event_xa_alloc(devx_event_table,
2098 event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
2104 list_add_tail(&event_sub->event_list, &sub_list);
2105 uverbs_uobject_get(&ev_file->uobj);
2107 event_sub->eventfd =
2108 eventfd_ctx_fdget(redirect_fd);
2110 if (IS_ERR(event_sub->eventfd)) {
2111 err = PTR_ERR(event_sub->eventfd);
2112 event_sub->eventfd = NULL;
2117 event_sub->cookie = cookie;
2118 event_sub->ev_file = ev_file;
2119 /* May be needed upon cleanup the devx object/subscription */
2120 event_sub->xa_key_level1 = key_level1;
2121 event_sub->xa_key_level2 = obj_id;
2122 INIT_LIST_HEAD(&event_sub->obj_list);
2125 /* Once all the allocations and the XA data insertions were done we
2126 * can go ahead and add all the subscriptions to the relevant lists
2127 * without concern of a failure.
2129 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2130 struct devx_event *event;
2131 struct devx_obj_event *obj_event;
2133 list_del_init(&event_sub->event_list);
2135 spin_lock_irq(&ev_file->lock);
2136 list_add_tail_rcu(&event_sub->file_list,
2137 &ev_file->subscribed_events_list);
2138 spin_unlock_irq(&ev_file->lock);
2140 event = xa_load(&devx_event_table->event_xa,
2141 event_sub->xa_key_level1);
2145 list_add_tail_rcu(&event_sub->xa_list,
2146 &event->unaffiliated_list);
2150 obj_event = xa_load(&event->object_ids, obj_id);
2151 WARN_ON(!obj_event);
2152 list_add_tail_rcu(&event_sub->xa_list,
2153 &obj_event->obj_sub_list);
2154 list_add_tail_rcu(&event_sub->obj_list,
2158 mutex_unlock(&devx_event_table->event_xa_lock);
2162 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2163 list_del(&event_sub->event_list);
2165 subscribe_event_xa_dealloc(devx_event_table,
2166 event_sub->xa_key_level1,
2170 if (event_sub->eventfd)
2171 eventfd_ctx_put(event_sub->eventfd);
2172 uverbs_uobject_put(&event_sub->ev_file->uobj);
2176 mutex_unlock(&devx_event_table->event_xa_lock);
2180 static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2181 struct uverbs_attr_bundle *attrs,
2182 struct devx_umem *obj, u32 access_flags)
2188 if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2189 uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2192 err = ib_check_mr_access(&dev->ib_dev, access_flags);
2196 if (uverbs_attr_is_valid(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD)) {
2197 struct ib_umem_dmabuf *umem_dmabuf;
2200 err = uverbs_get_raw_fd(&dmabuf_fd, attrs,
2201 MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD);
2205 umem_dmabuf = ib_umem_dmabuf_get_pinned(
2206 &dev->ib_dev, addr, size, dmabuf_fd, access_flags);
2207 if (IS_ERR(umem_dmabuf))
2208 return PTR_ERR(umem_dmabuf);
2209 obj->umem = &umem_dmabuf->umem;
2211 obj->umem = ib_umem_get(&dev->ib_dev, addr, size, access_flags);
2212 if (IS_ERR(obj->umem))
2213 return PTR_ERR(obj->umem);
2218 static unsigned int devx_umem_find_best_pgsize(struct ib_umem *umem,
2219 unsigned long pgsz_bitmap)
2221 unsigned long page_size;
2223 /* Don't bother checking larger page sizes as offset must be zero and
2224 * total DEVX umem length must be equal to total umem length.
2226 pgsz_bitmap &= GENMASK_ULL(max_t(u64, order_base_2(umem->length),
2228 MLX5_ADAPTER_PAGE_SHIFT);
2232 page_size = ib_umem_find_best_pgoff(umem, pgsz_bitmap, U64_MAX);
2236 /* If the page_size is less than the CPU page size then we can use the
2237 * offset and create a umem which is a subset of the page list.
2238 * For larger page sizes we can't be sure the DMA list reflects the
2239 * VA so we must ensure that the umem extent is exactly equal to the
2240 * page list. Reduce the page size until one of these cases is true.
2242 while ((ib_umem_dma_offset(umem, page_size) != 0 ||
2243 (umem->length % page_size) != 0) &&
2244 page_size > PAGE_SIZE)
2250 static int devx_umem_reg_cmd_alloc(struct mlx5_ib_dev *dev,
2251 struct uverbs_attr_bundle *attrs,
2252 struct devx_umem *obj,
2253 struct devx_umem_reg_cmd *cmd,
2256 unsigned long pgsz_bitmap;
2257 unsigned int page_size;
2263 * If the user does not pass in pgsz_bitmap then the user promises not
2264 * to use umem_offset!=0 in any commands that allocate on top of the
2267 * If the user wants to use a umem_offset then it must pass in
2268 * pgsz_bitmap which guides the maximum page size and thus maximum
2269 * object alignment inside the umem. See the PRM.
2271 * Users are not allowed to use IOVA here, mkeys are not supported on
2274 ret = uverbs_get_const_default(&pgsz_bitmap, attrs,
2275 MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP,
2277 min(PAGE_SHIFT, MLX5_ADAPTER_PAGE_SHIFT)));
2281 page_size = devx_umem_find_best_pgsize(obj->umem, pgsz_bitmap);
2285 cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2286 (MLX5_ST_SZ_BYTES(mtt) *
2287 ib_umem_num_dma_blocks(obj->umem, page_size));
2288 cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2289 if (IS_ERR(cmd->in))
2290 return PTR_ERR(cmd->in);
2292 umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2293 mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2295 MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2296 MLX5_SET64(umem, umem, num_of_mtt,
2297 ib_umem_num_dma_blocks(obj->umem, page_size));
2298 MLX5_SET(umem, umem, log_page_size,
2299 order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
2300 MLX5_SET(umem, umem, page_offset,
2301 ib_umem_dma_offset(obj->umem, page_size));
2303 if (mlx5_umem_needs_ats(dev, obj->umem, access))
2304 MLX5_SET(umem, umem, ats, 1);
2306 mlx5_ib_populate_pas(obj->umem, page_size, mtt,
2307 (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2312 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2313 struct uverbs_attr_bundle *attrs)
2315 struct devx_umem_reg_cmd cmd;
2316 struct devx_umem *obj;
2317 struct ib_uobject *uobj = uverbs_attr_get_uobject(
2318 attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2320 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2321 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2322 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2329 err = uverbs_get_flags32(&access_flags, attrs,
2330 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2331 IB_ACCESS_LOCAL_WRITE |
2332 IB_ACCESS_REMOTE_WRITE |
2333 IB_ACCESS_REMOTE_READ |
2334 IB_ACCESS_RELAXED_ORDERING);
2338 obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2342 err = devx_umem_get(dev, &c->ibucontext, attrs, obj, access_flags);
2346 err = devx_umem_reg_cmd_alloc(dev, attrs, obj, &cmd, access_flags);
2348 goto err_umem_release;
2350 MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2351 err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2354 goto err_umem_release;
2356 obj->mdev = dev->mdev;
2358 devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2359 uverbs_finalize_uobj_create(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2361 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id,
2366 ib_umem_release(obj->umem);
2372 static int devx_umem_cleanup(struct ib_uobject *uobject,
2373 enum rdma_remove_reason why,
2374 struct uverbs_attr_bundle *attrs)
2376 struct devx_umem *obj = uobject->object;
2377 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2380 err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2384 ib_umem_release(obj->umem);
2389 static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2390 unsigned long event_type)
2392 __be64 *unaff_events;
2396 if (!MLX5_CAP_GEN(dev, event_cap))
2397 return is_legacy_unaffiliated_event_num(event_type);
2399 unaff_events = MLX5_CAP_DEV_EVENT(dev,
2400 user_unaffiliated_events);
2401 WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2403 mask_entry = event_type / 64;
2404 mask_bit = event_type % 64;
2406 if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2412 static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2414 struct mlx5_eqe *eqe = data;
2417 switch (event_type) {
2418 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2419 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2420 case MLX5_EVENT_TYPE_PATH_MIG:
2421 case MLX5_EVENT_TYPE_COMM_EST:
2422 case MLX5_EVENT_TYPE_SQ_DRAINED:
2423 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2424 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2425 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2426 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2427 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2428 obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2430 case MLX5_EVENT_TYPE_XRQ_ERROR:
2431 obj_id = be32_to_cpu(eqe->data.xrq_err.type_xrqn) & 0xffffff;
2433 case MLX5_EVENT_TYPE_DCT_DRAINED:
2434 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
2435 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2437 case MLX5_EVENT_TYPE_CQ_ERROR:
2438 obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2441 obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2448 static int deliver_event(struct devx_event_subscription *event_sub,
2451 struct devx_async_event_file *ev_file;
2452 struct devx_async_event_data *event_data;
2453 unsigned long flags;
2455 ev_file = event_sub->ev_file;
2457 if (ev_file->omit_data) {
2458 spin_lock_irqsave(&ev_file->lock, flags);
2459 if (!list_empty(&event_sub->event_list) ||
2460 ev_file->is_destroyed) {
2461 spin_unlock_irqrestore(&ev_file->lock, flags);
2465 list_add_tail(&event_sub->event_list, &ev_file->event_list);
2466 spin_unlock_irqrestore(&ev_file->lock, flags);
2467 wake_up_interruptible(&ev_file->poll_wait);
2471 event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2474 spin_lock_irqsave(&ev_file->lock, flags);
2475 ev_file->is_overflow_err = 1;
2476 spin_unlock_irqrestore(&ev_file->lock, flags);
2480 event_data->hdr.cookie = event_sub->cookie;
2481 memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2483 spin_lock_irqsave(&ev_file->lock, flags);
2484 if (!ev_file->is_destroyed)
2485 list_add_tail(&event_data->list, &ev_file->event_list);
2488 spin_unlock_irqrestore(&ev_file->lock, flags);
2489 wake_up_interruptible(&ev_file->poll_wait);
2494 static void dispatch_event_fd(struct list_head *fd_list,
2497 struct devx_event_subscription *item;
2499 list_for_each_entry_rcu(item, fd_list, xa_list) {
2501 eventfd_signal(item->eventfd);
2503 deliver_event(item, data);
2507 static int devx_event_notifier(struct notifier_block *nb,
2508 unsigned long event_type, void *data)
2510 struct mlx5_devx_event_table *table;
2511 struct mlx5_ib_dev *dev;
2512 struct devx_event *event;
2513 struct devx_obj_event *obj_event;
2515 bool is_unaffiliated;
2518 /* Explicit filtering to kernel events which may occur frequently */
2519 if (event_type == MLX5_EVENT_TYPE_CMD ||
2520 event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2523 table = container_of(nb, struct mlx5_devx_event_table, devx_nb.nb);
2524 dev = container_of(table, struct mlx5_ib_dev, devx_event_table);
2525 is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2527 if (!is_unaffiliated)
2528 obj_type = get_event_obj_type(event_type, data);
2531 event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2537 if (is_unaffiliated) {
2538 dispatch_event_fd(&event->unaffiliated_list, data);
2543 obj_id = devx_get_obj_id_from_event(event_type, data);
2544 obj_event = xa_load(&event->object_ids, obj_id);
2550 dispatch_event_fd(&obj_event->obj_sub_list, data);
2556 int mlx5_ib_devx_init(struct mlx5_ib_dev *dev)
2558 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2561 uid = mlx5_ib_devx_create(dev, false);
2563 dev->devx_whitelist_uid = uid;
2564 xa_init(&table->event_xa);
2565 mutex_init(&table->event_xa_lock);
2566 MLX5_NB_INIT(&table->devx_nb, devx_event_notifier, NOTIFY_ANY);
2567 mlx5_eq_notifier_register(dev->mdev, &table->devx_nb);
2573 void mlx5_ib_devx_cleanup(struct mlx5_ib_dev *dev)
2575 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2576 struct devx_event_subscription *sub, *tmp;
2577 struct devx_event *event;
2581 if (dev->devx_whitelist_uid) {
2582 mlx5_eq_notifier_unregister(dev->mdev, &table->devx_nb);
2583 mutex_lock(&dev->devx_event_table.event_xa_lock);
2584 xa_for_each(&table->event_xa, id, entry) {
2586 list_for_each_entry_safe(
2587 sub, tmp, &event->unaffiliated_list, xa_list)
2588 devx_cleanup_subscription(dev, sub);
2591 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2592 xa_destroy(&table->event_xa);
2594 mlx5_ib_devx_destroy(dev, dev->devx_whitelist_uid);
2598 static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2599 size_t count, loff_t *pos)
2601 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2602 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2603 struct devx_async_data *event;
2607 spin_lock_irq(&ev_queue->lock);
2609 while (list_empty(&ev_queue->event_list)) {
2610 spin_unlock_irq(&ev_queue->lock);
2612 if (filp->f_flags & O_NONBLOCK)
2615 if (wait_event_interruptible(
2616 ev_queue->poll_wait,
2617 (!list_empty(&ev_queue->event_list) ||
2618 ev_queue->is_destroyed))) {
2619 return -ERESTARTSYS;
2622 spin_lock_irq(&ev_queue->lock);
2623 if (ev_queue->is_destroyed) {
2624 spin_unlock_irq(&ev_queue->lock);
2629 event = list_entry(ev_queue->event_list.next,
2630 struct devx_async_data, list);
2631 eventsz = event->cmd_out_len +
2632 sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2634 if (eventsz > count) {
2635 spin_unlock_irq(&ev_queue->lock);
2639 list_del(ev_queue->event_list.next);
2640 spin_unlock_irq(&ev_queue->lock);
2642 if (copy_to_user(buf, &event->hdr, eventsz))
2647 atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2652 static __poll_t devx_async_cmd_event_poll(struct file *filp,
2653 struct poll_table_struct *wait)
2655 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2656 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2657 __poll_t pollflags = 0;
2659 poll_wait(filp, &ev_queue->poll_wait, wait);
2661 spin_lock_irq(&ev_queue->lock);
2662 if (ev_queue->is_destroyed)
2663 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2664 else if (!list_empty(&ev_queue->event_list))
2665 pollflags = EPOLLIN | EPOLLRDNORM;
2666 spin_unlock_irq(&ev_queue->lock);
2671 static const struct file_operations devx_async_cmd_event_fops = {
2672 .owner = THIS_MODULE,
2673 .read = devx_async_cmd_event_read,
2674 .poll = devx_async_cmd_event_poll,
2675 .release = uverbs_uobject_fd_release,
2676 .llseek = no_llseek,
2679 static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2680 size_t count, loff_t *pos)
2682 struct devx_async_event_file *ev_file = filp->private_data;
2683 struct devx_event_subscription *event_sub;
2684 struct devx_async_event_data *event;
2690 omit_data = ev_file->omit_data;
2692 spin_lock_irq(&ev_file->lock);
2694 if (ev_file->is_overflow_err) {
2695 ev_file->is_overflow_err = 0;
2696 spin_unlock_irq(&ev_file->lock);
2701 while (list_empty(&ev_file->event_list)) {
2702 spin_unlock_irq(&ev_file->lock);
2704 if (filp->f_flags & O_NONBLOCK)
2707 if (wait_event_interruptible(ev_file->poll_wait,
2708 (!list_empty(&ev_file->event_list) ||
2709 ev_file->is_destroyed))) {
2710 return -ERESTARTSYS;
2713 spin_lock_irq(&ev_file->lock);
2714 if (ev_file->is_destroyed) {
2715 spin_unlock_irq(&ev_file->lock);
2721 event_sub = list_first_entry(&ev_file->event_list,
2722 struct devx_event_subscription,
2724 eventsz = sizeof(event_sub->cookie);
2725 event_data = &event_sub->cookie;
2727 event = list_first_entry(&ev_file->event_list,
2728 struct devx_async_event_data, list);
2729 eventsz = sizeof(struct mlx5_eqe) +
2730 sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2731 event_data = &event->hdr;
2734 if (eventsz > count) {
2735 spin_unlock_irq(&ev_file->lock);
2740 list_del_init(&event_sub->event_list);
2742 list_del(&event->list);
2744 spin_unlock_irq(&ev_file->lock);
2746 if (copy_to_user(buf, event_data, eventsz))
2747 /* This points to an application issue, not a kernel concern */
2757 static __poll_t devx_async_event_poll(struct file *filp,
2758 struct poll_table_struct *wait)
2760 struct devx_async_event_file *ev_file = filp->private_data;
2761 __poll_t pollflags = 0;
2763 poll_wait(filp, &ev_file->poll_wait, wait);
2765 spin_lock_irq(&ev_file->lock);
2766 if (ev_file->is_destroyed)
2767 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2768 else if (!list_empty(&ev_file->event_list))
2769 pollflags = EPOLLIN | EPOLLRDNORM;
2770 spin_unlock_irq(&ev_file->lock);
2775 static void devx_free_subscription(struct rcu_head *rcu)
2777 struct devx_event_subscription *event_sub =
2778 container_of(rcu, struct devx_event_subscription, rcu);
2780 if (event_sub->eventfd)
2781 eventfd_ctx_put(event_sub->eventfd);
2782 uverbs_uobject_put(&event_sub->ev_file->uobj);
2786 static const struct file_operations devx_async_event_fops = {
2787 .owner = THIS_MODULE,
2788 .read = devx_async_event_read,
2789 .poll = devx_async_event_poll,
2790 .release = uverbs_uobject_fd_release,
2791 .llseek = no_llseek,
2794 static void devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
2795 enum rdma_remove_reason why)
2797 struct devx_async_cmd_event_file *comp_ev_file =
2798 container_of(uobj, struct devx_async_cmd_event_file,
2800 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2801 struct devx_async_data *entry, *tmp;
2803 spin_lock_irq(&ev_queue->lock);
2804 ev_queue->is_destroyed = 1;
2805 spin_unlock_irq(&ev_queue->lock);
2806 wake_up_interruptible(&ev_queue->poll_wait);
2808 mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2810 spin_lock_irq(&comp_ev_file->ev_queue.lock);
2811 list_for_each_entry_safe(entry, tmp,
2812 &comp_ev_file->ev_queue.event_list, list) {
2813 list_del(&entry->list);
2816 spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2819 static void devx_async_event_destroy_uobj(struct ib_uobject *uobj,
2820 enum rdma_remove_reason why)
2822 struct devx_async_event_file *ev_file =
2823 container_of(uobj, struct devx_async_event_file,
2825 struct devx_event_subscription *event_sub, *event_sub_tmp;
2826 struct mlx5_ib_dev *dev = ev_file->dev;
2828 spin_lock_irq(&ev_file->lock);
2829 ev_file->is_destroyed = 1;
2831 /* free the pending events allocation */
2832 if (ev_file->omit_data) {
2833 struct devx_event_subscription *event_sub, *tmp;
2835 list_for_each_entry_safe(event_sub, tmp, &ev_file->event_list,
2837 list_del_init(&event_sub->event_list);
2840 struct devx_async_event_data *entry, *tmp;
2842 list_for_each_entry_safe(entry, tmp, &ev_file->event_list,
2844 list_del(&entry->list);
2849 spin_unlock_irq(&ev_file->lock);
2850 wake_up_interruptible(&ev_file->poll_wait);
2852 mutex_lock(&dev->devx_event_table.event_xa_lock);
2853 /* delete the subscriptions which are related to this FD */
2854 list_for_each_entry_safe(event_sub, event_sub_tmp,
2855 &ev_file->subscribed_events_list, file_list) {
2856 devx_cleanup_subscription(dev, event_sub);
2857 list_del_rcu(&event_sub->file_list);
2858 /* subscription may not be used by the read API any more */
2859 call_rcu(&event_sub->rcu, devx_free_subscription);
2861 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2863 put_device(&dev->ib_dev.dev);
2866 DECLARE_UVERBS_NAMED_METHOD(
2867 MLX5_IB_METHOD_DEVX_UMEM_REG,
2868 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2869 MLX5_IB_OBJECT_DEVX_UMEM,
2872 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2873 UVERBS_ATTR_TYPE(u64),
2875 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2876 UVERBS_ATTR_TYPE(u64),
2878 UVERBS_ATTR_RAW_FD(MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD,
2880 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2881 enum ib_access_flags),
2882 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP,
2884 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2885 UVERBS_ATTR_TYPE(u32),
2888 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2889 MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2890 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2891 MLX5_IB_OBJECT_DEVX_UMEM,
2892 UVERBS_ACCESS_DESTROY,
2895 DECLARE_UVERBS_NAMED_METHOD(
2896 MLX5_IB_METHOD_DEVX_QUERY_EQN,
2897 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2898 UVERBS_ATTR_TYPE(u32),
2900 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2901 UVERBS_ATTR_TYPE(u32),
2904 DECLARE_UVERBS_NAMED_METHOD(
2905 MLX5_IB_METHOD_DEVX_QUERY_UAR,
2906 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2907 UVERBS_ATTR_TYPE(u32),
2909 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2910 UVERBS_ATTR_TYPE(u32),
2913 DECLARE_UVERBS_NAMED_METHOD(
2914 MLX5_IB_METHOD_DEVX_OTHER,
2916 MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2917 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2920 UVERBS_ATTR_PTR_OUT(
2921 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2922 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2925 DECLARE_UVERBS_NAMED_METHOD(
2926 MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2927 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2928 MLX5_IB_OBJECT_DEVX_OBJ,
2932 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2933 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2936 UVERBS_ATTR_PTR_OUT(
2937 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2938 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2941 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2942 MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2943 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2944 MLX5_IB_OBJECT_DEVX_OBJ,
2945 UVERBS_ACCESS_DESTROY,
2948 DECLARE_UVERBS_NAMED_METHOD(
2949 MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2950 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2951 UVERBS_IDR_ANY_OBJECT,
2955 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2956 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2959 UVERBS_ATTR_PTR_OUT(
2960 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2961 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2964 DECLARE_UVERBS_NAMED_METHOD(
2965 MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2966 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2967 UVERBS_IDR_ANY_OBJECT,
2971 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2972 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2975 UVERBS_ATTR_PTR_OUT(
2976 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2977 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2980 DECLARE_UVERBS_NAMED_METHOD(
2981 MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2982 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2983 UVERBS_IDR_ANY_OBJECT,
2987 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2988 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2991 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2993 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2994 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2997 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2998 UVERBS_ATTR_TYPE(u64),
3001 DECLARE_UVERBS_NAMED_METHOD(
3002 MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
3003 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
3004 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3007 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
3008 MLX5_IB_OBJECT_DEVX_OBJ,
3011 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
3012 UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
3015 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
3016 UVERBS_ATTR_TYPE(u64),
3018 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
3019 UVERBS_ATTR_TYPE(u32),
3022 DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
3023 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
3024 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
3025 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
3026 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
3028 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
3029 UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
3030 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
3031 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
3032 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
3033 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
3034 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
3036 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
3037 UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
3038 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
3039 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
3042 DECLARE_UVERBS_NAMED_METHOD(
3043 MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
3044 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
3045 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3049 DECLARE_UVERBS_NAMED_OBJECT(
3050 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3051 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
3052 devx_async_cmd_event_destroy_uobj,
3053 &devx_async_cmd_event_fops, "[devx_async_cmd]",
3055 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
3057 DECLARE_UVERBS_NAMED_METHOD(
3058 MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
3059 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
3060 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3063 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
3064 enum mlx5_ib_uapi_devx_create_event_channel_flags,
3067 DECLARE_UVERBS_NAMED_OBJECT(
3068 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3069 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
3070 devx_async_event_destroy_uobj,
3071 &devx_async_event_fops, "[devx_async_event]",
3073 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
3075 static bool devx_is_supported(struct ib_device *device)
3077 struct mlx5_ib_dev *dev = to_mdev(device);
3079 return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
3082 const struct uapi_definition mlx5_ib_devx_defs[] = {
3083 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3084 MLX5_IB_OBJECT_DEVX,
3085 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3086 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3087 MLX5_IB_OBJECT_DEVX_OBJ,
3088 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3089 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3090 MLX5_IB_OBJECT_DEVX_UMEM,
3091 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3092 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3093 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3094 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3095 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3096 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3097 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),