1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
3 * Copyright 2018-2023 Amazon.com, Inc. or its affiliates. All rights reserved.
9 #define EFA_IO_TX_DESC_NUM_BUFS 2
10 #define EFA_IO_TX_DESC_NUM_RDMA_BUFS 1
11 #define EFA_IO_TX_DESC_INLINE_MAX_SIZE 32
12 #define EFA_IO_TX_DESC_IMM_DATA_SIZE 4
14 enum efa_io_queue_type {
15 /* send queue (of a QP) */
16 EFA_IO_SEND_QUEUE = 1,
17 /* recv queue (of a QP) */
18 EFA_IO_RECV_QUEUE = 2,
21 enum efa_io_send_op_type {
27 EFA_IO_RDMA_WRITE = 2,
30 enum efa_io_comp_status {
31 /* Successful completion */
32 EFA_IO_COMP_STATUS_OK = 0,
33 /* Flushed during QP destroy */
34 EFA_IO_COMP_STATUS_FLUSHED = 1,
35 /* Internal QP error */
36 EFA_IO_COMP_STATUS_LOCAL_ERROR_QP_INTERNAL_ERROR = 2,
37 /* Bad operation type */
38 EFA_IO_COMP_STATUS_LOCAL_ERROR_INVALID_OP_TYPE = 3,
40 EFA_IO_COMP_STATUS_LOCAL_ERROR_INVALID_AH = 4,
41 /* LKEY not registered or does not match IOVA */
42 EFA_IO_COMP_STATUS_LOCAL_ERROR_INVALID_LKEY = 5,
43 /* Message too long */
44 EFA_IO_COMP_STATUS_LOCAL_ERROR_BAD_LENGTH = 6,
45 /* Destination ENI is down or does not run EFA */
46 EFA_IO_COMP_STATUS_REMOTE_ERROR_BAD_ADDRESS = 7,
47 /* Connection was reset by remote side */
48 EFA_IO_COMP_STATUS_REMOTE_ERROR_ABORT = 8,
49 /* Bad dest QP number (QP does not exist or is in error state) */
50 EFA_IO_COMP_STATUS_REMOTE_ERROR_BAD_DEST_QPN = 9,
51 /* Destination resource not ready (no WQEs posted on RQ) */
52 EFA_IO_COMP_STATUS_REMOTE_ERROR_RNR = 10,
53 /* Receiver SGL too short */
54 EFA_IO_COMP_STATUS_REMOTE_ERROR_BAD_LENGTH = 11,
55 /* Unexpected status returned by responder */
56 EFA_IO_COMP_STATUS_REMOTE_ERROR_BAD_STATUS = 12,
57 /* Unresponsive remote - detected locally */
58 EFA_IO_COMP_STATUS_LOCAL_ERROR_UNRESP_REMOTE = 13,
61 struct efa_io_tx_meta_desc {
62 /* Verbs-generated Request ID */
67 * 3:0 : op_type - enum efa_io_send_op_type
68 * 4 : has_imm - immediate_data field carries valid
70 * 5 : inline_msg - inline mode - inline message data
71 * follows this descriptor (no buffer descriptors).
72 * Note that it is different from immediate data
73 * 6 : meta_extension - Extended metadata. MBZ
74 * 7 : meta_desc - Indicates metadata descriptor.
82 * 1 : reserved25 - MBZ
83 * 2 : first - Indicates first descriptor in
84 * transaction. Must be set.
85 * 3 : last - Indicates last descriptor in
86 * transaction. Must be set.
87 * 4 : comp_req - Indicates whether completion should
88 * be posted, after packet is transmitted. Valid only
89 * for the first descriptor
90 * 7:5 : reserved29 - MBZ
97 * If inline_msg bit is set, length of inline message in bytes,
98 * otherwise length of SGL (number of buffers).
103 * immediate data: if has_imm is set, then this field is included
104 * within Tx message and reported in remote Rx completion.
119 * Tx queue buffer descriptor, for any transport type. Preceded by metadata
122 struct efa_io_tx_buf_desc {
123 /* length in bytes */
127 * 23:0 : lkey - local memory translation key
128 * 31:24 : reserved - MBZ
132 /* Buffer address bits[31:0] */
135 /* Buffer address bits[63:32] */
139 struct efa_io_remote_mem_addr {
140 /* length in bytes */
143 /* remote memory translation key */
146 /* Buffer address bits[31:0] */
149 /* Buffer address bits[63:32] */
153 struct efa_io_rdma_req {
154 /* Remote memory address */
155 struct efa_io_remote_mem_addr remote_mem;
157 /* Local memory address */
158 struct efa_io_tx_buf_desc local_mem[1];
162 * Tx WQE, composed of tx meta descriptors followed by either tx buffer
163 * descriptors or inline data
165 struct efa_io_tx_wqe {
167 struct efa_io_tx_meta_desc meta;
170 /* Send buffer descriptors */
171 struct efa_io_tx_buf_desc sgl[2];
175 /* RDMA local and remote memory addresses */
176 struct efa_io_rdma_req rdma_req;
181 * Rx buffer descriptor; RX WQE is composed of one or more RX buffer
184 struct efa_io_rx_desc {
185 /* Buffer address bits[31:0] */
188 /* Buffer Pointer[63:32] */
191 /* Verbs-generated request id. */
194 /* Length in bytes. */
198 * LKey and control flags
200 * 29:24 : reserved - MBZ
201 * 30 : first - Indicates first descriptor in WQE
202 * 31 : last - Indicates last descriptor in WQE
207 /* Common IO completion descriptor */
208 struct efa_io_cdesc_common {
210 * verbs-generated request ID, as provided in the completed tx or rx
219 * 0 : phase - Phase bit
220 * 2:1 : q_type - enum efa_io_queue_type: send/recv
221 * 3 : has_imm - indicates that immediate data is
222 * present - for RX completions only
223 * 6:4 : op_type - enum efa_io_send_op_type
224 * 7 : reserved31 - MBZ
228 /* local QP number */
232 /* Tx completion descriptor */
233 struct efa_io_tx_cdesc {
234 /* Common completion info */
235 struct efa_io_cdesc_common common;
241 /* Rx Completion Descriptor */
242 struct efa_io_rx_cdesc {
243 /* Common completion info */
244 struct efa_io_cdesc_common common;
246 /* Transferred length bits[15:0] */
249 /* Remote Address Handle FW index, 0xFFFF indicates invalid ah */
258 /* Rx Completion Descriptor RDMA write info */
259 struct efa_io_rx_cdesc_rdma_write {
260 /* Transferred length bits[31:16] */
264 /* Extended Rx Completion Descriptor */
265 struct efa_io_rx_cdesc_ex {
266 /* Base RX completion info */
267 struct efa_io_rx_cdesc base;
270 struct efa_io_rx_cdesc_rdma_write rdma_write;
273 * Valid only in case of unknown AH (0xFFFF) and CQ
274 * set_src_addr is enabled.
281 #define EFA_IO_TX_META_DESC_OP_TYPE_MASK GENMASK(3, 0)
282 #define EFA_IO_TX_META_DESC_HAS_IMM_MASK BIT(4)
283 #define EFA_IO_TX_META_DESC_INLINE_MSG_MASK BIT(5)
284 #define EFA_IO_TX_META_DESC_META_EXTENSION_MASK BIT(6)
285 #define EFA_IO_TX_META_DESC_META_DESC_MASK BIT(7)
286 #define EFA_IO_TX_META_DESC_PHASE_MASK BIT(0)
287 #define EFA_IO_TX_META_DESC_FIRST_MASK BIT(2)
288 #define EFA_IO_TX_META_DESC_LAST_MASK BIT(3)
289 #define EFA_IO_TX_META_DESC_COMP_REQ_MASK BIT(4)
292 #define EFA_IO_TX_BUF_DESC_LKEY_MASK GENMASK(23, 0)
295 #define EFA_IO_RX_DESC_LKEY_MASK GENMASK(23, 0)
296 #define EFA_IO_RX_DESC_FIRST_MASK BIT(30)
297 #define EFA_IO_RX_DESC_LAST_MASK BIT(31)
300 #define EFA_IO_CDESC_COMMON_PHASE_MASK BIT(0)
301 #define EFA_IO_CDESC_COMMON_Q_TYPE_MASK GENMASK(2, 1)
302 #define EFA_IO_CDESC_COMMON_HAS_IMM_MASK BIT(3)
303 #define EFA_IO_CDESC_COMMON_OP_TYPE_MASK GENMASK(6, 4)
305 #endif /* _EFA_IO_H_ */