1 /* SPDX-License-Identifier: MIT */
3 * Copyright © 2021 Intel Corporation
6 #include <drm/drm_modeset_helper.h>
9 #include "intel_display_types.h"
10 #include "intel_fb_bo.h"
12 void intel_fb_bo_framebuffer_fini(struct xe_bo *bo)
14 if (bo->flags & XE_BO_CREATE_PINNED_BIT) {
15 /* Unpin our kernel fb first */
16 xe_bo_lock(bo, false);
23 int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
25 struct drm_mode_fb_cmd2 *mode_cmd)
27 struct drm_i915_private *i915 = to_i915(bo->ttm.base.dev);
32 ret = ttm_bo_reserve(&bo->ttm, true, false, NULL);
36 if (!(bo->flags & XE_BO_SCANOUT_BIT)) {
38 * XE_BO_SCANOUT_BIT should ideally be set at creation, or is
39 * automatically set when creating FB. We cannot change caching
40 * mode when the boect is VM_BINDed, so we can only set
41 * coherency with display when unbound.
43 if (XE_IOCTL_DBG(i915, !list_empty(&bo->ttm.base.gpuva.list))) {
44 ttm_bo_unreserve(&bo->ttm);
47 bo->flags |= XE_BO_SCANOUT_BIT;
49 ttm_bo_unreserve(&bo->ttm);
54 struct xe_bo *intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915,
55 struct drm_file *filp,
56 const struct drm_mode_fb_cmd2 *mode_cmd)
58 struct drm_i915_gem_object *bo;
59 struct drm_gem_object *gem = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
62 return ERR_PTR(-ENOENT);
64 bo = gem_to_xe_bo(gem);
65 /* Require vram placement or dma-buf import */
67 !xe_bo_can_migrate(gem_to_xe_bo(gem), XE_PL_VRAM0) &&
68 bo->ttm.type != ttm_bo_type_sg) {
69 drm_gem_object_put(gem);
70 return ERR_PTR(-EREMOTE);