1 // SPDX-License-Identifier: MIT
3 * Copyright © 2019 Intel Corporation
6 #include "gem/i915_gem_context.h"
7 #include "gem/i915_gem_pm.h"
9 #include "i915_drm_client.h"
11 #include "i915_trace.h"
13 #include "intel_context.h"
14 #include "intel_engine.h"
15 #include "intel_engine_pm.h"
16 #include "intel_ring.h"
18 static struct kmem_cache *slab_ce;
20 static struct intel_context *intel_context_alloc(void)
22 return kmem_cache_zalloc(slab_ce, GFP_KERNEL);
25 static void rcu_context_free(struct rcu_head *rcu)
27 struct intel_context *ce = container_of(rcu, typeof(*ce), rcu);
29 trace_intel_context_free(ce);
30 kmem_cache_free(slab_ce, ce);
33 void intel_context_free(struct intel_context *ce)
35 call_rcu(&ce->rcu, rcu_context_free);
38 struct intel_context *
39 intel_context_create(struct intel_engine_cs *engine)
41 struct intel_context *ce;
43 ce = intel_context_alloc();
45 return ERR_PTR(-ENOMEM);
47 intel_context_init(ce, engine);
48 trace_intel_context_create(ce);
52 int intel_context_alloc_state(struct intel_context *ce)
54 struct i915_gem_context *ctx;
57 if (mutex_lock_interruptible(&ce->pin_mutex))
60 if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
61 if (intel_context_is_banned(ce)) {
66 err = ce->ops->alloc(ce);
70 set_bit(CONTEXT_ALLOC_BIT, &ce->flags);
73 ctx = rcu_dereference(ce->gem_context);
74 if (ctx && !kref_get_unless_zero(&ctx->ref))
79 i915_drm_client_add_context_objects(ctx->client,
81 i915_gem_context_put(ctx);
86 mutex_unlock(&ce->pin_mutex);
90 static int intel_context_active_acquire(struct intel_context *ce)
94 __i915_active_acquire(&ce->active);
96 if (intel_context_is_barrier(ce) || intel_engine_uses_guc(ce->engine) ||
97 intel_context_is_parallel(ce))
100 /* Preallocate tracking nodes */
101 err = i915_active_acquire_preallocate_barrier(&ce->active,
104 i915_active_release(&ce->active);
109 static void intel_context_active_release(struct intel_context *ce)
111 /* Nodes preallocated in intel_context_active() */
112 i915_active_acquire_barrier(&ce->active);
113 i915_active_release(&ce->active);
116 static int __context_pin_state(struct i915_vma *vma, struct i915_gem_ww_ctx *ww)
118 unsigned int bias = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS;
121 err = i915_ggtt_pin(vma, ww, 0, bias | PIN_HIGH);
125 err = i915_active_acquire(&vma->active);
130 * And mark it as a globally pinned object to let the shrinker know
131 * it cannot reclaim the object until we release it.
133 i915_vma_make_unshrinkable(vma);
134 vma->obj->mm.dirty = true;
143 static void __context_unpin_state(struct i915_vma *vma)
145 i915_vma_make_shrinkable(vma);
146 i915_active_release(&vma->active);
147 __i915_vma_unpin(vma);
150 static int __ring_active(struct intel_ring *ring,
151 struct i915_gem_ww_ctx *ww)
155 err = intel_ring_pin(ring, ww);
159 err = i915_active_acquire(&ring->vma->active);
166 intel_ring_unpin(ring);
170 static void __ring_retire(struct intel_ring *ring)
172 i915_active_release(&ring->vma->active);
173 intel_ring_unpin(ring);
176 static int intel_context_pre_pin(struct intel_context *ce,
177 struct i915_gem_ww_ctx *ww)
181 CE_TRACE(ce, "active\n");
183 err = __ring_active(ce->ring, ww);
187 err = intel_timeline_pin(ce->timeline, ww);
194 err = __context_pin_state(ce->state, ww);
202 intel_timeline_unpin(ce->timeline);
204 __ring_retire(ce->ring);
208 static void intel_context_post_unpin(struct intel_context *ce)
211 __context_unpin_state(ce->state);
213 intel_timeline_unpin(ce->timeline);
214 __ring_retire(ce->ring);
217 int __intel_context_do_pin_ww(struct intel_context *ce,
218 struct i915_gem_ww_ctx *ww)
220 bool handoff = false;
224 if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, &ce->flags))) {
225 err = intel_context_alloc_state(ce);
231 * We always pin the context/ring/timeline here, to ensure a pin
232 * refcount for __intel_context_active(), which prevent a lock
233 * inversion of ce->pin_mutex vs dma_resv_lock().
236 err = i915_gem_object_lock(ce->timeline->hwsp_ggtt->obj, ww);
238 err = i915_gem_object_lock(ce->ring->vma->obj, ww);
239 if (!err && ce->state)
240 err = i915_gem_object_lock(ce->state->obj, ww);
242 err = intel_context_pre_pin(ce, ww);
246 err = ce->ops->pre_pin(ce, ww, &vaddr);
250 err = i915_active_acquire(&ce->active);
254 err = mutex_lock_interruptible(&ce->pin_mutex);
258 intel_engine_pm_might_get(ce->engine);
260 if (unlikely(intel_context_is_closed(ce))) {
265 if (likely(!atomic_add_unless(&ce->pin_count, 1, 0))) {
266 err = intel_context_active_acquire(ce);
270 err = ce->ops->pin(ce, vaddr);
272 intel_context_active_release(ce);
276 CE_TRACE(ce, "pin ring:{start:%08x, head:%04x, tail:%04x}\n",
277 i915_ggtt_offset(ce->ring->vma),
278 ce->ring->head, ce->ring->tail);
281 smp_mb__before_atomic(); /* flush pin before it is visible */
282 atomic_inc(&ce->pin_count);
285 GEM_BUG_ON(!intel_context_is_pinned(ce)); /* no overflow! */
287 trace_intel_context_do_pin(ce);
290 mutex_unlock(&ce->pin_mutex);
292 i915_active_release(&ce->active);
295 ce->ops->post_unpin(ce);
297 intel_context_post_unpin(ce);
300 * Unlock the hwsp_ggtt object since it's shared.
301 * In principle we can unlock all the global state locked above
302 * since it's pinned and doesn't need fencing, and will
303 * thus remain resident until it is explicitly unpinned.
305 i915_gem_ww_unlock_single(ce->timeline->hwsp_ggtt->obj);
310 int __intel_context_do_pin(struct intel_context *ce)
312 struct i915_gem_ww_ctx ww;
315 i915_gem_ww_ctx_init(&ww, true);
317 err = __intel_context_do_pin_ww(ce, &ww);
318 if (err == -EDEADLK) {
319 err = i915_gem_ww_ctx_backoff(&ww);
323 i915_gem_ww_ctx_fini(&ww);
327 void __intel_context_do_unpin(struct intel_context *ce, int sub)
329 if (!atomic_sub_and_test(sub, &ce->pin_count))
332 CE_TRACE(ce, "unpin\n");
334 ce->ops->post_unpin(ce);
337 * Once released, we may asynchronously drop the active reference.
338 * As that may be the only reference keeping the context alive,
339 * take an extra now so that it is not freed before we finish
342 intel_context_get(ce);
343 intel_context_active_release(ce);
344 trace_intel_context_do_unpin(ce);
345 intel_context_put(ce);
348 static void __intel_context_retire(struct i915_active *active)
350 struct intel_context *ce = container_of(active, typeof(*ce), active);
352 CE_TRACE(ce, "retire runtime: { total:%lluns, avg:%lluns }\n",
353 intel_context_get_total_runtime_ns(ce),
354 intel_context_get_avg_runtime_ns(ce));
356 set_bit(CONTEXT_VALID_BIT, &ce->flags);
357 intel_context_post_unpin(ce);
358 intel_context_put(ce);
361 static int __intel_context_active(struct i915_active *active)
363 struct intel_context *ce = container_of(active, typeof(*ce), active);
365 intel_context_get(ce);
367 /* everything should already be activated by intel_context_pre_pin() */
368 GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->ring->vma->active));
369 __intel_ring_pin(ce->ring);
371 __intel_timeline_pin(ce->timeline);
374 GEM_WARN_ON(!i915_active_acquire_if_busy(&ce->state->active));
375 __i915_vma_pin(ce->state);
376 i915_vma_make_unshrinkable(ce->state);
383 sw_fence_dummy_notify(struct i915_sw_fence *sf,
384 enum i915_sw_fence_notify state)
390 intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine)
392 GEM_BUG_ON(!engine->cops);
393 GEM_BUG_ON(!engine->gt->vm);
398 ce->ops = engine->cops;
399 ce->sseu = engine->sseu;
401 ce->ring_size = SZ_4K;
403 ewma_runtime_init(&ce->stats.runtime.avg);
405 ce->vm = i915_vm_get(engine->gt->vm);
407 /* NB ce->signal_link/lock is used under RCU */
408 spin_lock_init(&ce->signal_lock);
409 INIT_LIST_HEAD(&ce->signals);
411 mutex_init(&ce->pin_mutex);
413 spin_lock_init(&ce->guc_state.lock);
414 INIT_LIST_HEAD(&ce->guc_state.fences);
415 INIT_LIST_HEAD(&ce->guc_state.requests);
417 ce->guc_id.id = GUC_INVALID_CONTEXT_ID;
418 INIT_LIST_HEAD(&ce->guc_id.link);
420 INIT_LIST_HEAD(&ce->destroyed_link);
422 INIT_LIST_HEAD(&ce->parallel.child_list);
425 * Initialize fence to be complete as this is expected to be complete
426 * unless there is a pending schedule disable outstanding.
428 i915_sw_fence_init(&ce->guc_state.blocked,
429 sw_fence_dummy_notify);
430 i915_sw_fence_commit(&ce->guc_state.blocked);
432 i915_active_init(&ce->active,
433 __intel_context_active, __intel_context_retire, 0);
436 void intel_context_fini(struct intel_context *ce)
438 struct intel_context *child, *next;
441 intel_timeline_put(ce->timeline);
444 /* Need to put the creation ref for the children */
445 if (intel_context_is_parent(ce))
446 for_each_child_safe(ce, child, next)
447 intel_context_put(child);
449 mutex_destroy(&ce->pin_mutex);
450 i915_active_fini(&ce->active);
451 i915_sw_fence_fini(&ce->guc_state.blocked);
454 void i915_context_module_exit(void)
456 kmem_cache_destroy(slab_ce);
459 int __init i915_context_module_init(void)
461 slab_ce = KMEM_CACHE(intel_context, SLAB_HWCACHE_ALIGN);
468 void intel_context_enter_engine(struct intel_context *ce)
470 intel_engine_pm_get(ce->engine);
471 intel_timeline_enter(ce->timeline);
474 void intel_context_exit_engine(struct intel_context *ce)
476 intel_timeline_exit(ce->timeline);
477 intel_engine_pm_put(ce->engine);
480 int intel_context_prepare_remote_request(struct intel_context *ce,
481 struct i915_request *rq)
483 struct intel_timeline *tl = ce->timeline;
486 /* Only suitable for use in remotely modifying this context */
487 GEM_BUG_ON(rq->context == ce);
489 if (rcu_access_pointer(rq->timeline) != tl) { /* timeline sharing! */
490 /* Queue this switch after current activity by this context. */
491 err = i915_active_fence_set(&tl->last_request, rq);
497 * Guarantee context image and the timeline remains pinned until the
498 * modifying request is retired by setting the ce activity tracker.
500 * But we only need to take one pin on the account of it. Or in other
501 * words transfer the pinned ce object to tracked active request.
503 GEM_BUG_ON(i915_active_is_idle(&ce->active));
504 return i915_active_add_request(&ce->active, rq);
507 struct i915_request *intel_context_create_request(struct intel_context *ce)
509 struct i915_gem_ww_ctx ww;
510 struct i915_request *rq;
513 i915_gem_ww_ctx_init(&ww, true);
515 err = intel_context_pin_ww(ce, &ww);
517 rq = i915_request_create(ce);
518 intel_context_unpin(ce);
519 } else if (err == -EDEADLK) {
520 err = i915_gem_ww_ctx_backoff(&ww);
528 i915_gem_ww_ctx_fini(&ww);
534 * timeline->mutex should be the inner lock, but is used as outer lock.
535 * Hack around this to shut up lockdep in selftests..
537 lockdep_unpin_lock(&ce->timeline->mutex, rq->cookie);
538 mutex_release(&ce->timeline->mutex.dep_map, _RET_IP_);
539 mutex_acquire(&ce->timeline->mutex.dep_map, SINGLE_DEPTH_NESTING, 0, _RET_IP_);
540 rq->cookie = lockdep_pin_lock(&ce->timeline->mutex);
545 struct i915_request *intel_context_get_active_request(struct intel_context *ce)
547 struct intel_context *parent = intel_context_to_parent(ce);
548 struct i915_request *rq, *active = NULL;
551 GEM_BUG_ON(!intel_engine_uses_guc(ce->engine));
554 * We search the parent list to find an active request on the submitted
555 * context. The parent list contains the requests for all the contexts
556 * in the relationship so we have to do a compare of each request's
559 spin_lock_irqsave(&parent->guc_state.lock, flags);
560 list_for_each_entry_reverse(rq, &parent->guc_state.requests,
562 if (rq->context != ce)
564 if (i915_request_completed(rq))
570 active = i915_request_get_rcu(active);
571 spin_unlock_irqrestore(&parent->guc_state.lock, flags);
576 void intel_context_bind_parent_child(struct intel_context *parent,
577 struct intel_context *child)
580 * Callers responsibility to validate that this function is used
581 * correctly but we use GEM_BUG_ON here ensure that they do.
583 GEM_BUG_ON(intel_context_is_pinned(parent));
584 GEM_BUG_ON(intel_context_is_child(parent));
585 GEM_BUG_ON(intel_context_is_pinned(child));
586 GEM_BUG_ON(intel_context_is_child(child));
587 GEM_BUG_ON(intel_context_is_parent(child));
589 parent->parallel.child_index = parent->parallel.number_children++;
590 list_add_tail(&child->parallel.child_link,
591 &parent->parallel.child_list);
592 child->parallel.parent = parent;
595 u64 intel_context_get_total_runtime_ns(struct intel_context *ce)
599 if (ce->ops->update_stats)
600 ce->ops->update_stats(ce);
602 total = ce->stats.runtime.total;
603 if (ce->ops->flags & COPS_RUNTIME_CYCLES)
604 total *= ce->engine->gt->clock_period_ns;
606 active = READ_ONCE(ce->stats.active);
608 active = intel_context_clock() - active;
610 return total + active;
613 u64 intel_context_get_avg_runtime_ns(struct intel_context *ce)
615 u64 avg = ewma_runtime_read(&ce->stats.runtime.avg);
617 if (ce->ops->flags & COPS_RUNTIME_CYCLES)
618 avg *= ce->engine->gt->clock_period_ns;
623 bool intel_context_ban(struct intel_context *ce, struct i915_request *rq)
625 bool ret = intel_context_set_banned(ce);
627 trace_intel_context_ban(ce);
630 ce->ops->revoke(ce, rq,
631 INTEL_CONTEXT_BANNED_PREEMPT_TIMEOUT_MS);
636 bool intel_context_revoke(struct intel_context *ce)
638 bool ret = intel_context_set_exiting(ce);
641 ce->ops->revoke(ce, NULL, ce->engine->props.preempt_timeout_ms);
646 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
647 #include "selftest_context.c"